Commit 20eced2c authored by Andrea Di Biagio's avatar Andrea Di Biagio Committed by Tom Stellard
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[X86][SchedModel] Add missing ReadAdvance for some arithmetic ops (PR51318 and PR51322).

This fixes a bug where implicit uses of EFLAGS were not marked as ReadAdvance in
the RM/MR variants of ADC/SBB (PR51318)

This also fixes the absence of ReadAdvance for the register operand of
RMW arithmetic instructions (PR51322).

Differential Revision: https://reviews.llvm.org/D107367

(cherry picked from commit 7a1a35a1)
parent d8667f1f
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