[llvm-exegesis] Add benchmark latency option on X86 that uses LBR for more...

    [llvm-exegesis] Add benchmark latency option on X86 that uses LBR for more precise measurements.

    Starting with Skylake, the LBR contains the precise number of cycles between the two
    consecutive branches.
    Making use of this will hopefully make the measurements more precise than the
    existing methods of using RDTSC.

            Differential Revision: https://reviews.llvm.org/D77422