- Aug 23, 2019
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Linus Walleij authored
We need to convert all old gpio irqchips to pass the irqchip setup along when adding the gpio_chip. For more info see drivers/gpio/TODO. For chained irqchips this is a pretty straight-forward conversion. This driver requests the IRQ directly in the driver so it differs a bit from the others. Cc: Greg Ungerer <gerg@kernel.org> Cc: Nicholas Mc Guire <hofrat@osadl.org> Cc: Sergio Paracuellos <sergio.paracuellos@gmail.com> Cc: Thierry Reding <treding@nvidia.com> Signed-off-by:
Linus Walleij <linus.walleij@linaro.org> Tested-by:
René van Dorst <opensource@vdorst.com> Link: https://lore.kernel.org/r/20190809141116.16403-1-linus.walleij@linaro.org
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Christophe JAILLET authored
If 'devm_kcalloc()' fails, we should go through the error handling path, should some clean-up be needed. Fixes: 42d9fc71 ("gpio: ftgpio: Pass irqchip when adding gpiochip") Signed-off-by:
Christophe JAILLET <christophe.jaillet@wanadoo.fr> Link: https://lore.kernel.org/r/20190822204538.4791-1-christophe.jaillet@wanadoo.fr Signed-off-by:
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YueHaibing authored
If CONFIG_GPIOLIB is not, gpiochip_lock/unlock_as_irq will conflict as this: In file included from sound/soc/codecs/wm5100.c:18:0: ./include/linux/gpio.h:224:19: error: static declaration of gpiochip_lock_as_irq follows non-static declaration static inline int gpiochip_lock_as_irq(struct gpio_chip *chip, ^~~~~~~~~~~~~~~~~~~~ In file included from sound/soc/codecs/wm5100.c:17:0: ./include/linux/gpio/driver.h:494:5: note: previous declaration of gpiochip_lock_as_irq was here int gpiochip_lock_as_irq(struct gpio_chip *chip, unsigned int offset); ^~~~~~~~~~~~~~~~~~~~ In file included from sound/soc/codecs/wm5100.c:18:0: ./include/linux/gpio.h:231:20: error: static declaration of gpiochip_unlock_as_irq follows non-static declaration static inline void gpiochip_unlock_as_irq(struct gpio_chip *chip, ^~~~~~~~~~~~~~~~~~~~~~ In file included from sound/soc/codecs/wm5100.c:17:0: ./include/linux/gpio/driver.h:495:6: note: previous declaration of gpiochip_unlock_as_irq was here void gpiochip_unlock_as_irq(struct gpio_chip *chip, unsigned int offset); ^~~~~~~~~~~~~~~~~~~~~~ Move them to gpio/driver.h and use CONFIG_GPIOLIB guard this. Reported-by:Hulk Robot <hulkci@huawei.com> Fixes: d74be6df ("gpio: remove gpiod_lock/unlock_as_irq()") Signed-off-by:
YueHaibing <yuehaibing@huawei.com> Link: https://lore.kernel.org/r/20190822031817.32888-1-yuehaibing@huawei.com Signed-off-by:
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Hongwei Zhang authored
Add SGPIO driver support for Aspeed AST2500 SoC. Signed-off-by:
Hongwei Zhang <hongweiz@ami.com> Reviewed-by:
Andrew Jeffery <andrew@aj.id.au> Link: https://lore.kernel.org/r/1566335128-31498-2-git-send-email-hongweiz@ami.com Signed-off-by:
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Denis Efremov authored
Cleanup MAINTAINERS from FMC record since the subsystem was removed. Cc: Pat Riehecky <riehecky@fnal.gov> Fixes: 6a80b300 ("fmc: Delete the FMC subsystem") Signed-off-by:
Denis Efremov <efremov@linux.com> Link: https://lore.kernel.org/r/20190813061547.17847-1-efremov@linux.com Reviewed-by:
Federico Vaga <federico.vaga@cern.ch> Signed-off-by:
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Linus Walleij authored
We need to convert all old gpio irqchips to pass the irqchip setup along when adding the gpio_chip. For more info see drivers/gpio/TODO. For chained irqchips this is a pretty straight-forward conversion. Cc: Andrew Lunn <andrew@lunn.ch> Cc: Thierry Reding <treding@nvidia.com> Signed-off-by:
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Linus Walleij authored
We need to convert all old gpio irqchips to pass the irqchip setup along when adding the gpio_chip. For more info see drivers/gpio/TODO. For chained irqchips this is a pretty straight-forward conversion. Cc: Andrey Smirnov <andrew.smirnov@gmail.com> Cc: Andrew Lunn <andrew@lunn.ch> Cc: Dong Aisheng <aisheng.dong@nxp.com> Cc: Stefan Agner <stefan@agner.ch> Cc: Thierry Reding <treding@nvidia.com> Signed-off-by:
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Linus Walleij authored
We need to convert all old gpio irqchips to pass the irqchip setup along when adding the gpio_chip. For more info see drivers/gpio/TODO. For chained irqchips this is a pretty straight-forward conversion. Cc: Jonas Gorski <jogo@openwrt.org> Cc: Jun Nie <jun.nie@linaro.org> Cc: Thierry Reding <treding@nvidia.com> Signed-off-by:
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Song Hui authored
ls1028a and ls1088a platform share common special function. The gpio hardware what they use is the same version. Signed-off-by:
Song Hui <hui.song_1@nxp.com> Link: https://lore.kernel.org/r/20190808101628.36782-3-hui.song_1@nxp.com Signed-off-by:
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Song Hui authored
ls1088a and ls1028a platform share common gpio node. Signed-off-by:
Rob Herring <robh@kernel.org> Signed-off-by:
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- Aug 21, 2019
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Marc Zyngier authored
Do not expose the base VA (it appears in debugfs). Instead, record the PA, which at least can be used to precisely identify the associated irqchip and domain. Reviewed-by:
Thomas Gleixner <tglx@linutronix.de> Signed-off-by:
Marc Zyngier <maz@kernel.org> Signed-off-by:
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- Aug 20, 2019
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Linus Walleij authored
It is probably wise to initialize the hardware before registering the irq chip. Signed-off-by:
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Linus Walleij authored
After we switched the two drivers that have .need_valid_mask set to use the callback for setting up the .valid_mask, we can just use the presence of the .init_valid_mask() callback (or the OF reserved ranges, nota bene) to determine whether to allocate the mask or not and we can drop the .need_valid_mask field altogether. Cc: Benjamin Gaignard <benjamin.gaignard@st.com> Cc: Amelie Delaunay <amelie.delaunay@st.com> Cc: Stephen Boyd <swboyd@chromium.org> Cc: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by:
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Linus Walleij authored
This makes use of the existing callback to populate the valid mask instead of iteratively setting it up during probe. Cc: Benjamin Gaignard <benjamin.gaignard@st.com> Cc: Amelie Delaunay <amelie.delaunay@st.com> Signed-off-by:
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Linus Walleij authored
It is more helpful for drivers to have the affected fields directly available when we use the callback to set up the valid mask. Change this and switch over the only user (MSM) to use the passed parameters. If we do this we can also move the mask out of publicly visible struct fields. Cc: Stephen Boyd <swboyd@chromium.org> Cc: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by:
Stephen Boyd <swboyd@chromium.org> Signed-off-by:
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Stephen Rothwell authored
Fixes: fdd61a01 ("gpio: Add support for hierarchical IRQ domains") Signed-off-by:
Stephen Rothwell <sfr@canb.auug.org.au> Link: https://lore.kernel.org/r/20190816213812.40a130db@canb.auug.org.au Signed-off-by:
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Uwe Kleine-König authored
config GPIO_MOCKUP is defined in a big if GPIOLIB ... endif block so it doesn't need to depend explicitly on GPIOLIB. Signed-off-by:
Uwe Kleine-König <uwe@kleine-koenig.org> Link: https://lore.kernel.org/r/20190725131002.14597-1-uwe@kleine-koenig.org Signed-off-by:
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- Aug 15, 2019
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Linus Walleij authored
We need to convert all old gpio irqchips to pass the irqchip setup along when adding the gpio_chip. For more info see drivers/gpio/TODO. For chained irqchips this is a pretty straight-forward conversion. Cc: Joel Stanley <joel@jms.id.au> Cc: Andrew Jeffery <andrew@aj.id.au> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Cc: Thierry Reding <treding@nvidia.com> Link: https://lore.kernel.org/r/20190809125515.19094-1-linus.walleij@linaro.org Reviewed-by:
Joel Stanley <joel@jms.id.au> Signed-off-by:
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Linus Walleij authored
We need to convert all old gpio irqchips to pass the irqchip setup along when adding the gpio_chip. For more info see drivers/gpio/TODO. For chained irqchips this is a pretty straight-forward conversion. Cc: Thierry Reding <treding@nvidia.com> Link: https://lore.kernel.org/r/20190809140005.11654-1-linus.walleij@linaro.org Reviewed-by:
Jonathan Neuschäfer <j.neuschaefer@gmx.net> Tested-by:
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Linus Walleij authored
We need to convert all old gpio irqchips to pass the irqchip setup along when adding the gpio_chip. For more info see drivers/gpio/TODO. For chained irqchips this is a pretty straight-forward conversion. Cc: Jayachandran C <jnair@caviumnetworks.com> Cc: Kamlakant Patel <kamlakant.patel@broadcom.com> Cc: Thierry Reding <treding@nvidia.com> Signed-off-by:
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Lokesh Vutla authored
J721e SoCs have same gpio IP as K2G davinci gpio. Add a new compatible to handle J721E SoCs. Signed-off-by:
Lokesh Vutla <lokeshvutla@ti.com> Link: https://lore.kernel.org/r/20190809082947.30590-2-lokeshvutla@ti.com Reviewed-by:
Keerthy <j-keerthy@ti.com> Signed-off-by:
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Linus Walleij authored
We need to convert all old gpio irqchips to pass the irqchip setup along when adding the gpio_chip. For more info see drivers/gpio/TODO. For chained irqchips this is a pretty straight-forward conversion. Cc: Jan Kotas <jank@cadence.com> Cc: Thierry Reding <treding@nvidia.com> Signed-off-by:
Jan Kotas <jank@cadence.com> Link: https://lore.kernel.org/r/20190809131804.20352-1-linus.walleij@linaro.org
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Linus Walleij authored
Use the new infrastructure for hierarchical irqchips in gpiolib. The major part of the rewrite was dues to the fact that the driver was passing around a per-irq pointer to struct thunderx_line * data container, and the central handlers will assume struct gpio_chip * to be passed to we need to use the hwirq as index to look up the struct thunderx_line * for each IRQ. The pushing and pop:ing of the irqdomain was confusing because I've never seen this before, but I tried to replicate it as best I could. I have no chance to test or debug this so I need help. Cc: David Daney <david.daney@cavium.com> Cc: Thierry Reding <treding@nvidia.com> Cc: Brian Masney <masneyb@onstation.org> Signed-off-by:
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Brian Masney authored
Now that the GPIO core has support for hierarchical IRQ chips, convert Qualcomm's spmi-gpio over to use these new helpers to reduce duplicated code across drivers. This change was tested on a LG Nexus 5 (hammerhead) phone. Signed-off-by:
Brian Masney <masneyb@onstation.org> Signed-off-by:
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Linus Walleij authored
This modifies the IXP4xx driver to use the new helpers to handle the remapping of parent to child hardware irqs in the gpiolib core. This pulls the majority of the code out of the driver and use the generic code in gpiolib. Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Marc Zyngier <marc.zyngier@arm.com> Cc: Lina Iyer <ilina@codeaurora.org> Cc: Jon Hunter <jonathanh@nvidia.com> Cc: Sowjanya Komatineni <skomatineni@nvidia.com> Cc: Bitan Biswas <bbiswas@nvidia.com> Cc: linux-tegra@vger.kernel.org Cc: Thierry Reding <treding@nvidia.com> Cc: Brian Masney <masneyb@onstation.org> Signed-off-by:
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Linus Walleij authored
Hierarchical IRQ domains can be used to stack different IRQ controllers on top of each other. Bring hierarchical IRQ domains into the GPIOLIB core with the following basic idea: Drivers that need their interrupts handled hierarchically specify a callback to translate the child hardware IRQ and IRQ type for each GPIO offset to a parent hardware IRQ and parent hardware IRQ type. Users have to pass the callback, fwnode, and parent irqdomain before calling gpiochip_irqchip_add(). We use the new method of just filling in the struct gpio_irq_chip before adding the gpiochip for all hierarchical irqchips of this type. The code path for device tree is pretty straight-forward, while the code path for old boardfiles or anything else will be more convoluted requireing upfront allocation of the interrupts when adding the chip. One specific use-case where this can be useful is if a power management controller has top-level controls for wakeup interrupts. In such cases, the power management controller can be a parent to other interrupt controllers and program additional registers when an IRQ has its wake capability enabled or disabled. The hierarchical irqchip helper code will only be available when IRQ_DOMAIN_HIERARCHY is selected to GPIO chips using this should select or depend on that symbol. When using hierarchical IRQs, the parent interrupt controller must also be hierarchical all the way up to the top interrupt controller wireing directly into the CPU, so on systems that do not have this we can get rid of all the extra code for supporting hierarchical irqs. Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Marc Zyngier <marc.zyngier@arm.com> Cc: Lina Iyer <ilina@codeaurora.org> Cc: Jon Hunter <jonathanh@nvidia.com> Cc: Sowjanya Komatineni <skomatineni@nvidia.com> Cc: Bitan Biswas <bbiswas@nvidia.com> Cc: linux-tegra@vger.kernel.org Cc: David Daney <david.daney@cavium.com> Cc: Masahiro Yamada <yamada.masahiro@socionext.com> Cc: Brian Masney <masneyb@onstation.org> Signed-off-by:
Thierry Reding <treding@nvidia.com> Signed-off-by:
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- Aug 14, 2019
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Hongwei Zhang authored
Add bindings to support SGPIO on AST2400 or AST2500. Signed-off-by:
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- Aug 10, 2019
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Arnd Bergmann authored
The platform is getting removed, so there are no remaining users of this driver. Signed-off-by:
Arnd Bergmann <arnd@arndb.de> Link: https://lore.kernel.org/r/20190809202749.742267-4-arnd@arndb.de Signed-off-by:
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- Aug 07, 2019
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Song Hui authored
Update the NXP GPIO node dt-binding file for QorIQ and Layerscape platforms, and add one more example with ls1028a GPIO node. Signed-off-by:
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- Aug 05, 2019
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Stephen Boyd authored
We don't need dev_err() messages when platform_get_irq() fails now that platform_get_irq() prints an error message itself when something goes wrong. Let's remove these prints with a simple semantic patch. // <smpl> @@ expression ret; struct platform_device *E; @@ ret = ( platform_get_irq(E, ...) | platform_get_irq_byname(E, ...) ); if ( \( ret < 0 \| ret <= 0 \) ) { ( -if (ret != -EPROBE_DEFER) -{ ... -dev_err(...); -... } | ... -dev_err(...); ) ... } // </smpl> While we're here, remove braces on if statements that only have one statement (manually). Cc: linux-gpio@vger.kernel.org Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Signed-off-by:Bartosz Golaszewski <bgolaszewski@baylibre.com> Signed-off-by:
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Charles Keepax authored
As the gpio is common to all madera codecs all that is needed is to setup the correct number of GPIO pins for the CS47L92. Signed-off-by:
Charles Keepax <ckeepax@opensource.cirrus.com> Link: https://lore.kernel.org/r/20190722090748.20807-4-ckeepax@opensource.cirrus.com Signed-off-by:
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Richard Fitzgerald authored
As the gpio is common to all madera codecs all that is needed is to setup the correct number of GPIO pins for the CS47L15. Signed-off-by:
Richard Fitzgerald <rf@opensource.cirrus.com> Signed-off-by:
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Charles Keepax authored
A local copy of the pdata exists and it should be used rather than pulling a fresh copy. Signed-off-by:
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Charles Keepax authored
A local copy of the pdata exists and it should be used rather than pulling a fresh copy. Signed-off-by:
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Hennie Muller authored
Fixes a couple of warnings by checkpatch and sparse. Signed-off-by:
Hennie Muller <hm@bitlabs.co.za> Link: https://lore.kernel.org/r/20190721125259.13990-1-hm@bitlabs.co.za Signed-off-by:
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- Aug 03, 2019
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Masahiro Yamada authored
Refactor gpiochip_allocate_mask() slightly by using bitmap_alloc(). I used bitmap_free() for the corresponding free parts. Actually, bitmap_free() is a wrapper of kfree(), but I did this for consistency. Signed-off-by:
Masahiro Yamada <yamada.masahiro@socionext.com> Link: https://lore.kernel.org/r/20190718065101.26994-1-yamada.masahiro@socionext.com Reviewed-by:
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Song Hui authored
There is a device specify register(named GPIO_IBE) on ls1028a need to enable in initial stage. Signed-off-by:
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- Aug 01, 2019
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Stephen Boyd authored
The recent refactoring to break out OF code to its own file contained a bug letting the need_valid_mask be overridden by the need of the device tree range check, and if there were no ranges, but device tree was active and the reserved GPIO used in another way, things likely crash. Cc: Mark Brown <broonie@kernel.org> Cc: Bjorn Andersson <bjorn.andersson@linaro.org> Cc: Stephen Boyd <swboyd@chromium.org> Fixes: f626d6df ("gpio: of: Break out OF-only code") Reported-by:
Mark Brown <broonie@kernel.org> Suggested-by:
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- Jul 31, 2019
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Andy Shevchenko authored
The API, which belongs to GPIO library, is foreign to ACPI headers. Earlier we moved out I²C out of the latter, and now it's time for acpi_dev_add_driver_gpios() et al. For time being the acpi_gpio_get_irq_resource() and acpi_dev_gpio_irq_get() are left untouched as they need more thought about. Note, it requires uninline acpi_dev_remove_driver_gpios() to keep purity of consumer.h. Cc: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com> Cc: Liam Girdwood <liam.r.girdwood@linux.intel.com> Cc: Jie Yang <yang.jie@linux.intel.com> Cc: Mark Brown <broonie@kernel.org> Cc: alsa-devel@alsa-project.org (moderated list:INTEL ASoC DRIVERS) Signed-off-by:
Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://lore.kernel.org/r/20190730104337.21235-3-andriy.shevchenko@linux.intel.com Signed-off-by:
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Andy Shevchenko authored
This is a follow up to the commit f626d6df ("gpio: of: Break out OF-only code") which broke down OF parts of GPIO library. Here we do the similar to ACPI. Signed-off-by:
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