- Aug 19, 2023
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Chengfeng Ye authored
As &chip->pm_irq_lock is acquired by pm8xxx_irq_handler() under irq context, other process context code should disable irq before acquiring the lock. Since .irq_set_type and .irq_get_irqchip_state callbacks are generally executed from process context without irq disabled by default, the same lock acquision should disable irq. Possible deadlock scenario pm8xxx_irq_set_type() -> pm8xxx_config_irq() -> spin_lock(&chip->pm_irq_lock) <irq interrupt> -> pm8xxx_irq_handler() -> pm8xxx_irq_master_handler() -> pm8xxx_irq_block_handler() -> pm8xxx_read_block_irq() -> spin_lock(&chip->pm_irq_lock) (deadlock here) This flaw was found using an experimental static analysis tool we are developing for irq-related deadlock. Fix the potential deadlock by spin_lock_irqsave(). Signed-off-by:Chengfeng Ye <dg573847474@gmail.com> Reviewed-by:
Bjorn Andersson <quic_bjorande@quicinc.com> Link: https://lore.kernel.org/r/20230720071330.50382-1-dg573847474@gmail.com Signed-off-by:
Lee Jones <lee@kernel.org>
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Krzysztof Kozlowski authored
Document qcom,pmc8180 and qcom,pmc8180c compatibles already used in DTS: sc8180x-primus.dtb: pmic@1: compatible:0: 'qcom,pmc8180' is not one of ... Signed-off-by:
Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Acked-by:
Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/20230720083525.73622-1-krzysztof.kozlowski@linaro.org Signed-off-by:
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YueHaibing authored
Since commit b0e84624 ("mfd: db8500-prcmu: Remove dead code for a non-existing config") these inline helpers also no need any more. Signed-off-by:
YueHaibing <yuehaibing@huawei.com> Link: https://lore.kernel.org/r/20230720143738.13996-1-yuehaibing@huawei.com Signed-off-by:
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Biju Das authored
When (MFD) RZ_MTU3=m and PWM_RZ_MTU3=y, It hits the below error aarch64-linux-gnu-ld: rz-mtu3.c:(.text+0x544): undefined reference to `mfd_remove_devices' Fix this issue by selecting MFD_CORE. Reported-by:
Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Closes: https://lore.kernel.org/linux-pwm/20230718090023.wo6m6ffzaifgctkj@pengutronix.de/ Suggested-by:
Biju Das <biju.das.jz@bp.renesas.com> Link: https://lore.kernel.org/r/20230718134314.118333-1-biju.das.jz@bp.renesas.com Signed-off-by:
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Rob Herring authored
The DT of_device.h and of_platform.h date back to the separate of_platform_bus_type before it as merged into the regular platform bus. As part of that merge prepping Arm DT support 13 years ago, they "temporarily" include each other. They also include platform_device.h and of.h. As a result, there's a pretty much random mix of those include files used throughout the tree. In order to detangle these headers and replace the implicit includes with struct declarations, users need to explicitly include the correct includes. Signed-off-by:
Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20230714174731.4059811-1-robh@kernel.org Signed-off-by:
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Mark Brown authored
The maple tree register cache is based on a much more modern data structure than the rbtree cache and makes optimisation choices which are probably more appropriate for modern systems than those made by the rbtree cache. In v6.5 it has also acquired the ability to generate multi-register writes in sync operations, bringing performance up to parity with the rbtree cache there. Update the wm8998 driver to use the more modern data structure. Signed-off-by:
Mark Brown <broonie@kernel.org> Link: https://lore.kernel.org/r/20230713-mfd-cirrus-maple-v1-11-16dacae402a8@kernel.org Signed-off-by:
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Mark Brown authored
The maple tree register cache is based on a much more modern data structure than the rbtree cache and makes optimisation choices which are probably more appropriate for modern systems than those made by the rbtree cache. In v6.5 it has also acquired the ability to generate multi-register writes in sync operations, bringing performance up to parity with the rbtree cache there. Update the wm8997 driver to use the more modern data structure. Signed-off-by:
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Mark Brown authored
The maple tree register cache is based on a much more modern data structure than the rbtree cache and makes optimisation choices which are probably more appropriate for modern systems than those made by the rbtree cache. In v6.5 it has also acquired the ability to generate multi-register writes in sync operations, bringing performance up to parity with the rbtree cache there. Update the wm8994 driver to use the more modern data structure. Signed-off-by:
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Mark Brown authored
The maple tree register cache is based on a much more modern data structure than the rbtree cache and makes optimisation choices which are probably more appropriate for modern systems than those made by the rbtree cache. In v6.5 it has also acquired the ability to generate multi-register writes in sync operations, bringing performance up to parity with the rbtree cache there. Update the wm5110 driver to use the more modern data structure. Signed-off-by:
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Mark Brown authored
The maple tree register cache is based on a much more modern data structure than the rbtree cache and makes optimisation choices which are probably more appropriate for modern systems than those made by the rbtree cache. In v6.5 it has also acquired the ability to generate multi-register writes in sync operations, bringing performance up to parity with the rbtree cache there. Update the wm5102 driver to use the more modern data structure. Signed-off-by:
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Mark Brown authored
The maple tree register cache is based on a much more modern data structure than the rbtree cache and makes optimisation choices which are probably more appropriate for modern systems than those made by the rbtree cache. In v6.5 it has also acquired the ability to generate multi-register writes in sync operations, bringing performance up to parity with the rbtree cache there. Update the cs47l92 driver to use the more modern data structure. Signed-off-by:
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Mark Brown authored
The maple tree register cache is based on a much more modern data structure than the rbtree cache and makes optimisation choices which are probably more appropriate for modern systems than those made by the rbtree cache. In v6.5 it has also acquired the ability to generate multi-register writes in sync operations, bringing performance up to parity with the rbtree cache there. Update the cs47l90 driver to use the more modern data structure. Signed-off-by:
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Mark Brown authored
The maple tree register cache is based on a much more modern data structure than the rbtree cache and makes optimisation choices which are probably more appropriate for modern systems than those made by the rbtree cache. In v6.5 it has also acquired the ability to generate multi-register writes in sync operations, bringing performance up to parity with the rbtree cache there. Update the cs47l85 driver to use the more modern data structure. Signed-off-by:
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Mark Brown authored
The maple tree register cache is based on a much more modern data structure than the rbtree cache and makes optimisation choices which are probably more appropriate for modern systems than those made by the rbtree cache. In v6.5 it has also acquired the ability to generate multi-register writes in sync operations, bringing performance up to parity with the rbtree cache there. Update the cs47l35 driver to use the more modern data structure. Signed-off-by:
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Mark Brown authored
The maple tree register cache is based on a much more modern data structure than the rbtree cache and makes optimisation choices which are probably more appropriate for modern systems than those made by the rbtree cache. In v6.5 it has also acquired the ability to generate multi-register writes in sync operations, bringing performance up to parity with the rbtree cache there. Update the cs47l24 driver to use the more modern data structure. Signed-off-by:
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Mark Brown authored
The maple tree register cache is based on a much more modern data structure than the rbtree cache and makes optimisation choices which are probably more appropriate for modern systems than those made by the rbtree cache. In v6.5 it has also acquired the ability to generate multi-register writes in sync operations, bringing performance up to parity with the rbtree cache there. Update the cs47l15 driver to use the more modern data structure. Signed-off-by:
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Krzysztof Kozlowski authored
Cleanup bindings dropping unneeded quotes. Once all these are fixed, checking for this can be enabled in yamllint. Also absolute path starting with /schemas is preferred. Signed-off-by:
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Konrad Dybcio authored
Now that it's been converted to YAML, reference the PM8916 wcd codec schema. Signed-off-by:
Konrad Dybcio <konrad.dybcio@linaro.org> Reviewed-by:
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Mark Brown authored
The maple tree register cache is based on a much more modern data structure than the rbtree cache and makes optimisation choices which are probably more appropriate for modern systems than those made by the rbtree cache. In v6.5 it has also acquired the ability to generate multi-register writes in sync operations, bringing performance up to parity with the rbtree cache there. Update the axp20x driver to use the more modern data structure, really it should have been fine even without the most recent round of updates. Signed-off-by:
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Manikandan Muralidharan authored
Add new compatible string for the XLCD controller on sam9x75 variant of the SAM9X7 SoC family. The XLCD controller in sam9x75 variant supports interfacing with LVDS and MIPI-DSI and parallel port RGB. Signed-off-by:
Manikandan Muralidharan <manikandan.m@microchip.com> Acked-by:
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Biju Das authored
Modified Kconfig to enable module build support for RZ/G2L MTU3a driver. While at it, added module.h header file. Signed-off-by:
Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/20230711092841.119161-1-biju.das.jz@bp.renesas.com Signed-off-by:
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Linus Walleij authored
This converts the STMPE MFD device tree bindings to the YAML schema. Reference the existing schema for the ADC, just define the other subnode schemas directly in the MFD schema. Add two examples so we have examples covering both the simple GPIO expander and the more complex with ADC and touchscreen. Some in-tree users do not follow the naming conventions for nodes so these DTS files need to be augmented to use proper node names like "adc", "pwm", "gpio", "keyboard-controller" etc before the bindings take effect on them. Signed-off-by:
Linus Walleij <linus.walleij@linaro.org> Acked-by:
Dmitry Torokhov <dmitry.torokhov@gmail.com> Reviewed-by:
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Yangtao Li authored
Use devm_platform_ioremap_resource() to simplify code. Signed-off-by:
Yangtao Li <frank.li@vivo.com> Link: https://lore.kernel.org/r/20230706113939.1178-7-frank.li@vivo.com Signed-off-by:
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Yangtao Li authored
Convert platform_get_resource(), devm_ioremap_resource() to a single call to devm_platform_get_and_ioremap_resource(), as this is exactly what this function does. Signed-off-by:
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Yangtao Li authored
Use devm_platform_ioremap_resource() to simplify code. Signed-off-by:
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Yangtao Li authored
Use devm_platform_ioremap_resource() to simplify code. Signed-off-by:
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Yangtao Li authored
Convert platform_get_resource(), devm_ioremap_resource() to a single call to devm_platform_get_and_ioremap_resource(), as this is exactly what this function does. Signed-off-by:
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Yangtao Li authored
Use devm_platform_ioremap_resource() to simplify code. Signed-off-by:
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Yangtao Li authored
Use devm_platform_ioremap_resource() to simplify code. Signed-off-by:
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Geert Uytterhoeven authored
There is no reason for MFD_RK8XX to be bool, all drivers that depend on it, or that select it, are tristate. Fixes: c20e8c5b ("mfd: rk808: Split into core and i2c") Signed-off-by:
Sebastian Reichel <sebastian.reichel@collabora.com> Tested-by:
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Rohit Agarwal authored
Add compatible for pmic pmx75 used in Snapdragon series. Signed-off-by:
Rohit Agarwal <quic_rohiagar@quicinc.com> Acked-by:
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Rohit Agarwal authored
Add compatible for pmic pm7550ba used in Snapdragon series. Signed-off-by:
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Andy Shevchenko authored
The kernel already has a helper to print a hexdump of a small buffer via pointer extension. Use that instead of open coded variant. In long term it helps to kill pr_cont() or at least narrow down its use. Signed-off-by:
Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://lore.kernel.org/r/20230703140923.2840-1-andriy.shevchenko@linux.intel.com Signed-off-by:
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Lee Jones authored
Immutable branch between MFD, Pinctrl and soundwire due for the v6.6 merge window Immutable branch between MFD and Regulator due for the v6.6 merge window
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Andre Werner authored
This commit prepares a following commit for the regulator part of the MFD. The driver should support different device chips that differ in their register definitions, for instance to control LDOA1 and SWB2. So it is necessary to use a dedicated regulator description for a specific device variant. Thus, the content from DEVICEID Register 1 is used to choose a dedicated configuration between the different device variants. Signed-off-by:
Andre Werner <andre.werner@systec-electronic.com> Link: https://lore.kernel.org/r/20230818083721.29790-2-andre.werner@systec-electronic.com Signed-off-by:
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- Aug 17, 2023
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Charles Keepax authored
The CS42L43 is an audio CODEC with integrated MIPI SoundWire interface (Version 1.2.1 compliant), I2C, SPI, and I2S/TDM interfaces designed for portable applications. It provides a high dynamic range, stereo DAC for headphone output, two integrated Class D amplifiers for loudspeakers, and two ADCs for wired headset microphone input or stereo line input. PDM inputs are provided for digital microphones. Add a basic pinctrl driver which supports driver strength for the various pins, gpios, and pinmux for the 2 multi-function pins. Reviewed-by:
Charles Keepax <ckeepax@opensource.cirrus.com> Link: https://lore.kernel.org/r/20230804104602.395892-5-ckeepax@opensource.cirrus.com Signed-off-by:
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Charles Keepax authored
The CS42L43 is an audio CODEC with integrated MIPI SoundWire interface (Version 1.2.1 compliant), I2C, SPI, and I2S/TDM interfaces designed for portable applications. It provides a high dynamic range, stereo DAC for headphone output, two integrated Class D amplifiers for loudspeakers, and two ADCs for wired headset microphone input or stereo line input. PDM inputs are provided for digital microphones. The MFD component registers and initialises the device and provides PM/system power management. Signed-off-by:
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Charles Keepax authored
The CS42L43 is an audio CODEC with integrated MIPI SoundWire interface (Version 1.2.1 compliant), I2C, SPI, and I2S/TDM interfaces designed for portable applications. It provides a high dynamic range, stereo DAC for headphone output, two integrated Class D amplifiers for loudspeakers, and two ADCs for wired headset microphone input or stereo line input. PDM inputs are provided for digital microphones. Add a YAML DT binding document for this device. Reviewed-by:
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Lucas Tanure authored
Currently the in-band alerts for SoundWire peripherals can only be communicated to the driver through the interrupt_callback function. This however is slightly inconvenient for devices that wish to share IRQ handling code between SoundWire and I2C/SPI, the later would normally register an IRQ handler with the IRQ subsystem. However there is no reason the SoundWire in-band IRQs can not also be communicated as an actual IRQ to the driver. Add support for SoundWire peripherals to register a normal IRQ handler to receive SoundWire in-band alerts, allowing code to be shared across control buses. Note that we allow users to use both the interrupt_callback and the IRQ handler, this is useful for devices which must clear additional chip specific SoundWire registers that are not a part of the normal IRQ flow, or the SoundWire specification. Signed-off-by:
Lucas Tanure <tanureal@opensource.cirrus.com> Reviewed-by:
Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com> Acked-by:
Bard Liao <yung-chuan.liao@linux.intel.com> Acked-by:
Vinod Koul <vkoul@kernel.org> Signed-off-by:
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- Jul 10, 2023
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Linus Torvalds authored
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