- Jul 11, 2022
-
-
Arnd Bergmann authored
Merge tag 'tegra-for-5.20-arm-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/dt ARM: tegra: Device tree changes for v5.20-rc1 Two minor fixes to help reduce the noise from the DT validation tooling. * tag 'tegra-for-5.20-arm-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux: ARM: tegra: Align gpio-keys node names with dtschema ARM: tegra: Adjust whitespace around '=' Link: https://lore.kernel.org/r/20220708185608.676474-6-thierry.reding@gmail.com Signed-off-by:
Arnd Bergmann <arnd@arndb.de>
-
Arnd Bergmann authored
Merge tag 'tegra-for-5.20-dt-bindings' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/dt dt-bindings: Changes for v5.20-rc1 These changes add clock, reset, memory client and power domain definitions for various devices found on Tegra234 along with a few device tree bindings for new hardware. * tag 'tegra-for-5.20-dt-bindings' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux: dt-bindings: tegra-ccplex-cluster: Remove status from required properties dt-bindings: Add headers for Host1x and VIC on Tegra234 dt-bindings: timer: Add Tegra186 & Tegra234 Timer dt-bindings: arm: tegra: Add NVIDIA Tegra234 CBB 2.0 binding dt-bindings: arm: tegra: Add NVIDIA Tegra194 AXI2APB binding dt-bindings: arm: tegra: Add NVIDIA Tegra194 CBB 1.0 binding dt-bindings: memory: Add Tegra234 MGBE memory clients dt-bindings: Add Tegra234 MGBE clocks and resets dt-bindings: power: Add Tegra234 MGBE power domains dt-bindings: Add headers for Tegra234 GPCDMA Link: https://lore.kernel.org/r/20220708185608.676474-4-thierry.reding@gmail.com Signed-off-by:
-
Arnd Bergmann authored
Merge tag 'sunxi-dt-for-5.20-1' of git://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into arm/dt - whitespace fixes - replaced RTC indexes with constants - gpio-key nodes aligned with dtschema - fixed LED node for Orange Pi Win - added OPP table for R40 CPU and thermal points - updated I2C controller compatibles - added compatibles for MBUS, D1 DE2 clocks, D1 USB - enable internal HMIC bias on Pinephone * tag 'sunxi-dt-for-5.20-1' of git://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux: arm64: dts: allwinner: pinephone: Enable internal HMIC bias dt-bindings: arm: sunxi: Add several MBUS compatibles dt-bindings: arm: sunxi: Default to the full MBUS binding dt-bindings: usb: generic-ohci: Add Allwinner D1 compatible dt-bindings: usb: generic-ehci: Add Allwinner D1 compatible dt-bindings: usb: sunxi-musb: Add Allwinner D1 compatible arm64: dts: allwinner: a100: Update I2C controller fallback dt-bindings: i2c: mv64xxx: Add variants with offload support ARM: dts: sun8i-r40: Add thermal trip points/cooling maps ARM: dts: sun8i-r40: add opp table for cpu ARM: dts: sun8i-r40: Add "cpu-supply" node for sun8i-r40 based board arm64: dts: allwinner: a64: orangepi-win: Fix LED node name dt-bindings: clock: Add compatible for D1 DE2 clocks ARM: dts: allwinner: align gpio-key node names with dtschema arm64: dts: allwinner: align gpio-key node names with dtschema arm64: dts: allwinner: Use constants for RTC clock indexes ARM: dts: sunxi: Use constants for RTC clock indexes ARM: dts: sun5i: adjust whitespace around '=' Link: https://lore.kernel.org/r/Ysh8qRH0Q5Xv9Qhf@kista.localdomain Signed-off-by:
-
Arnd Bergmann authored
Merge tag 'v5.19-next-dts64' of git://git.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux into arm/dt Some fixes to follow DT spec. MT6795: - Big update of supported devices: cpu-map, L2 cache, PMU, watchdog, MediaTek timer, Arm CCI, pincontroller MT7622: - Change WPS button to active low MT8173: - Add infracfg property to the IOMMU node (also for mt2712e) - Add optional AXI clock to NOR Flash node MT8183: - add Medaitek CCI support - add support for Smart Voltag Scaling (SVS) - add GCE support to mutex - Add panel default rotation to some chromebooks - Add power supply to power domain so that SRAM for the GPU has power MT8186: - compatible added, DTS not yet ready. MT8192: - Add support for Acer Chromebook 514 MT8195: - Add efuse node - Enable USB wakeup support - Add support for Acer Chromebook Spin 513 * tag 'v5.19-next-dts64' of git://git.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux: (66 commits) arm64: dts: mt8183: Add panel rotation arm64: dts: mt7622: fix BPI-R64 WPS button arm64: dts: mt8173: Fix nor_flash node arm64: dts: mediatek: cherry: Add I2C-HID touchscreen on I2C4 arm64: dts: mediatek: cherry: Enable support for the SPI NOR flash arm64: dts: mediatek: cherry: Enable MT6360 sub-pmic on I2C7 arm64: dts: mediatek: cherry: Enable T-PHYs and USB XHCI controllers arm64: dts: mediatek: cherry: Enable I2C and SPI controllers arm64: dts: mediatek: cherry: Document gpios and add default pin config arm64: dts: mediatek: cherry: Add support for internal eMMC storage arm64: dts: mediatek: cherry: Assign interrupt line to MT6359 PMIC arm64: dts: mediatek: cherry: Add platform regulators layout and config arm64: dts: mediatek: Introduce MT8195 Cherry platform's Tomato dt-bindings: arm: mediatek: Add MT8195 Cherry Tomato Chromebooks arm64: dts: mediatek: asurada: Add SPI NOR flash memory arm64: dts: mediatek: asurada: Enable SCP arm64: dts: mediatek: asurada: Enable MMC arm64: dts: mediatek: asurada: Add SPMI regulators arm64: dts: mediatek: asurada: Add MT6359 PMIC arm64: dts: mediatek: asurada: Enable PCIe and add WiFi ... Link: https://lore.kernel.org/r/b0d5b584-2693-73b3-79f6-3e2292f006ea@gmail.com Signed-off-by:
-
Arnd Bergmann authored
Merge tag 'v5.19-next-dts32' of git://git.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux into arm/dt Airoha EN7523: - Add clock and PCIe support Several style fixes to comply with DT spec. * tag 'v5.19-next-dts32' of git://git.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux: ARM: dts: mediatek: align gpio-key node names with dtschema ARM: dts: mediatek: adjust whitespace around '=' ARM: dts: Add PCIe support for Airoha EN7523 ARM: dts: add clock support for Airoha EN7523 Link: https://lore.kernel.org/r/63536da6-fbe4-2d96-ab91-ae756cd580c4@gmail.com Signed-off-by:
-
- Jul 09, 2022
-
-
Samuel Holland authored
Revisions 1.0 and 1.1 of the PinePhone mainboard do not have an external resistor connecting HBIAS to MIC2P. Enable the internal resistor to provide the necessary headeset microphone bias. Signed-off-by:
Samuel Holland <samuel@sholland.org> Reviewed-by:
Jernej Skrabec <jernej.skrabec@gmail.com> Signed-off-by:
-
Samuel Holland authored
All of the sunxi SoCs since at least the A33 have a similar structure for the MBUS and DRAM controller, but they all have minor differences in MBUS port assignments and DRAM controller behavior. Give each SoC its own compatible. Signed-off-by:
Rob Herring <robh@kernel.org> Signed-off-by:
-
Samuel Holland authored
Some older SoCs use a deprecated MBUS binding with some clocks missing. Currently, new SoCs must opt in to the complete binding. This should be the default, so new SoCs do not accidentally use the deprecated version. Signed-off-by:
-
- Jul 08, 2022
-
-
Thierry Reding authored
The "status" property is implied to be "okay" if it isn't present, so do not mark it as required. Signed-off-by:
Thierry Reding <treding@nvidia.com> Acked-by:
Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by:
-
Mikko Perttunen authored
Add clock, memory controller, powergate and reset dt-binding headers for Host1x and VIC on Tegra234. Signed-off-by:
Mikko Perttunen <mperttunen@nvidia.com> Acked-by:
-
Kartik authored
The Tegra186 timer provides ten 29-bit timer counters and one 32-bit timestamp counter. The Tegra234 timer provides sixteen 29-bit timer counters and one 32-bit timestamp counter. Each NV timer selects its timing reference signal from the 1 MHz reference generated by USEC, TSC or either clk_m or OSC. Each TMR can be programmed to generate one-shot, periodic, or watchdog interrupts. Signed-off-by:
Kartik <kkartik@nvidia.com> Reviewed-by:
-
Arnd Bergmann authored
Merge tag 'renesas-dt-bindings-for-v5.20-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into arm/dt Renesas DT binding updates for v5.20 (take two) - Miscellaneous fixes and improvements. * tag 'renesas-dt-bindings-for-v5.20-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel: dt-bindings: hwinfo: renesas,prr: move from soc directory MAINTAINERS: Add Renesas SoC DT bindings to Renesas Architecture sections Link: https://lore.kernel.org/r/cover.1657278851.git.geert+renesas@glider.be Signed-off-by:
-
Arnd Bergmann authored
Merge tag 'renesas-arm-dt-for-v5.20-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into arm/dt Renesas ARM DT updates for v5.20 (take two) - Ethernet MAC and switch support for the RZ/N1 SoC on the RZN1D-DB development board, - AA1024XD12 panel overlay support for the Draak, Ebisu, and Salvator-X(S) development boards, - Miscellaneous fixes and improvements. * tag 'renesas-arm-dt-for-v5.20-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel: arm64: dts: renesas: Add panel overlay for Draak and Ebisu boards arm64: dts: renesas: Add panel overlay for Salvator-X(S) boards arm64: dts: renesas: Prepare AA1024XD12 panel .dtsi for overlay support arm64: dts: renesas: spider-cpu: Fix scif0/scif3 sort order ARM: dts: r9a06g032-rzn1d400-db: Add switch description dt-bindings: net: pcs: add bindings for Renesas RZ/N1 MII converter ARM: dts: r9a06g032: Describe switch ARM: dts: r9a06g032: Describe GMAC2 ARM: dts: r9a06g032: Describe MII converter arm64: dts: renesas: r9a07g054l2-smarc: Correct SoC name in comment ARM: dts: renesas: Fix DA9063 watchdog subnode names arm64: dts: renesas: r8a779m8: Drop operating points above 1.5 GHz Link: https://lore.kernel.org/r/cover.1657278845.git.geert+renesas@glider.be Signed-off-by:
-
Sumit Gupta authored
Add device-tree binding documentation to represent the Control Backbone (CBB) version 2.0 used on Tegra234 SoCs. Signed-off-by:
Sumit Gupta <sumitg@nvidia.com> Reviewed-by:
-
Sumit Gupta authored
Add device-tree binding documentation to represent the AXI2APB bridges used by Control Backbone (CBB) 1.0 on Tegra194 SoCs. All errors for APB slaves are reported as slave error because APB bas single bit to report error. So, CBB driver needs to further check error status registers of all the AXI2APB bridges to find error type. Signed-off-by:
-
Sumit Gupta authored
Add device-tree binding documentation to represent the Control Backbone (CBB) version 1.0 used on Tegra194 SoCs. Signed-off-by:
-
Thierry Reding authored
Add the memory client and stream ID definitions for the MGBE hardware found on Tegra234 SoCs. Signed-off-by:
Bhadram Varka <vbhadram@nvidia.com> Acked-by:
-
Thierry Reding authored
Add the clocks and resets used by the MGBE Ethernet hardware found on Tegra234 SoCs. Signed-off-by:
-
Thierry Reding authored
Add power domain IDs for the four MGBE power partitions found on Tegra234. Signed-off-by:
-
https://github.com/Xilinx/linux-xlnxArnd Bergmann authored
arm64: dts: ZynqMP DT changes for v5.20 - Extend gpio-zynq DT binding (compatible, power-domains, gpio-line-names) - Fix sm-k26 gpio comment - Wire AMS device - Align gpio-keys node names with dtschema * tag 'zynqmp-dt-for-v5.20' of https://github.com/Xilinx/linux-xlnx: arm64: dts: xilinx: align gpio-key node names with dtschema arm64: dts: zynqmp: add AMS driver to device tree dt-bindings: gpio: zynq: Describe gpio-line-names arm64: zynqmp: Fix comment about number of gpio line names dt-bindings: gpio: zynq: Add power-domains dt-bindings: gpio: zynq: Add missing compatible strings Link: https://lore.kernel.org/r/452e8c68-b63b-f4f6-a937-67f65c64a8a0@monstr.eu Signed-off-by:
-
https://github.com/Xilinx/linux-xlnxArnd Bergmann authored
ARM: Zynq DT changes for v5.20 - Align gpio-keys node names with dtschema * tag 'zynq-dt-for-v5.20' of https://github.com/Xilinx/linux-xlnx: ARM: dts: xilinx: align gpio-key node names with dtschema Link: https://lore.kernel.org/r/87d2bd4a-b90d-6396-17c5-c95ac64d17d0@monstr.eu Signed-off-by:
-
- Jul 07, 2022
-
-
Hsin-Yi Wang authored
krane, kakadu, and kodama boards have a default panel rotation. Signed-off-by:
Hsin-Yi Wang <hsinyi@chromium.org> Reviewed-by:
Enric Balletbo i Serra <enric.balletbo@collabora.com> Tested-by:
Matthias Brugger <matthias.bgg@gmail.com>
-
Nick Hainke authored
The bananapi R64 (BPI-R64) experiences wrong WPS button signals. In OpenWrt pushing the WPS button while powering on the device will set it to recovery mode. Currently, this also happens without any user interaction. In particular, the wrong signals appear while booting the device or restarting it, e.g. after doing a system upgrade. If the device is in recovery mode the user needs to manually power cycle or restart it. The official BPI-R64 sources set the WPS button to GPIO_ACTIVE_LOW in the device tree. This setting seems to suppress the unwanted WPS button press signals. So this commit changes the button from GPIO_ACTIVE_HIGH to GPIO_ACTIVE_LOW. The official BPI-R64 sources can be found on https://github.com/BPI-SINOVOIP/BPI-R64-openwrt Fixes: 0b6286dd ("arm64: dts: mt7622: add bananapi BPI-R64 board") Suggested-by:
INAGAKI Hiroshi <musashino.open@gmail.com> Signed-off-by:
Nick Hainke <vincent@systemli.org> Link: https://lore.kernel.org/r/20220630111746.4098-1-vincent@systemli.org Signed-off-by:
-
Xiangsheng Hou authored
Add axi clock since the driver change to DMA mode which need to enable axi clock. And change spi clock to 26MHz as default. Signed-off-by:
Xiangsheng Hou <xiangsheng.hou@mediatek.com> Link: https://lore.kernel.org/r/20220630090157.29486-2-xiangsheng.hou@mediatek.com Signed-off-by:
-
AngeloGioacchino Del Regno authored
This platform carries a HID compatible I2C touchscreen on the i2c4 bus, but it may be at a different address, depending on the board model. Add the node for a touchscreen at 0x10, but enable it only in the final board dts. Signed-off-by:
AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://lore.kernel.org/r/20220704101321.44835-12-angelogioacchino.delregno@collabora.com Signed-off-by:
-
AngeloGioacchino Del Regno authored
This platform has a SPI NOR: enable support for it, completing the storage compartment enablement for the entire platform. Signed-off-by:
Nícolas F. R. A. Prado <nfraprado@collabora.com> Link: https://lore.kernel.org/r/20220704101321.44835-11-angelogioacchino.delregno@collabora.com Signed-off-by:
-
AngeloGioacchino Del Regno authored
All devices of the Cherry platform have a MT6360 sub-pmic, providing two LDOs. Add the required node to enable the PMIC but without regulators yet, as these will be added in a later commit. Signed-off-by:
-
AngeloGioacchino Del Regno authored
Add USB functionality by enabling the required PHYs and the XHCI controllers. This enables all of the supported USB ports on the Cherry boards. Please note that u3phy1 also enables u3port1, which is configured to be a PCI-Express PHY for the second PCIe controller that is found on the MT8195 SoC, which will be enabled in a later commit. Signed-off-by:
-
AngeloGioacchino Del Regno authored
This platform uses eight I2C controllers and one SPI controller: in preparation for enabling devices attached to these controllers, add basic configuration to enable the busses. Signed-off-by:
-
AngeloGioacchino Del Regno authored
Add gpio-line-names to document GPIO names and add the default basic pin configuration to allow lower power operation by setting appropriate state on the unused pins. Signed-off-by:
-
AngeloGioacchino Del Regno authored
Add mtk-sd controller and pin configuration to enable the internal eMMC storage: now it is possible to mount a rootfs located at the internal storage. Signed-off-by:
-
AngeloGioacchino Del Regno authored
To allow MT6359 peripherals to trigger interrupts and the driver to safely handle them, assign the right interrupt line for the Cherry platform to the MT6359 PMIC node. Signed-off-by:
-
AngeloGioacchino Del Regno authored
Add the regulators layout for this platform, including the basic power rails controlled by the EC (and/or always on). Moreover, include the MT6359 PMIC devicetree and add some configuration for its regulators, essential to keep the machine alive after booting. Signed-off-by:
-
AngeloGioacchino Del Regno authored
Introduce the MT8195 Cherry Chromebook platform, including three revisions of Cherry Tomato boards. This basic configuration allows to boot Linux on all board revisions and get a serial console from a ramdisk. Signed-off-by:
-
AngeloGioacchino Del Regno authored
Document board compatibles for the MT8195 Cherry platform's Tomato Chromebooks, at the time of writing composed of four revisions (r1, r2, r3-r4). Signed-off-by:
-
Nícolas F. R. A. Prado authored
Add support for the SPI NOR flash memory present on the Asurada platform. Signed-off-by:
Chen-Yu Tsai <wenst@chromium.org> Link: https://lore.kernel.org/r/20220629155956.1138955-20-nfraprado@collabora.com Signed-off-by:
-
Nícolas F. R. A. Prado authored
Enable support for the SCP co-processor present on MT8192. It is used as part of the video encoding and decoding processes. A region of memory is carved out for its use, and remoteproc setup for communication with the ChromeOS EC. Signed-off-by:
-
Nícolas F. R. A. Prado authored
Enable both MMC controllers present on Asurada. MMC0 is for non-removable internal memory, while MMC1 is an SD card slot. MMC1 isn't used on all machines, but in those cases the CD interrupt is never triggered and thus it is basically as if it was disabled. Signed-off-by:
-
Nícolas F. R. A. Prado authored
The Asurada platform uses regulators from MT6315 PMICs acessible through SPMI. Add support for them. Signed-off-by:
-
Nícolas F. R. A. Prado authored
MT6359 is the primary PMIC present on the Asurada platform. Include its dtsi and configure properties specific for the platform. Signed-off-by:
-
