- May 04, 2022
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Alex Deucher authored
So we can properly clean up if any of the TAs or TMR fails to properly initialize or terminate. This avoids any memory leaks in the error case. Reviewed-by:
Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by:
Alex Deucher <alexander.deucher@amd.com>
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Alex Deucher authored
Make sure we free the memory even if the unload fails. Reviewed-by:
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Alex Deucher authored
Just call the load/unload/init_shared_buf functions directly. Makes the code easier to follow. Reviewed-by:
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Elena Sakhnovitch authored
On Sienna Cichild, not all platforms use PMFW based fan control (ex: fanless systems). On such ASICs fan control by PMFW will be disabled in PPTable. Disable hwmon knobs for fan control also as it is not possible to report or control fan speed on such platforms through driver. v3: FeaturesToRun casted as uint64_t Signed-off-by:
Elena Sakhnovitch <elena.sakhnovitch@amd.com> Reviewed-by:
Lijo Lazar <lijo.lazar@amd.com> Signed-off-by:
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Hawking Zhang authored
initialize smuio callback for soc21 Signed-off-by:
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Alex Deucher authored
Memory allocations should be done in sw_init. hw_init should just be hardware programming needed to initialize the IP block. This is how most other IP blocks work. Move the GPU memory allocations from psp hw_init to psp sw_init and move the memory free to sw_fini. This also fixes a potential GPU memory leak if psp hw_init fails. Reviewed-by:
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Hawking Zhang authored
add smuio v13_0_6 callbacks to support read rom image Signed-off-by:
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Hawking Zhang authored
Add smuio v13_0_6 register offset and shift masks header files (Hawking) Signed-off-by:
Likun Gao <Likun.Gao@amd.com> Signed-off-by:
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Elena Sakhnovitch authored
Clean up trailing space in file sienna_cichlid_ppt.c. Signed-off-by:
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Likun Gao authored
Enable HDP v6 on asics where it is present. Signed-off-by:
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Likun Gao authored
Unify hdp related function into hdp structure for hdp version 6. V2: Remove hdp invalidate function as hdp v6 doesn't have read cache. Signed-off-by:
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Philip Yang authored
To cleanup the BOs of bo_list which have got user pages. Signed-off-by:
Philip Yang <Philip.Yang@amd.com> Reviewed-by:
Christian König <christian.koenig@amd.com> Reviewed-by:
Felix Kuehling <Felix.Kuehling@amd.com> Signed-off-by:
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Hawking Zhang authored
Add hdp v6_0_0 register offset and shift masks header files (Hawking) Signed-off-by:
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pengfuyuan authored
Fix spelling typo in comments. Signed-off-by:
pengfuyuan <pengfuyuan@kylinos.cn> Signed-off-by:
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Minghao Chi authored
Simplify the return expression. Reported-by:
Zeal Robot <zealci@zte.com.cn> Signed-off-by:
Minghao Chi <chi.minghao@zte.com.cn> Signed-off-by:
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Minghao Chi authored
Simplify the return expression. Reported-by:
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Likun Gao authored
Enable IH v6 on asics where it is present. Signed-off-by:
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Stanley.Yang authored
This adds ih v6_0 ip block support. IH is the interrupt handler. Signed-off-by:
Stanley.Yang <Stanley.Yang@amd.com> Reviewed-by:
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Likun Gao authored
Only V13.0.2 on SMU v13 will get 0 based max level from fw and increment by one, other ASIC will not need for this. V2: replace the asic_type check with ip versioning check. Signed-off-by:
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Stanley Yang authored
Define soc21 ih clientid Signed-off-by:
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Hawking Zhang authored
Add osssys v6_0_0 register offset and shift masks header files (Hawking) Signed-off-by:
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Likun Gao authored
Enable NBIO 4.3 on asics where it is present. Signed-off-by:
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Stanley.Yang authored
This adds nbio v4_3_0 ip block support Changed from v1: use WREG32_SOC15/RREG32_SOC15 instead of WREG32_PCIE/RREG32_PCIE remove the programming of PCIE_CONFIG_CNTL Signed-off-by:
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Hawking Zhang authored
Add nbio v4_3_0 register offset and shift masks header files (Hawking) Signed-off-by:
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Likun Gao authored
Enable soc21 common support on asics where it is present. Signed-off-by:
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Harry Wentland authored
A faulty receiver might report an erroneous channel count. We should guard against reading beyond AUDIO_CHANNELS_COUNT as that would overflow the dpcd_pattern_period array. Signed-off-by:
Harry Wentland <harry.wentland@amd.com> Reviewed-by:
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- Apr 29, 2022
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Philip Yang authored
Otherwise userspace resubmit the BOs again will trigger kernel WARNING and fail the command submission. Signed-off-by:
Robert Święcki <robert@swiecki.net> Reviewed-by:
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Candice Li authored
Remove the redundant codes to fix build warning when CONFIG_DEBUG_FS is disabled. Reported-by:
Randy Dunlap <rdunlap@infradead.org> Signed-off-by:
Candice Li <candice.li@amd.com> Reviewed-by:
Yang Wang <kevinyang.wang@amd.com> Signed-off-by:
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Stanley.Yang authored
This adds soc21 common ip block support Changed from v1: Switch WREG32/RREG32_PCIE to use indirect reg access helper for sco15 and onwards Acked-by:
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Stanley.Yang authored
add new write field macro to handle soc21 registers with reg prefix Acked-by:
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Hawking Zhang authored
Add nbio callback func used to query rom offset. Used to query the rom offset for fetching the vbios. Acked-by:
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Hawking Zhang authored
Add gc v11_0_0 register offset and shift masks header files (Hawking) Acked-by:
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Hawking Zhang authored
Add mp v13_0_0 register offset and shift masks header files (Hawking) Acked-by:
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Hawking Zhang authored
Handle atom_gfx_info_v3_0 structure. Signed-off-by:
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Hawking Zhang authored
Handle newer gc info tables. Signed-off-by:
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Hawking Zhang authored
atomfirmware table used for newer gfx IPs. Signed-off-by:
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Hawking Zhang authored
vram_info table provides various vram information including vram_vendor, vram_type, vram_width, etc. v2: correct the calculation of vram_width Signed-off-by:
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Hawking Zhang authored
To support query vram_width, vram_type, vram_vendor information Signed-off-by:
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Hawking Zhang authored
Some initial settings now are not available from the atom data table. The assumption that !ps[0] || !ps[1] in amdgpu_atom_asic_init is not valid. In addition, driver needs to strictly follow atomfirmware structure (asic_init_parameters) to initialize parameters used to execute asic_init function, otherwise, the execution of asic_init would fail. This shall be applicable to all soc15 adapters,but let make the transition on soc21 first. Signed-off-by:
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Hawking Zhang authored
Add helper function to execute atomfirmware asic_init from the cmd table Signed-off-by:
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