- Nov 21, 2022
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Linus Walleij authored
Merge tag 'renesas-pinctrl-for-v6.2-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers into devel pinctrl: renesas: Updates for v6.2 - Use dynamic GPIO base on combined pincctrl/gpio controllers on SH/R-Mobile SoCs, - Miscellaneous improvements.
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- Nov 18, 2022
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Linus Walleij authored
Merge tag 'intel-pinctrl-v6.2-1' of git://git.kernel.org/pub/scm/linux/kernel/git/pinctrl/intel into devel intel-pinctrl for v6.2-1 * Add Intel Moorefield pin control driver * Deduplicate COMMUNITY() macro in the Intel pin control drivers * Switch Freescale GPIO driver to use fwnode instead of of_node * Miscellaneous clenups here and there The following is an automated git shortlog grouped by driver: alderlake: - Deduplicate COMMUNITY macro code cannonlake: - Deduplicate COMMUNITY macro code device property: - Introduce fwnode_device_is_compatible() helper icelake: - Deduplicate COMMUNITY macro code intel: - Add Intel Moorefield pin controller support - Use temporary variable for struct device - Use str_enable_disable() helper merrifield: - Use temporary variable for struct device qcom: - lpass-lpi: Add missed bitfield.h soc: - fsl: qe: Switch to use fwnode instead of of_node sunrisepoint: - Deduplicate COMMUNITY macro code tigerlake: - Deduplicate COMMUNITY macro code
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Geert Uytterhoeven authored
Since commit 502df79b ("gpiolib: Warn on drivers still using static gpiobase allocation") in gpio/for-next, one or more warnings are printed during boot on systems where the pin controller also provides GPIO functionality: gpio gpiochip0: Static allocation of GPIO base is deprecated, use dynamic allocation. Fix this for ARM-based SH/R-Mobile SoCs by: 1. Taking into account a non-zero GPIO base in the various GPIO chip callbacks, 2. Switching to dynamic allocation of the GPIO base when support for legacy function GPIOs is not enabled. On SuperH SoCs using legacy function GPIOs, the GPIO bases of the GPIO controller and the GPIO function controller must not be changed, as all board files rely on the fixed GPIO_* and GPIO_FN_* definitions provided by the various <cpu/sh*.h> header files. Signed-off-by:
Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/df2cf30ac4c3cbee726799f32b727c1ebe62819c.1668000684.git.geert+renesas@glider.be
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- Nov 17, 2022
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Niyas Sait authored
PIN_CONFIG_BIAS_PULL_DOWN and PIN_CONFIG_BIAS_PULL_UP values can be custom or an SI unit such as ohms Signed-off-by:
Niyas Sait <niyas.sait@linaro.org> Link: https://lore.kernel.org/r/20221115175415.650690-3-niyas.sait@linaro.org Signed-off-by:
Linus Walleij <linus.walleij@linaro.org>
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Yinbo Zhu authored
Add the Loongson-2 pinctrl binding with DT schema format using json-schema. Signed-off-by:
Yinbo Zhu <zhuyinbo@loongson.cn> Link: https://lore.kernel.org/r/20221114024942.8111-2-zhuyinbo@loongson.cn Reviewed-by:
Rob Herring <robh@kernel.org> Signed-off-by:
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zhanghongchen authored
The Loongson-2 SoC has a few pins that can be used as GPIOs or take multiple other functions. Add a driver for the pinmuxing. There is currently no support for GPIO pin pull-up and pull-down. Signed-off-by:
zhanghongchen <zhanghongchen@loongson.cn> Co-developed-by:
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Sebastian Reichel authored
Apparently RK3588 pinctrl has 13 different device functions, but dt-validate only checks for pin configuration being referenced so I did not notice. Fixes: ed1f77b7 ("dt-bindings: pinctrl: rockchip: increase max amount of device functions") Signed-off-by:
Sebastian Reichel <sebastian.reichel@collabora.com> Acked-by:
Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Acked-by:
Heiko Stuebner <heiko@sntech.de> Link: https://lore.kernel.org/r/20221021172012.87954-1-sebastian.reichel@collabora.com Signed-off-by:
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Linus Walleij authored
Merge tag 'qcom-pinctrl-6.2-2' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-dt into devel Qualcomm pinctrl Devicetree bindings changes for v6.2, part two Continuation of refactoring and improving Qualcomm pin controller bindings: 1. Narrow compatible combinations in PMIC MPP. 2. Convert several bindings from TXT to DT schema format: QCS404, IPQ8074, MSM8660, MSM8916, MSM8960 and MSM8976.
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Neil Armstrong authored
This converts the Semtech SX150Xq bindings to dt-schemas, add necessary bindings documentation to cover all differences between HW variants and current bindings usage. Signed-off-by:
Neil Armstrong <neil.armstrong@linaro.org> Reviewed-by:
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- Nov 16, 2022
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Krzysztof Kozlowski authored
Convert Qualcomm MSM8976 pin controller bindings to DT schema. Keep the parsing of pin configuration subnodes consistent with other Qualcomm schemas (children named with '-state' suffix, their children with '-pins'). Changes during conversion: update the list of non-mux pins (like sdc1) to match Linux driver. Reviewed-by:
Marijn Suijten <marijn.suijten@somainline.org> Link: https://lore.kernel.org/r/20221110085230.15108-1-krzysztof.kozlowski@linaro.org Signed-off-by:
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- Nov 15, 2022
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Biju Das authored
This patch removes the unnecessary check from rzg2l_dt_node_to_map() as the ret value is already negative. Signed-off-by:
Biju Das <biju.das.jz@bp.renesas.com> Link: https://lore.kernel.org/r/20221108191309.3908415-1-biju.das.jz@bp.renesas.com Signed-off-by:
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Biju Das authored
This patch removes the unnecessary check from rzv2m_dt_node_to_map() as the ret value is already negative. Signed-off-by:
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- Nov 14, 2022
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Andy Shevchenko authored
First of all, while for_each_maps() is private to pin control subsystem it's still better to have it put into a namespace. Besides that, users are not relying on iterator variable, so hide it inside for-loop. Signed-off-by:
Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://lore.kernel.org/r/20221111120048.42968-1-andriy.shevchenko@linux.intel.com Signed-off-by:
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Thierry Reding authored
Tegra194 has two separate instances of the pin controller, one called AON (in the always-on domain) and another called "main". Instead of treating them as a single pin controller, split them up into two separate controllers. Doing so allows the mapping between the pinmux and GPIO controllers to be trivial identity mappings and more cleanly separates the AON from the main IP blocks. Signed-off-by:
Thierry Reding <treding@nvidia.com> Link: https://lore.kernel.org/r/20221104142345.1562750-4-thierry.reding@gmail.com Signed-off-by:
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Krzysztof Kozlowski authored
Convert Qualcomm MSM8960 pin controller bindings to DT schema. Keep the parsing of pin configuration subnodes consistent with other Qualcomm schemas (children named with '-state' suffix, their children with '-pins'). Reviewed-by:
Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221109105140.48196-1-krzysztof.kozlowski@linaro.org Signed-off-by:
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Krzysztof Kozlowski authored
Convert Qualcomm IPQ8074 pin controller bindings to DT schema. Keep the parsing of pin configuration subnodes consistent with other Qualcomm schemas (children named with '-state' suffix, their children with '-pins'). Reviewed-by:
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- Nov 11, 2022
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Krzysztof Kozlowski authored
Convert Qualcomm MSM8660 pin controller bindings to DT schema. Keep the parsing of pin configuration subnodes consistent with other Qualcomm schemas (children named with '-state' suffix, their children with '-pins'). Reviewed-by:
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- Nov 10, 2022
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Andy Shevchenko authored
It's slightly better to read when compound literal data and type are separated by a space. Signed-off-by:
Basavaraj Natikar <Basavaraj.Natikar@amd.com> Link: https://lore.kernel.org/r/20221109152356.39868-1-andriy.shevchenko@linux.intel.com Signed-off-by:
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Wei Li authored
Rename the header guard of mt6795-pinfunc.h from __DTS_MT8173_PINFUNC_H to __DTS_MT6795_PINFUNC_H what corresponding with the file name. Fixes: 81557a71 ("dt-bindings: pinctrl: Add MediaTek MT6795 pinctrl bindings") Signed-off-by:
Wei Li <liwei391@huawei.com> Link: https://lore.kernel.org/r/20221108094529.3597920-1-liwei391@huawei.com Signed-off-by:
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Jesse Taube authored
The pad names for the i.MXRT1050 were incorrect. Fix them. Cc: Giulio Benetti <giulio.benetti@benettiengineering.com> Signed-off-by:
Jesse Taube <Mr.Bossman075@gmail.com> Link: https://lore.kernel.org/r/20221107071511.2764628-7-Mr.Bossman075@gmail.com Signed-off-by:
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Jesse Taube authored
Add i.MXRT1170 compatible string to Documentation. Cc: Giulio Benetti <giulio.benetti@benettiengineering.com> Signed-off-by:
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Jesse Taube authored
Add i.MXRT1170 compatible string to Documentation. Cc: Giulio Benetti <giulio.benetti@benettiengineering.com> Signed-off-by:
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Jesse Taube authored
Both the i.MXRT1170 and 1050 have the same GPT timer as "fsl,imx6dl-gpt" Add i.MXRT to the compatible list. Cc: Giulio Benetti <giulio.benetti@benettiengineering.com> Signed-off-by:
Krzysztof Kozlowski <krzk@kernel.org> Link: https://lore.kernel.org/r/20221107071511.2764628-4-Mr.Bossman075@gmail.com Signed-off-by:
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Jesse Taube authored
Reference to pinfunc.h was wrong. Fix it. Cc: Giulio Benetti <giulio.benetti@benettiengineering.com> Signed-off-by:
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Jesse Taube authored
Recently the imxrt1050 was added but the cpu compatible node wasn't added. Add both i.MXRT1170 and 1050 compatibles to fsl.yaml. Cc: Giulio Benetti <giulio.benetti@benettiengineering.com> Signed-off-by:
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Sam Shih authored
Commit fb34a9ae ("pinctrl: mediatek: support rsel feature") add SoC specify 'pull_type' attribute for bias configuration. This patch add pull_type attribute to pinctrl-mt7986.c, and make bias_set_combo and bias_get_combo available to mediatek MT7986 SoC. Signed-off-by:
Sam Shih <sam.shih@mediatek.com> Signed-off-by:
Frank Wunderlich <frank-w@public-files.de> Reviewed-by:
AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://lore.kernel.org/r/20221106080114.7426-7-linux@fw-web.de Signed-off-by:
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Sam Shih authored
Commit fb34a9ae ("pinctrl: mediatek: support rsel feature") introduced SoC specify 'pull_type' attribute to mtk_pinconf_bias_set_combo and mtk_pinconf_bias_get_combo, and make the functions able to support almost all Mediatek SoCs that use pinctrl-mtk-common-v2.c. This patch enables pinctrl_moore to support these functions. Signed-off-by:
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Sam Shih authored
Correct the bias-pull-up, bias-pull-down and bias-disable register offset of mt7986 pin-42 to pin-49, in the original driver, the relative offset value was erroneously decremented by 1. Fixes: 360de672 ("pinctrl: mediatek: add support for MT7986 SoC") Signed-off-by:
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Sam Shih authored
Since the bias-pull-{up,down} attribute already defines in pinctrl driver of mediatek MT7986 SoC, this patch updates bindings to support mediatek common bias-pull* function. Signed-off-by: -
Frank Wunderlich authored
Fix mmc and uart pins after uart splitting. Some pinmux pins of the mt7986 pinctrl driver is composed of multiple pinctrl groups, the original binding only allows one pinctrl group per dts node, this patch sets "maxItems" for these groups and add new examples to the binding documentation. Fixes: 65916a1c ("dt-bindings: pinctrl: update bindings for MT7986 SoC") Signed-off-by:
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Frank Wunderlich authored
Allow multiple items for pcie, pwm and spi function. Signed-off-by:
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Jonathan Neuschäfer authored
SCS3SEL and KBCCSEL use inverted logic: Whereas in other fields 0 selects the GPIO function and 1 selects the special function, in these two fields, 0 selects the special function and 1 selects the GPIO function. Adjust the code to handle this quirk. Signed-off-by:
Jonathan Neuschäfer <j.neuschaefer@gmx.net> Link: https://lore.kernel.org/r/20221105185911.1547847-3-j.neuschaefer@gmx.net Signed-off-by:
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Jonathan Neuschäfer authored
In preparation for the next patch, which makes the logic around setting/resetting bits in MFSEL a little more complicated, move that code to a new function Signed-off-by:
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- Nov 09, 2022
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Siarhei Volkau authored
The example declares "struct pinctrl *p" but refers to "foo->p" which isn't declared in the context of the example. Signed-off-by:
Siarhei Volkau <lis8215@gmail.com> Link: https://lore.kernel.org/r/20221101205159.1468069-3-lis8215@gmail.com Signed-off-by:
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Siarhei Volkau authored
The function requires two arguments. Signed-off-by:
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Jonathan Neuschäfer authored
Commit 6c846d02 ("gpio: Don't fiddle with irqchips marked as immutable") added a warning for irqchips that are not marked with IRQCHIP_IMMUTABLE. Convert the pinctrl-wpcm450 driver to an immutable irqchip. Signed-off-by:
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Yassine Oudjana authored
Clarify the meaning of sysirq to avoid confusion. Suggested-by:
Yassine Oudjana <y.oudjana@protonmail.com> Acked-by:
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Yassine Oudjana authored
The document currently states a maximum of 1 interrupt, but the DT has 2 specified causing a dtbs_check error. Replace the maximum limit with a minimum and add per-interrupt descriptions to pass the check. Fixes: 81557a71 ("dt-bindings: pinctrl: Add MediaTek MT6795 pinctrl bindings") Suggested-by:
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Yassine Oudjana authored
Combine MT6797 pin controller document into MT6779 one. reg and reg-names property constraints are set using conditionals. A conditional is also used to make interrupt-related properties required on the MT6779 pin controller only, since the MT6797 controller doesn't support interrupts (or not yet, at least). drive-strength and slew-rate properties which weren't described in the MT6779 document before are brought in from the MT6797 one. Both pin controllers share a common driver core so they should both support these properties. Signed-off-by:
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Yassine Oudjana authored
The pin controller can function without specifying gpio-ranges so remove it from required properties. This is also done in preparation for adding other pin controllers which currently don't have the gpio-ranges property defined where they are used in DTS. This allows dtbs_check to pass on those device trees. Signed-off-by:
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