- Dec 25, 2023
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Hugh Cole-Baker authored
The RK806 on the NanoPC-T6 can be used to power on/off the whole board. Mark it as the system power controller. Signed-off-by:
Hugh Cole-Baker <sigmaris@gmail.com> Link: https://lore.kernel.org/r/20231216212134.23314-1-sigmaris@gmail.com Signed-off-by:
Heiko Stuebner <heiko@sntech.de>
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Trevor Woerner authored
Perform the following cleanups on a previous patch: - indent lines after "gpio-line-names" - fix D0-D8 -> D0-D7 - sort phandle references Fixes: c45de75d ("arm64: dts: rockchip: add gpio-line-names to rk3308-rock-pi-s") Signed-off-by:
Trevor Woerner <twoerner@gmail.com> Link: https://lore.kernel.org/r/20231219173814.1569-1-twoerner@gmail.com Signed-off-by:
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Andy Yan authored
Cool Pi CM5 EVB works as a mother board connect with CM5. CM5 Specification: - Rockchip RK3588 - LPDDR4 2/4/8/16 GB - TF scard slot - eMMC 8/32/64/128 GB module - Gigabit ethernet x 1 with PHY YT8531 - Gigabit ethernet x 1 drived by PCIE with YT6801S CM5 EVB Specification: - HDMI Type A out x 2 - HDMI Type D in x 1 - USB 2.0 Host x 2 - USB 3.0 OTG x 1 - USB 3.0 Host x 1 - PCIE M.2 E Key for Wireless connection - PCIE M.2 M Key for NVME connection - 40 pin header Signed-off-by:
Andy Yan <andyshrk@163.com> Link: https://lore.kernel.org/r/20231212124407.1897604-1-andyshrk@163.com Signed-off-by:
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Andy Yan authored
Add Cool Pi CM5, a board powered by RK3588 CM5 EVB works with a mother board connect with CM5 Signed-off-by:
Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20231212124340.1897502-1-andyshrk@163.com Signed-off-by:
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Andy Yan authored
CoolPi 4B is a rk3588s based SBC. Specification: - Rockchip RK3588S - LPDDR4 2/4/8/16 GB - TF scard slot - eMMC 8/32/64/128 GB module - Gigabit ethernet drived by PCIE with RTL8111HS - HDMI Type D out - Mini DP out - USB 2.0 Host x 2 - USB 3.0 OTG x 1 - USB 3.0 Host x 1 - WIFI/BT module AIC8800 - 40 pin header Signed-off-by:
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Andy Yan authored
Add Cool Pi 4B, a SBC powered by RK3588S Signed-off-by:
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Andy Yan authored
Add vendor prefix for Cool Pi(https://cool-pi.com/ ) Signed-off-by:
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Trevor Woerner authored
Add names to the pins of the general-purpose expansion header as given in the Radxa GPIO page[1] following the conventions in the kernel documentation[2] to make it easier for users to correlate the pins with functions when using utilities such as 'gpioinfo'. Signed-off-by:
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- Dec 16, 2023
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Vahe Grigoryan authored
Haikou is an evaluation and development platform for System on Modules (SOMs). Haikou devkit exposes multiple buttons so let's register them as such so that the input subsystem can generate events when pressed or switched. Signed-off-by:
Vahe Grigoryan <vahe.grigoryan@theobroma-systems.com> Link: https://lore.kernel.org/r/20231214122801.3144180-3-vahe.grigoryan@theobroma-systems.com Signed-off-by:
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Vahe Grigoryan authored
The Puma SoM allows to select in hardware directly which storage medium to try for loading the bootloader, either SPI-NOR followed by eMMC followed by SD card, or SD card only. This signal is exposed on the Q7 connector and allows carrierboards to control it however they want. This feedback pin allows to know in which state the SoM currently is and provided the current state isn't modified until next reboot, know from which storage medium the bootloader could be loaded from next time. Signed-off-by:
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Vahe Grigoryan authored
Haikou is an evaluation and development platform for System on Modules (SOMs). The GPIO0_B1 is routed to the Wake button instead of BIOS_DISABLE, update the comment to reflect that. Signed-off-by:
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Andy Yan authored
Add vop dt node for rk3588. Signed-off-by:
Andy Yan <andy.yan@rock-chips.com> Link: https://lore.kernel.org/r/20231211120004.1785616-1-andyshrk@163.com Signed-off-by:
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- Dec 13, 2023
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Andy Yan authored
Add VOP and VO GRF syscon compatibles for RK3588 Signed-off-by:
Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20231211115836.1785248-1-andyshrk@163.com Signed-off-by:
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Chris Morgan authored
Add support for the Anbernic RG351V, which is a handheld gaming console from Anbernic with an RK3326 SoC, a 640x480 LCD display, a single analog joystick with several face buttons, two USB C ports, and internal WiFi over USB. All hardware has been tested as working except for the battery, which will require further modification to the mainline rk817 battery driver before it can be used (the device was built without a shunt resistor, and as such the battery cannot measure current; only voltage). Signed-off-by:
Chris Morgan <macromorgan@hotmail.com> Link: https://lore.kernel.org/r/20231120230131.57705-4-macroalpha82@gmail.com Signed-off-by:
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Chris Morgan authored
Split the RG351M into its own DTSI file. The RG351M, unlike the Odroid Go Advance, has no ADC joysticks, no GPIO buttons (except for volume on the RG351V), a PWM vibrator that interferes with an Odroid regulator, and different LEDs. Split the RG351M into a DTSI file that can then be imported into the DTS files for the RG351M and a new RG351V. Signed-off-by:
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Chris Morgan authored
The Anbernic RG351V is a portable gaming console from Anbernic with the RK3326 SoC. Signed-off-by:
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Dragan Simic authored
Add ethernet0 alias to the board dts files for a few supported RK3588 and RK3588S boards that had it missing. Signed-off-by:
Dragan Simic <dsimic@manjaro.org> Link: https://lore.kernel.org/r/9af2026bf8a5538aff627381289cb06f2fab4263.1702368023.git.dsimic@manjaro.org Signed-off-by:
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Dragan Simic authored
Add ethernet0 alias to the board dts files for a few supported RK3566 boards that had it missing. Also, remove the ethernet0 alias from one RK3566 SoM dtsi file, which doesn't enable the GMAC, and add the ethernet0 alias back to the dependent board dts files, which actually enable the GMAC. Signed-off-by:
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Dragan Simic authored
Not all supported boards actually use the PX30's built-in (G)MAC, while the SoC TRM and the datasheet don't define some standard numbering in this case. Thus, remove the ethernet0 alias from the PX30 SoC dtsi file, and add the same alias back to the appropriate board dts(i) files. This is quite similar to the already performed migration of the mmcX aliases from the Rockchip SoC dtsi files to the board dts(i) files. Signed-off-by:
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Dragan Simic authored
Not all supported boards actually use the RK3328's built-in GMACs, while the SoC TRM and the datasheet don't define some standard numbering in this case. Thus, remove the ethernet0 and ethernet1 aliases from the RK3328 SoC dtsi file, and add the same alias back to the appropriate board dts(i) files. These changes also touch one RK3318-based board dts, because it actually depends on the RK3328 SoC dtsi and enables one of the GMACs. This is quite similar to the already performed migration of the mmcX aliases from the Rockchip SoC dtsi files to the board dts(i) files. Signed-off-by:
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Dragan Simic authored
Not all supported boards actually use the RK3368's built-in GMAC, while the SoC TRM and the datasheet don't define some standard numbering in this case. Thus, remove the ethernet0 alias from the RK3368 SoC dtsi file, and add the same alias back to the appropriate board dts(i) files. This is quite similar to the already performed migration of the mmcX aliases from the Rockchip SoC dtsi files to the board dts(i) files. Signed-off-by:
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Dragan Simic authored
Not all supported boards actually use the RK3399's built-in GMAC, while the SoC TRM and the datasheet don't define some standard numbering in this case. Thus, remove the ethernet0 alias from the RK3399 SoC dtsi file, and add the same alias back to the appropriate board dts(i) files. This is quite similar to the already performed migration of the mmcX aliases from the Rockchip SoC dtsi files to the board dts(i) files. Signed-off-by:
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David Heidelberg authored
No functional changes. Adjust to comply with dt-schema requirements and make possible to validate values. Acked-by:
David Heidelberg <david@ixit.cz> Link: https://lore.kernel.org/r/20231209171653.85468-2-david@ixit.cz Signed-off-by:
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Johan Jonker authored
Rockchip SoC TRM, SoC datasheet and board schematics always refer to the same gpio numbers - even if not all are used for a specific board. In order to not have to re-define them for every board add the aliases to SoC dtsi files. Co-developed-by:
Jianqun Xu <jay.xu@rock-chips.com> Signed-off-by:
Johan Jonker <jbx6244@gmail.com> Reviewed-by:
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Lukasz Luba authored
Add dynamic-power-coefficient to the GPU node. That will create Energy Model for the GPU based on the coefficient and OPP table information. It will enable mechanism such as DTMP or IPA to work with the GPU DVFS. In similar way the Energy Model for CPUs in rk3399 is created, so both are aligned in power scale. The maximum power used from this coefficient is 1.5W at 600MHz. Signed-off-by:
Lukasz Luba <lukasz.luba@arm.com> Link: https://lore.kernel.org/r/20231127081511.1911706-1-lukasz.luba@arm.com Signed-off-by:
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Heiko Stuebner authored
The spi controllers on rk3588 are named spi0 - spi4. Board schematics also use these exact numbers and we want those names to also reflect in the OS devices because everything else would just cause confusion. Userspace spi access is a thing afterall. To prevent each board repeating their list of spi aliases, define them in the soc dtsi, as previous Rockchip soc like the rk356x do already. Signed-off-by:
Heiko Stuebner <heiko.stuebner@cherry.de> Reviewed-by:
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Heiko Stuebner authored
The gpio controllers on rk3588 are named gpio0 - gpio4. Board schematics also use these exact numbers and we want those names to also reflect in the OS devices because everything else would just cause confusion. Userspace gpio access is a thing afterall. To prevent each board repeating their list of gpio aliases, define them in the soc dtsi, as previous Rockchip soc like the rk356x do already. Signed-off-by:
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Heiko Stuebner authored
The i2c controllers on rk3588 are named i2c0 - i2c8. Board schematics also use these exact numbers and we want those names to also reflect in the OS devices because everything else would just cause confusion. Userspace i2c access is a thing afterall. To prevent each board repeating their list of i2c aliases, define them in the soc dtsi, as all previous Rockchip soc do already. Signed-off-by:
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Heiko Stuebner authored
The serial ports on rk3588 are named uart0 - uart9. Board schematics also use these exact numbers and we want those names to also reflect in the OS devices because everything else would just cause confusion. To prevent each board repeating their list of serial aliases, move them to the soc dtsi, as all previous Rockchip soc do already. Signed-off-by:
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Heiko Stuebner authored
Add a board dts for the Jaguar SBC from Theobroma-Systems JAGUAR is a Single-Board Computer (SBC) based around the rk3588 SoC and is targeting Autonomous Mobile Robots (AMR). It features: * LPDDR4X (up to 16GB) * 1Gbps Ethernet on RJ45 connector (KSZ9031 or KSZ9131) * PCIe 3.0 4-lane on M.2 M-key connector * PCIe 2.1 1-lane on M.2 E-key * USB 2.0 on M.2 E-key * 2x USB3 OTG type-c ports with DP Alt-Mode * USB2 host port * HDMI output * 2x camera connectors, each exposing: * 2-lane MIPI-CSI * 1v2, 1v8, 2v8 power rails * I2C bus * GPIOs * PPS input * CAN * RS485 UART * FAN connector * SD card slot * eMMC (up to 256GB) * RTC backup battery * Companion microcontroller * ISL1208 RTC emulation * AMC6821 PWM emulation * On/off buzzer control * Secure Element * 80-pin Mezzanine connector for daughterboards: * GPIOs * 1Gbps Ethernet * PCIe 2.1 1-lane * 2x 2-lane MIPI-CSI * ADC channel * I2C bus * PWM * UART * SPI * SDIO * CAN * I2S * 1v8, 3v3, 5v0, dc-in (12-24V) power rails Signed-off-by:
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Heiko Stuebner authored
Add the binding for the Jaguar board from Theobroma-Systems. Signed-off-by:
Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/20231201191103.343097-2-heiko@sntech.de
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Chris Morgan authored
Add support for the Powkiddy X55. The Powkiddy X55 is a handheld gaming device with a 720p 5.5 inch screen powered by the Rockchip RK3566 SoC. It includes a Realtek 8821cs WiFi/BT module, 2 ADC joysticks powered by 4 dedicated ADC channels, and several GPIO face buttons. There are 2 SDMMC slots (sdmmc1 and sdmmc3), and an 8GB internal eMMC. Signed-off-by:
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Chris Morgan authored
The Powkiddy X55 is a handheld gaming device made by Powkiddy and powered by the Rockchip RK3566 SoC. This device is somewhat similar to the existing Powkiddy RK3566 devices, which have been grouped together with a previous commit[1]. [1] https://lore.kernel.org/linux-rockchip/20231117202536.1387815-1-macroalpha82@gmail.com/T/#m4764997cfafaca22fe677200de96caa5fb8f0005 Signed-off-by:
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Sebastian Reichel authored
Enable USB3 host controller for the Radxa ROCK 5 Model A. This adds USB3 for the lower USB3 port (the one closer to the PCB). The upper USB3 port uses the RK3588 USB TypeC host controller, which use a different PHY without upstream support. Signed-off-by:
Sebastian Reichel <sebastian.reichel@collabora.com> Link: https://lore.kernel.org/r/20231106155934.80838-2-sebastian.reichel@collabora.com Signed-off-by:
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Sebastian Reichel authored
Enable USB3 host controller for the Radxa ROCK 5 Model B. This adds USB3 for the upper USB3 port (the one further away from the PCB). The lower USB3 and the USB-C ports use the RK3588 USB TypeC host controller, which use a different PHY without upstream support. Signed-off-by:
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shironeko authored
Without fifo depths attempting to change the MTU will fail. These values are from the RK3328 Technical Reference Manual, gmac2io interface tested with Rock64. Signed-off-by:
shironeko <shironeko@tesaguri.club> Link: https://lore.kernel.org/r/20231116214042.11134-2-shironeko@tesaguri.club Signed-off-by:
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Trevor Woerner authored
Add names to the pins of the general-purpose expansion header as given in the Radxa GPIO page[1] following the conventions in the kernel documentation[2] to make it easier for users to correlate the pins with functions when using utilities such as gpioinfo. [1] https://wiki.radxa.com/RockpiS/hardware/gpio [2] Documentation/devicetree/bindings/gpio/gpio.txt Signed-off-by:
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- Nov 28, 2023
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Jagan Teki authored
Edgeble AI 6TOPS board topology is now changed in final revisions as a compatible IO board, NCM6A-IO, is made available for both variants of SoM: NCM6A and NCM6B. With this change, 6b-io is not as available and 6a; 6b SoM's have the same compatible IO board as 6a-io. This change is due to the common optimised design of the IO board made available now in final revisions, which was not the case in initial revisions. So, use the NCM6A-IO compatible for NCM6B SoM based IO dts. Signed-off-by:
Jagan Teki <jagan@edgeble.ai> Acked-by:
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Jagan Teki authored
Current binding has following compatible combination for SoM, IO board - NCM6A: edgeble,neural-compute-module-6a, edgeble,neural-compute-module-6a-io - NCM6B: edgeble,neural-compute-module-6b, edgeble,neural-compute-module-6b-io This board topology now changes in final revisions, so a common compatible IO board, NCM6A-IO, is made available for both variants of SoM: NCM6A and NCM6B, produced by Edgeble AI. With this change, 6b-io is not as available and 6a; 6b SoM's have the same compatible IO board as 6a-io. This change is due to the common optimised design of the IO board made available now in final revisions, which was not the case in initial revisions. Update the dt-bindings with this new change. Signed-off-by:
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Jimmy Hon authored
Enable USB3 host controller for the Orange Pi 5. Signed-off-by:
Jimmy Hon <honyuenkwun@gmail.com> Link: https://lore.kernel.org/r/20231126200845.1192-1-honyuenkwun@gmail.com Signed-off-by:
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