- Mar 15, 2013
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Laurent Pinchart authored
The PFC GPIO API implementation moved to using port numbers. Replace all GPIO_PORTx enum usage with the corresponding port number. The GPIO_PORTx enum values are identical to the port number on this platform. Signed-off-by:
Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Acked-by:
Linus Walleij <linus.walleij@linaro.org>
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Guennadi Liakhovetski authored
The SH73A0 SoC has sparse GPIO numbers. Declare the pin numbers ranges in the PFC SoC data and use the pin numbers in the GPIO API. Signed-off-by:
Guennadi Liakhovetski <g.liakhovetski@gmx.de> Signed-off-by:
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Laurent Pinchart authored
The PFC driver assumes that the value of the GPIO_PORTxxx enumeration names are equal to the port number. This isn't true when the port number space is sparse, as with the SH73A0. Fix the issue by adding support for pin numbers ranges specified through SoC data. When no range is specified the driver considers that the PFC implements a single contiguous range for all pins. Signed-off-by:
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Laurent Pinchart authored
Adding a GPIO range to a pinctrl device logically belongs to the GPIO driver. Switch to the right API. Signed-off-by:
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Laurent Pinchart authored
This prepares support for sparse pin numbering. The function currently just performs and indexed lookup in the pins array. Signed-off-by:
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Laurent Pinchart authored
The function is guaranteed to be called with a gpio number smaller than nr_pins. The condition can the be simplified, and the function inlined. Signed-off-by:
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Laurent Pinchart authored
The PFC core exposes a sh_pfc_config_gpio() function that configures pinmuxing for a given GPIO (either a real GPIO or a function GPIO). Handling of real and function GPIOs belong to the GPIO layer, move the GPIO number to mark translation to the caller and rename the function to sh_pfc_config_mux(). Signed-off-by:
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Laurent Pinchart authored
The macros are defined identically and used in two SoC-specific files, share them. Signed-off-by:
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Laurent Pinchart authored
Instead of converting the GPIO number to an enum_id and looking up IRQ table entries by enum_id, replace the pinmux_irq enum_ids field with a gpios field and lookup entries using the GPIO number. Signed-off-by:
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Laurent Pinchart authored
And drop the pinmux_flag_t typedef. Signed-off-by:
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Laurent Pinchart authored
Register two GPIO chips, one for the real GPIOs and one for the function GPIOs. Signed-off-by:
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Laurent Pinchart authored
Split the GPIOs table into a pins table for real GPIOs and a functions table for function GPIOs. Only register pins with the pinctrl core. The function GPIOs remain accessible as GPIOs. Signed-off-by:
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Laurent Pinchart authored
The GPIO type is always PINMUX_TYPE_FUNCTION when freeing a function GPIO. Hardcode the type value. Signed-off-by:
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Laurent Pinchart authored
As a step towards GPIO function removal, shorten the GPIO range registered with the pinctrl core. Function GPIOs are now handled in the GPIO handlers directly instead of going through the pinctrl API. Signed-off-by:
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Laurent Pinchart authored
This ensures that the field is not modified, which is a prerequisite for the rest of the PFC refactoring work. Signed-off-by:
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Laurent Pinchart authored
All function GPIO entries are initialized with the GPIO_FN macro that expands to the PINMUX_GPIO macro, used to initialize real GPIOs. Create a PINMUX_GPIO_FN macro that duplicates PINMUX_GPIO and sets flags to PINMUX_TYPE_FUNCTION and use it in GPIO_FN, and make PINMUX_GPIO set flags to PINMUX_TYPE_GPIO. This removes the need to initialize GPIO flags at runtime and thus simplifies the code, preparing for the GPIO and functions split. Signed-off-by:
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Laurent Pinchart authored
The field is unused, remove it. Signed-off-by:
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Laurent Pinchart authored
The data and mark ranges are only used to check whether a GPIO corresponds to a real pin or a function. As pins come first in the list of GPIOs and in the platform-specific GPIO enumerations, we can replace the data and mark ranges by a number of pins. Add an nr_pins field to struct sh_pfc_soc_info to store the number of pins implemented by the SoC, remove the data and mark range fields and introduce sh_pfc_gpio_is_pin() and sh_pfc_gpio_is_function() functions to replace range-based checks. Signed-off-by:
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Laurent Pinchart authored
The SoC information first_gpio field is always equal to 0, and the last_gpio field is the index of the last entry in the pinmux_gpios array. Replace the first_gpio and last_gpio fields by a nr_gpios field, and initialize it to ARRAY_SIZE(pinmux_gpios). Signed-off-by:
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Laurent Pinchart authored
The GPIO_FN macro expands to the PINMUX_GPIO macro. The regular expression to 'unexpand' PINMUX_GPIO to GPIO_FN is s/\tPINMUX_GPIO(GPIO_FN_\([A-Z0-9_]*\),[ \t]*\1_MARK)/\tGPIO_FN(\1)/ This consolidates SoC-specific PFC information to use the same macros for all SoCs. Signed-off-by:
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Laurent Pinchart authored
The sh_pfc_map_gpios() function is only called at initialization time when no other task can access the sh_pfc fields. Don't protect the operation with a spinlock. Signed-off-by:
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Laurent Pinchart authored
The spinlock is used to protect data that is only accessed sequentially during initialization. Remove it. Signed-off-by:
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Guennadi Liakhovetski authored
Fix definition of the SDHIWP0 function and simplify the CPU_ALL_PORT definition on sh73a0. Signed-off-by:
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Laurent Pinchart authored
The pinctrl_desc and pinctrl_gpio_range structures registered with the pinctrl core are per-device instances. Move them to the dynamically allocated sh_pfc_pinctrl structure and initialize them at runtime. Signed-off-by:
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Laurent Pinchart authored
The pinconf, pinctrl and pinmux operation structures hold function pointers that are never modified. Declare them as const. Signed-off-by:
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Simon Horman authored
Merge branch 'fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl into pinmux-base
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- Mar 14, 2013
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Sachin Kamat authored
The function definition of pinconf_generic_dump_config is defined under CONFIG_DEBUG_FS macro. Define the declaration too under this macro. Without this patch we get the following build error: drivers/built-in.o: In function `pcs_pinconf_config_dbg_show': drivers/pinctrl/pinctrl-single.c:726: undefined reference to `pinconf_generic_dump_config' Signed-off-by:
Sachin Kamat <sachin.kamat@linaro.org> Signed-off-by:
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Laurent Pinchart authored
A bad copy&paste resulted in the debugfs pinconf-state file printing the pin name instead of the state name. Fix it. Signed-off-by:
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Axel Lin authored
It's pointless to check "af.alt_bit1 == UNUSED" twice. This looks like a copy-paste bug, I think what we want is to check if *both* af.alt_bit1 and af.alt_bit2 are UNUSED. Signed-off-by:
Axel Lin <axel.lin@ingics.com> Acked-by:
Patrice Chotard <patrice.chotard@st.com> Signed-off-by:
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- Mar 13, 2013
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Simon Horman authored
Merge branch 'devel' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl into pinmux
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- Mar 08, 2013
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Simon Horman authored
mmc/host.h provides MMC_CAP_SD_HIGHSPEED which is used in board-marzen.c This resolves a build problem observed when compiling with "mmc: tmio: remove unused and deprecated symbols" applied. Acked-by:
Simon Horman <horms+renesas@verge.net.au>
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- Mar 07, 2013
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Maxime Ripard authored
The initial driver contained only a limited set of pins functions because we lacked of documentation on it. Now that we have such documentation, finish to fill the array. Signed-off-by:
Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by:
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Maxime Ripard authored
The initial driver contained only a limited set of pins functions because we lacked of documentation on it. Now that we have such documentation, finish to fill the array. Signed-off-by:
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Axel Lin authored
If pcs->is_pinconf is false, it means does not support pinconf. If pcs->is_pinconf is true, is_generic flag is always true. This patch fixes below build error: CC [M] drivers/pinctrl/pinctrl-single.o drivers/pinctrl/pinctrl-single.c: In function 'pcs_probe': drivers/pinctrl/pinctrl-single.c:1441:3: error: assignment of member 'is_generic' in read-only object make[2]: *** [drivers/pinctrl/pinctrl-single.o] Error 1 make[1]: *** [drivers/pinctrl] Error 2 make: *** [drivers] Error 2 Signed-off-by:
Haojian Zhuang <haojian.zhuang@linaro.org> Signed-off-by:
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Haojian Zhuang authored
Add comments with pinconf & gpio range in the document of pinctrl-single. Signed-off-by:
Haojian Zhuang <haojian.zhuang@gmail.com> Acked-by:
Tony Lindgren <tony@atomide.com> Signed-off-by:
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Haojian Zhuang authored
Support the operation of generic pinconf. The supported config arguments are INPUT_SCHMITT, INPUT_SCHMITT_ENABLE, DRIVE_STRENGHT, BIAS_DISABLE, BIAS_PULLUP, BIAS_PULLDOWN, SLEW_RATE. Signed-off-by:
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Haojian Zhuang authored
Since Hisilicon's pin controller is divided into two parts. One is the function mux, and the other is pin configuration. These two parts are in the different memory regions. So make pinctrl-single,function-mask as optional property. Then we can define pingroups without valid function mux that is only used for pin configuration. Signed-off-by:
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Haojian Zhuang authored
Add the support of dumping pin configuration. Signed-off-by:
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Haojian Zhuang authored
Since gpio driver could create gpio range in DTS, it could invoke pinctrl_request_gpio(). In the pinctrl-single driver, it needs to configure pins with gpio function mode. A new gpio function range should be created in DTS file in below. pinctrl-single,gpio-range = <phandle pin_offset nr_pins gpio_func>; range: gpio-range { #pinctrl-single,gpio-range-cells = <3>; }; The gpio-ranges property is used in gpio driver and the pinctrl-single,gpio-range property is used in pinctrl-single driver. 1. gpio-ranges is used for gpio driver in below. gpio-ranges = <phandle gpio_offset_in_chip pin_offset nr_pins> gpio-ranges = < &pmx0 0 89 1 &pmx0 1 89 1 &pmx0 2 90 1 &pmx0 3 90 1 &pmx0 4 91 1 &pmx0 5 92 1>; 2. gpio driver could get pin offset from gpio-ranges property. pinctrl-single driver could get gpio function mode from gpio_func that is stored in @gpiofuncs list in struct pcs_device. This new pinctrl-single,gpio-range is used as complement for gpio-ranges property in gpio driver. Signed-off-by: -
Haojian Zhuang authored
Add the pl061_gpio_request() to request pinctrl. Create the logic between pl061 gpio driver and pinctrl (pinctrl-single) driver. While a gpio pin is requested, it will request pinctrl driver to set that pin with gpio function mode. So pinctrl driver should append .gpio_request_enable() in pinmux_ops. Signed-off-by:
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