- Jul 19, 2023
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Marc Kleine-Budde authored
Jimmy Assarsson <extja@kvaser.com> says: This patch series adds support for a range of new Kvaser PCI Express devices based on the SmartFusion2 SoC, to the kvaser_pciefd driver. In the first patch, the hardware specific constants and functions are moved into a driver_data struct. In the second patch, we add the new devices and their hardware specific constants and functions. Changes in v2: - Rebased on can: kvaser_pciefd: Fixes and improvements https://lore.kernel.org/all/20230529134248.752036-1-extja@kvaser.com - Dropped can: kvaser_pciefd: Wrap register read and writes with macros https://lore.kernel.org/linux-can/20230523094354.83792-17-extja@kvaser.com since the driver became a lot cleaner when using FIELD_{GET,PREP} and GENMASK. Moved some parts of the patch into can: kvaser_pciefd: Move hardware specific constants and functions into a driver_data struct Removed macros reading/writing registers. - Link to v1: https://lore.kernel.org/all/20230523094354.83792-14-extja@kvaser.com Link: https://lore.kernel.org/all/20230622151153.294844-1-extja@kvaser.com Signed-off-by:
Marc Kleine-Budde <mkl@pengutronix.de>
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Jimmy Assarsson authored
Add support for new Kvaser pciefd devices, based on SmartFusion2 SoC. Signed-off-by:
Jimmy Assarsson <extja@kvaser.com> Link: https://lore.kernel.org/all/20230622151153.294844-3-extja@kvaser.com [mkl: mark structs as static] Signed-off-by:
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Jimmy Assarsson authored
Move hardware specific address offsets, interrupt masks and DMA mapping function, into struct kvaser_pciefd_driver_data, as a step towards adding new devices based on different hardware. Co-developed-by:
Martin Jocic <majoc@kvaser.com> Signed-off-by:
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Marc Kleine-Budde authored
Michal Simek <michal.simek@amd.com> says: IP core has option reset line which can be wired that's why add support for optional reset. Changes in v2: - Add Conor's ACK - Fix use-after-free in xcan_remove reported by Marc. - Link to v1: https://lore.kernel.org/all/cover.1689084227.git.michal.simek@amd.com Link: https://lore.kernel.org/all/cover.1689164442.git.michal.simek@amd.com Signed-off-by:
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Rob Herring authored
The DT of_device.h and of_platform.h date back to the separate of_platform_bus_type before it as merged into the regular platform bus. As part of that merge prepping Arm DT support 13 years ago, they "temporarily" include each other. They also include platform_device.h and of.h. As a result, there's a pretty much random mix of those include files used throughout the tree. In order to detangle these headers and replace the implicit includes with struct declarations, users need to explicitly include the correct includes. Signed-off-by:
Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/all/20230714174757.4060748-1-robh@kernel.org Signed-off-by:
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Srinivas Neeli authored
Add support for an optional reset for the CAN controller using the reset driver. If the CAN node contains the "resets" property, then this logic will perform CAN controller reset. Signed-off-by:
Srinivas Neeli <srinivas.neeli@amd.com> Signed-off-by:
Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/all/ab7e6503aa3343e39ead03c1797e765be6c50de2.1689164442.git.michal.simek@amd.com Signed-off-by:
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Michal Simek authored
IP core has input for reset signal which can be connected that's why describe optional reset property. Signed-off-by:
Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/all/bfaed896cc51af02fe5f290675313ab4dcab0d33.1689164442.git.michal.simek@amd.com Signed-off-by:
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- Jul 17, 2023
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Marc Kleine-Budde authored
Judith Mendez <jm@ti.com> says: On AM62x there are two MCANs in MCU domain. The MCANs in MCU domain were not enabled since there is no hardware interrupt routed to A53 GIC interrupt controller. Therefore A53 Linux cannot be interrupted by MCU MCANs. This solution instantiates a hrtimer with 1 ms polling interval for MCAN device when there is no hardware interrupt property in DTB MCAN node. The hrtimer generates a recurring software interrupt which allows to call the isr. The isr will check if there is pending transaction by reading a register and proceed normally if there is. MCANs with hardware interrupt routed to A53 Linux will continue to use the hardware interrupt as expected. Timer polling method was tested on both classic CAN and CAN-FD at 125 KBPS, 250 KBPS, 1 MBPS and 2.5 MBPS with 4 MBPS bitrate switching. Latency and CPU load benchmarks were tested on 3x MCAN on AM62x. 1 MBPS timer polling interval is the better timer polling interval since it has comparable latency to hardware interrupt with the worse case being 1ms + CAN frame propagation time and CPU load is not substantial. Latency can be improved further with less than 1 ms polling intervals, however it is at the cost of CPU usage since CPU load increases at 0.5 ms. Note that in terms of power, enabling MCU MCANs with timer-polling implementation might have negative impact since we will have to wake up every 1 ms whether there are CAN packets pending in the RX FIFO or not. This might prevent the CPU from entering into deeper idle states for extended periods of time. v9: Link: https://lore.kernel.org/linux-can/20230419223323.20384-1-jm@ti.com v8: Link: https://lore.kernel.org/linux-can/20230530224820.303619-1-jm@ti.com v7: Link: https://lore.kernel.org/linux-can/20230523023749.4526-1-jm@ti.com v6: Link: https://lore.kernel.org/linux-can/20230518193613.15185-1-jm@ti.com v5: Link: https://lore.kernel.org/linux-can/20230510202952.27111-1-jm@ti.com v4: Link: https://lore.kernel.org/linux-can/20230501224624.13866-1-jm@ti.com v3: Link: https://lore.kernel.org/linux-can/20230501223121.21663-1-jm@ti.com v2: Link: https://lore.kernel.org/linux-can/20230424195402.516-1-jm@ti.com RFC: Link: https://lore.kernel.org/linux-can/20230413223051.24455-1-jm@ti.com/ v10: - set irq=0 during declaration - return irq error value instead of -EINVAL; v9: - Change add MS to HRTIMER_POLL_INTERVAL - Change syntax from "= 0" to "!" v8: - Cancel hrtimer after interrupts in m_can_stop - Move assignment of hrtimer_callback to m_can_class_register() - Initialize irq = 0 if polling mode is used v7: - Clean up m_can_platform.c after removing poll-interval v6: - Move hrtimer stop/start function calls to m_can_open and m_can_close to support power suspend/resume v5: - Remove poll-interval in bindings - Change dev_dbg to dev_info if hardware int exists and polling is enabled v4: - Wrong patches sent v3: - Update binding poll-interval description - Add oneOf to select either interrupts v2: - Add poll-interval property to bindings and MCAN DTB node - Add functionality to check for 'poll-interval' property in MCAN node - Bindings: add an example using poll-interval - Add 'polling' flag in driver to check if device is using polling method - Check for timer polling and hardware interrupt cases, default to hardware interrupt method - Change ns_to_ktime() to ms_to_ktime() Link: https://lore.kernel.org/all/20230707204714.62964-1-jm@ti.com [mkl: fix typos in merge request, fix links] Signed-off-by:
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Judith Mendez authored
Introduce timer polling method to MCAN since some SoCs may not have M_CAN interrupt routed to A53 Linux and do not have interrupt property in device tree M_CAN node. On AM62x SoC, MCANs on MCU domain do not have hardware interrupt routed to A53 Linux, instead they will use timer polling method. Add an hrtimer to MCAN class device. Each MCAN will have its own hrtimer instantiated if there is no hardware interrupt found in device tree M_CAN node. The timer will generate a software interrupt every 1 ms. In hrtimer callback, we check if there is a transaction pending by reading a register, then process by calling the isr if there is. Tested-by: Hiago De Franco <hiago.franco@toradex.com> # Toradex Verdin AM62 Reviewed-by:
Tony Lindgren <tony@atomide.com> Signed-off-by:
Judith Mendez <jm@ti.com> Link: https://lore.kernel.org/all/20230707204714.62964-3-jm@ti.com Signed-off-by:
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Judith Mendez authored
On AM62x SoC, MCANs on MCU domain do not have hardware interrupt routed to A53 Linux, instead they will use software interrupt by timer polling. To enable timer polling method, interrupts should be optional so remove interrupts property from required section and add an example for MCAN node with timer polling enabled. Reviewed-by:
Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by:
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- Jul 14, 2023
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Jesper Dangaard Brouer authored
Spotted this trivial spell mistake while casually reading the google GVE driver code. Signed-off-by:
Jesper Dangaard Brouer <hawk@kernel.org> Signed-off-by:
David S. Miller <davem@davemloft.net>
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David S. Miller authored
Petr Machata says: ==================== mlxsw: Manage RIF across PVID changes The mlxsw driver currently makes the assumption that the user applies configuration in a bottom-up manner. Thus netdevices need to be added to the bridge before IP addresses are configured on that bridge or SVI added on top of it. Enslaving a netdevice to another netdevice that already has uppers is in fact forbidden by mlxsw for this reason. Despite this safety, it is rather easy to get into situations where the offloaded configuration is just plain wrong. As an example, take a front panel port, configure an IP address: it gets a RIF. Now enslave the port to the bridge, and the RIF is gone. Remove the port from the bridge again, but the RIF never comes back. There is a number of similar situations, where changing the configuration there and back utterly breaks the offload. The situation is going to be made better by implementing a range of replays and post-hoc offloads. In this patch set, address the ordering issues related to creation of bridge RIFs. Currently, mlxsw has several shortcomings with regards to RIF handling due to PVID changes: - In order to cause RIF for a bridge device to be created, the user is expected first to set PVID, then to add an IP address. The reverse ordering is disallowed, which is not very user-friendly. - When such bridge gets a VLAN upper whose VID was the same as the existing PVID, and this VLAN netdevice gets an IP address, a RIF is created for this netdevice. The new RIF is then assigned to the 802.1Q FID for the given VID. This results in a working configuration. However, then, when the VLAN netdevice is removed again, the RIF for the bridge itself is never reassociated to the PVID. - PVID cannot be changed once the bridge has uppers. Presumably this is because the driver does not manage RIFs properly in face of PVID changes. However, as the previous point shows, it is still possible to get into invalid configurations. This patch set addresses these issues and relaxes some of the ordering requirements that mlxsw had. The patch set proceeds as follows: - In patch #1, pass extack to mlxsw_sp_br_ban_rif_pvid_change() - To relax ordering between setting PVID and adding an IP address to a bridge, mlxsw must be able to request that a RIF is created with a given VLAN ID, instead of trying to deduce it from the current netdevice settings, which do not reflect the user-requested values yet. This is done in patches #2 and #3. - Similarly, mlxsw_sp_inetaddr_bridge_event() will need to make decisions based on the user-requested value of PVID, not the current value. Thus in patches #4 and #5, add a new argument which carries the requested PVID value. - Finally in patch #6 relax the ban on PVID changes when a bridge has uppers. Instead, add the logic necessary for creation of a RIF as a result of PVID change. - Relevant selftests are presented afterwards. In patch #7 a preparatory helper is added to lib.sh. Patches #8, #9, #10 and #11 include selftests themselves. ==================== Signed-off-by: -
Petr Machata authored
This tests whether addition and deletion of a VLAN upper that coincides with the current PVID setting throws off forwarding. This selftests is specifically geared towards offloading drivers. In particular, mlxsw used to fail this selftest, and an earlier patch in this patchset fixes the issue. However, there's nothing HW-specific in the test itself (it absolutely is supposed to pass on SW datapath), and therefore it is put into the generic forwarding directory. Signed-off-by:
Petr Machata <petrm@nvidia.com> Reviewed-by:
Danielle Ratson <danieller@nvidia.com> Signed-off-by:
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Petr Machata authored
This tests whether changes to PVID that coincide with an existing VLAN upper throw off forwarding. This selftests is specifically geared towards offloading drivers, but since there's nothing HW-specific in the test itself (it absolutely is supposed to pass on SW datapath), it is put into the generic forwarding directory. Signed-off-by:
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Petr Machata authored
Add an alternative path involving VLAN 777 instead of the current 555. Then add tests that verify that marking 777 as PVID makes the 555 path not work, and the 777 path work. Signed-off-by:
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Petr Machata authored
This test relies on PVID being configured on the bridge itself. Thus when it is deconfigured, the system should lose the ability to forward traffic. Later when it is added again, the ability to forward traffic should be regained. Add tests to exercise these configuration changes and verify results. Signed-off-by:
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Petr Machata authored
Add two helpers to run a ping test that succeeds when the pings themselves fail. Signed-off-by:
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Petr Machata authored
Currently, mlxsw has several shortcomings with regards to RIF handling due to PVID changes: - In order to cause RIF for a bridge device to be created, the user is expected first to set PVID, then to add an IP address. The reverse ordering is disallowed, which is not very user-friendly. - When such bridge gets a VLAN upper whose VID was the same as the existing PVID, and this VLAN netdevice gets an IP address, a RIF is created for this netdevice. The new RIF is then assigned to the 802.1Q FID for the given VID. This results in a working configuration. However, then, when the VLAN netdevice is removed again, the RIF for the bridge itself is never reassociated to the VLAN. - PVID cannot be changed once the bridge has uppers. Presumably this is because the driver does not manage RIFs properly in face of PVID changes. However, as the previous point shows, it is still possible to get into invalid configurations. In this patch, add the logic necessary for creation of a RIF as a result of PVID change. Moreover, when a VLAN upper is created whose VID matches lower PVID, do not create RIF for this netdevice. These changes obviate the need for ordering of IP address additions and PVID configuration, so stop forbidding addition of an IP address to a PVID-less bridge. Instead, bail out quietly. Also stop preventing PVID changes when the bridge has uppers. Signed-off-by:
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Petr Machata authored
For purposes of replay, mlxsw_sp_inetaddr_bridge_event() will need to make decisions based on the proposed value of PVID. Querying PVID reveals the current settings, not the in-flight values that the user requested and that the notifiers are acting upon. Add a parameter, lower_pvid, which carries the proposed PVID of the lower bridge, or -1 if the lower is not a bridge. Signed-off-by:
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Petr Machata authored
The bridge branch of the dispatch in this function is going to get more code and will need curly braces. Per the doctrine, that means the whole if-else chain should get them. Signed-off-by:
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Petr Machata authored
Currently, when an IP address is added to a bridge that has no PVID, the operation is rejected. An IP address addition is interpreted as a request to create a RIF for the bridge device, but without a PVID there is no VLAN for which the RIF should be created. Thus the correct way to create a RIF for a bridge as a user is to first add a PVID, and then add the IP address. Ideally this ordering requirement would not exist. RIF would be created either because an IP address is added, or because a PVID is added, depending on which comes last. For that, the switchdev code (which notices the PVID change request) must be able to request that a RIF is created with a given VLAN ID, because at the time that the PVID notification is distributed, the PVID setting is not yet visible for querying. Therefore when creating a VLAN-based RIF, use mlxsw_sp_rif_params.vid to communicate the VID, and do not determine it ad-hoc in the fid_get callback. Signed-off-by:
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Petr Machata authored
The fid_get callback is called to allocate a FID for the newly-created RIF. In a following patch, the fid_get implementation for VLANs will be modified to take the VLAN ID from the parameters instead of deducing it from the netdevice. To that end, propagate the RIF parameters to the fid_get callback. Signed-off-by:
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Petr Machata authored
Currently the reason for rejection of PVID manipulation is dumped to syslog, and a generic -EBUSY is returned to the userspace. But switchdev_handle_port_obj_add(), through which we get to mlxsw_sp_port_vlans_add(), handles extack just fine, and we can pass the message this way. This improves visibility into reasons why the request to change PVID was rejected. Before the change: # bridge vlan add dev br vid 2 self pvid untagged RTNETLINK answers: Device or resource busy (plus a syslog line) After the change: # bridge vlan add dev br vid 2 self pvid untagged Error: mlxsw_spectrum: Can't change PVID, it's used by router interface. Note that this particular error message is going away in the following patches. However the ability to pass error messages through extack will be useful more broadly for communicating in particular reasons why a RIF failed to be created. Signed-off-by:
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David S. Miller authored
Sabrina Dubroca says: ==================== net: add MACsec offload selftests Patch 1 adds MACsec offload to netdevsim (unchanged from v2). Patch 2 adds a corresponding selftest to the rtnetlink testsuite. ==================== Signed-off-by: -
Sabrina Dubroca authored
Like the IPsec offload test, this requires netdevsim. Signed-off-by:
Sabrina Dubroca <sd@queasysnail.net> Signed-off-by:
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Sabrina Dubroca authored
When the kernel is compiled with MACsec support, add the NETIF_F_HW_MACSEC feature to netdevsim devices and implement macsec_ops. To allow easy testing of failure from the device, support is limited to 3 SecY's per netdevsim device, and 1 RXSC per SecY. v2: - nsim_macsec_add_secy, return -ENOSPC if secy_count isn't full but we can't find an empty slot (Simon Horman) - add sci_to_cpu to make sparse happy (Simon Horman) - remove set but not used secy variable (kernel test robot and Simon Horman) Signed-off-by:
Simon Horman <simon.horman@corigine.com> Signed-off-by:
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Jiri Pirko authored
The checks in question were introduced by: commit 6b4db2e5 ("devlink: Fix use-after-free after a failed reload"). That fixed an issue of reload with mlxsw driver. Back then, that was a valid fix, because there was a limitation in place that prevented drivers from registering/unregistering params when devlink instance was registered. It was possible to do the fix differently by changing drivers to register/unregister params in appropriate places making sure the ops operate only on memory which is allocated and initialized. But that, as a dependency, would require to remove the limitation mentioned above. Eventually, this limitation was lifted by: commit 1d18bb1a ("devlink: allow registering parameters after the instance") Also, the alternative fix (which also fixed another issue) was done by: commit 74cbc3c0 ("mlxsw: spectrum_acl_tcam: Move devlink param to TCAM code"). Therefore, the checks are no longer relevant. Each driver should make sure to have the params registered only when the memory the ops are working with is allocated and initialized. So remove the checks. Signed-off-by:
Jiri Pirko <jiri@nvidia.com> Reviewed-by:
Ido Schimmel <idosch@nvidia.com> Reviewed-by:
Jakub Kicinski <kuba@kernel.org> Signed-off-by:
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David S. Miller authored
Russell King says: ==================== Convert mv88e6xxx to phylink_pcs This series (previously posted with further patches on the 26 June as RFC) converts mv88e6xxx to phylink_pcs, and thus moves it from being a pre-March 2020 legacy driver. The first four patches lay the ground-work for the conversion by adding four new methods to the phylink_pcs operations structure: pcs_enable() - called when the PCS is going to start to be used pcs_disable() - called when the PCS is no longer being used pcs_pre_config() - called before the MAC configuration method pcs_post_config() - called after the MAC configuration method Both of these are necessary for some of the mv88e639x workarounds. We also add the ability to inform phylink of a change to the PCS state without involving the MAC later, by providing phylink_pcs_change() which takes a phylink_pcs structure rather than a phylink structure. phylink maintains which instance the PCS is conencted to, so internally it can do the right thing when the PCS is in-use. Then we provide some additional mdiobus and mdiodev accessors that we will be using in the new PCS drivers. The changes for mv88e6xxx follow, and the first one needs to be explicitly pointed out - we (Andrew and myself) have both decided that all possible approaches to maintaining backwards compatibility with DT have been exhaused - everyone has some objection to everything that has been proposed. So, after many years of trying, we have decided that this is just an impossibility, and with this patch, we are now intentionally and knowingly breaking any DT that does not specify the CPU and DSA port fixed-link parameters. Hence why Andrew has recently been submitting DT update patches. It is regrettable that it has come to this. Following this, we start preparing 88e6xxx for phylink_pcs conversion by padding the mac_select_pcs() DSA method, and the internal hooks to create and tear-down PCS instances. Rather than bloat the already very large mv88e6xxx_ops structure, I decided that it would be better that the new internal chip specific PCS methods are all grouped within their own structure - and this structure can be declared in the PCS drivers themselves. Then we have the actual conversion patches, one for each family of PCS. Lastly, we clean up the driver after conversion, removing all the now redundant code. ==================== Signed-off-by: -
Russell King (Oracle) authored
Now that mv88e6xxx is completely converted to using phylink_pcs support, we have no need for the serdes methods. Remove all this infrastructure. Also remove the __maybe_unused from mv88e6xxx_pcs_select(). Signed-off-by:
Russell King (Oracle) <rmk+kernel@armlinux.org.uk> Signed-off-by:
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Russell King (Oracle) authored
Convert the 88E6390, 88E6390X, and 88E6393X family of switches to use the phylink_pcs infrastructure. Signed-off-by:
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Russell King authored
Convert the 88E6352 SERDES code to use the phylink_pcs infrastructure. Signed-off-by:
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Russell King (Oracle) authored
Convert the 88E6185 SERDES code to use the phylink_pcs infrastructure. Reviewed-by:
Andrew Lunn <andrew@lunn.ch> Signed-off-by:
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Russell King (Oracle) authored
Rename and export the PCS state decoding function so our PCS can make use of the functionality provided by this. Reviewed-by:
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Russell King (Oracle) authored
Add infrastructure for phylink_pcs to the mv88e6xxx driver. This involves adding a mac_select_pcs() hook so we can pass the PCS to phylink at the appropriate time, and a PCS initialisation function. As the various chip implementations are converted to use phylink_pcs, they are no longer reliant on the legacy phylink behaviour. We detect this by the use of this infrastructure, or the lack of any serdes. Signed-off-by:
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Russell King (Oracle) authored
As we now always use a fixed-link for DSA and CPU ports, we no longer need the hack in the Marvell code to make this work. Remove it. This is especially important with the conversion of DSA drivers to phylink_pcs, as the PCS code only gets called if we are using phylink for the port. Signed-off-by:
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Russell King (Oracle) authored
Add the following unlocked accessors to complete the set: __mdiobus_modify() __mdiodev_read() __mdiodev_write() __mdiodev_modify() __mdiodev_modify_changed() which we will need for Marvell DSA PCS conversion. Reviewed-by:
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Russell King (Oracle) authored
Add a function, phylink_pcs_change() which can be used by PCs drivers to notify phylink about changes to the PCS link state. Signed-off-by:
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Russell King (Oracle) authored
Add hooks that are called before and after the mac_config() call, which will be needed to deal with errata workarounds for the Marvell 88e639x DSA switches. Reviewed-by:
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Russell King (Oracle) authored
Add phylink PCS enable/disable callbacks that will allow us to place IEEE 802.3 register compliant PCS in power-down mode while not being used. Signed-off-by:
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Mengyuan Lou authored
Implement ethtool_ops get_wol and set_wol. Implement Wake-on-LAN support. Wol requires hardware board support which use sub id to identify. Magic packets are checked by fw, for now just support WAKE_MAGIC. Signed-off-by:
Mengyuan Lou <mengyuanlou@net-swift.com> Signed-off-by:
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