- Dec 16, 2021
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Biwen Li authored
Enable pwm0 on ls1028a-rdb board which uses flextimer1. Signed-off-by:
Biwen Li <biwen.li@nxp.com> Signed-off-by:
Li Yang <leoyang.li@nxp.com> Signed-off-by:
Shawn Guo <shawnguo@kernel.org>
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Biwen Li authored
Add pwm nodes using flextimer controller. Signed-off-by:
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Biwen Li authored
Add flextimer2 based ftm_alarm1 node and enable it to be the default rtc wakeup source for rdb and qds boards instead of the original flextimer1 which is used by PWM. The ftm_alarm0 node hence is disabled by default. Signed-off-by:
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Xiaowei Bao authored
Add PCIe EP nodes for ls1028a to support EP mode. Signed-off-by:
Xiaowei Bao <xiaowei.bao@nxp.com> Signed-off-by:
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Biwen Li authored
Add interrupt line for RTC node on lx2162a-qds Signed-off-by:
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Yangbo Lu authored
The default NXP SDHC adapter cards for LX2162AQDS are SD 2.0/3.0 adapter card for eSDHC1, and eMMC 5.1 adapter card for eSDHC2. Add speed modes properties supported by the two adapters in device tree node. Signed-off-by:
Yangbo Lu <yangbo.lu@nxp.com> Signed-off-by:
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Ran Wang authored
Enable USB3 HW LPM feature for lx2160a. Signed-off-by:
Ran Wang <ran.wang_1@nxp.com> Signed-off-by:
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Pankaj Bansal authored
The two external MDIO buses used to communicate with phy devices that are external to SOC are muxed in LX2160AQDS board. These buses can be routed to any one of the eight IO slots on LX2160AQDS board depending on value in fpga register 0x54. Additionally the external MDIO1 is used to communicate to the onboard RGMII phy devices. The mdio1 is controlled by bits 4-7 of fpga register and mdio2 is controlled by bits 4-7 of fpga register. Signed-off-by:
Pankaj Bansal <pankaj.bansal@nxp.com> Signed-off-by:
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Pankaj Gupta authored
Disabled by default in SoC dtsi and enables in board dts files. Signed-off-by:
Pankaj Gupta <pankaj.gupta@nxp.com> Signed-off-by:
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Ioana Radulescu authored
DPMAC5 and DPMAC6 are connected to 25G Inphi PHY Signed-off-by:
Vicentiu Galanopulo <vicentiu.galanopulo@nxp.com> Signed-off-by:
Florin Chiculita <florinlaurentiu.chiculita@nxp.com> Signed-off-by:
Ioana Radulescu <ruxandra.radulescu@nxp.com> Signed-off-by:
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Lucas Stach authored
The base i.MX8MM dtsi changes the audio PLL2 rate, which gets in the way if it should be used for anything else than audio. As this PLL doesn't seem to be used by any upstream supported board, just remove the rate configuration to allow boards to set it up as they wish. Signed-off-by:
Lucas Stach <l.stach@pengutronix.de> Signed-off-by:
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Lucas Stach authored
The slew rate and drive-strength of the i2c1 pads were much too high. Bring them down to avoid signal quality issues. Signed-off-by:
Lucas Stach <dev@lynxeye.de> Signed-off-by:
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Lucas Stach authored
Add the missing reset-gpios property to allow Linux to fully reset the network PHY and fix the pinmux to add the neccessary pull-ups for the PHY strap configuration. Signed-off-by:
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- Dec 14, 2021
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Ariel D'Alessandro authored
Introduce BSH SystemMaster (SMM) S2 board family, which consists of: iMX8MN SMM S2 and iMX8MN SMM S2 PRO boards. Add support for iMX8MN BSH SMM S2 board: - 256 MiB DDR3 RAM - 512 MiB NAND - Megabit Ethernet PHY - Wi-Fi 802.11 a/b/g/n/ac with Bluetooth 5.0 - USB-OTG (peripheral mode) Add support for iMX8MN BSH SMM S2 PRO board: - 512 MiB DDR3 RAM - 8 GiB eMMC - Megabit Ethernet PHY - Wi-Fi 802.11 a/b/g/n/ac with Bluetooth 5.0 - USB-OTG (peripheral mode) Signed-off-by:
Ariel D'Alessandro <ariel.dalessandro@collabora.com> Signed-off-by:
Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by:
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Fabio Estevam authored
The 'pm-ignore-notify' property is not a valid property and there is no documentation for it. Drop such invalid property. Signed-off-by:
Fabio Estevam <festevam@gmail.com> Signed-off-by:
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Peng Fan authored
Add power domain for USDHC node. Signed-off-by:
Peng Fan <peng.fan@nxp.com> Signed-off-by:
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Peng Fan authored
i.MX8ULP use scmi firmware based power domain and sensor support. So add the firmware node and the sram it uses. Signed-off-by:
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Peng Fan authored
Add i.MX8ULP power domain header file Acked-by:
Rob Herring <robh@kernel.org> Signed-off-by:
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Adam Ford authored
The SW1C regulator powers the VPU and the state isn't guaranteed to always be on. Link the VPU power-domain to the regulator to ensure it is turned on before using the power domain. Signed-off-by:
Adam Ford <aford173@gmail.com> Signed-off-by:
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Li Yang authored
This property could fix the defect that external usb device always prints this error log --- 'reset SuperSpeed USB device number n using xhci_hcd' when system power on. Signed-off-by:
Pengbo Mu <pengbo.mu@nxp.com> Signed-off-by:
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Li Yang authored
ls1088a has a separate reset register block. Define it in dts and use it for reboot. Signed-off-by:
Ashish Kumar <Ashish.Kumar@nxp.com> Signed-off-by:
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Vladimir Oltean authored
Company policy requires that copyright is updated when a file is touched. Keeping the copyright change separate to reduce the noise in other patches. Signed-off-by:
Vladimir Oltean <vladimir.oltean@nxp.com> Signed-off-by:
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Vladimir Oltean authored
These are used by U-Boot, and are required for keeping the device trees in sync. Signed-off-by:
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Vladimir Oltean authored
This is used by U-Boot and is required for keeping the device trees in sync. Signed-off-by:
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Vladimir Oltean authored
In preparation for this board's device tree synchronization with U-Boot, we must find a common node ordering pattern. Alphabetical sounds about right. Signed-off-by:
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- Dec 08, 2021
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Joakim Zhang authored
Add mac address in efuse, so that EQOS driver can parse it from nvmem cell. Signed-off-by:
Joakim Zhang <qiangqing.zhang@nxp.com> Signed-off-by:
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Joakim Zhang authored
Remove unused "nvmem_macaddr_swap" property for FEC, there is no info in both dt-binding and driver, so it's safe to remove it. Reviewed-by:
Ahmad Fatoum <a.fatoum@pengutronix.de> Signed-off-by:
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Joakim Zhang authored
According to commit 0a4355c2 ("net: phy: realtek: add dt property to disable CLKOUT clock"), diable CLKOUT clock for FEC PHY to save power on i.MX8MP EVK board. Signed-off-by:
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Joakim Zhang authored
As commit 2f664823 ("net: phy: at803x: add device tree binding") described, configure FEC PHY VDDIO voltage according to board design. Signed-off-by:
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Joakim Zhang authored
As commit 390b4cad ("net: phy: at803x: add support for configuring SmartEEE") described, disable PHY smart eee by default. Signed-off-by:
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Joakim Zhang authored
As commit 798a1807 ("arm64: dts: imx8mp-evk: Improve the Ethernet PHY description") described, add hardware reset for EQOS PHY. Signed-off-by:
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Joakim Zhang authored
Add hardware reset for FEC PHY. Signed-off-by:
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- Dec 06, 2021
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Alexander Stein authored
This adds support for TQMa8Mx module on MBa8Mx board. Signed-off-by:
Alexander Stein <alexander.stein@ew.tq-group.com> Signed-off-by:
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Alexander Stein authored
This adds support for TQMa8MQNL module on MBa8Mx board. Signed-off-by:
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Alexander Stein authored
This adds support for TQMa8MQML module on MBa8Mx board. Signed-off-by:
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Jacky Bai authored
Add the basic dts file for i.MX8ULP EVK board. Only the necessary devices for minimal system boot up are enabled: enet, emmc, usb, console uart. some of the devices' pin status may lost during low power mode, so additional sleep pinctrl properties are included by default. Reviewed-by:
Dong Aisheng <aisheng.dong@nxp.com> Signed-off-by:
Jacky Bai <ping.bai@nxp.com> Signed-off-by:
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Jacky Bai authored
Add the basic dtsi support for i.MX8ULP. i.MX 8ULP is part of the ULP family with emphasis on extreme low-power techniques using the 28 nm fully depleted silicon on insulator process. Like i.MX 7ULP, i.MX 8ULP continues to be based on asymmetric architecture, however will add a third DSP domain for advanced voice/audio capability and a Graphics domain where it is possible to access graphics resources from the application side or the realtime side. Reviewed-by:
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Adam Ford authored
The baseboard has support for a TDNext 5640 Camera which uses an OV5640 connected to a 2-lane CSI2 interface. With the CSI and mipi_csi2 drivers pointing to an OV5640 camera, the media pipeline can be configured with the following: media-ctl --links "'ov5640 1-003c':0->'imx7-mipi-csis.0':0[1]" The camera and various nodes in the pipeline can be configured for UYVY: media-ctl -v -V "'ov5640 1-003c':0 [fmt:UYVY8_1X16/640x480 field:none]" media-ctl -v -V "'csi':0 [fmt:UYVY8_1X16/640x480 field:none]" Signed-off-by: -
Adam Ford authored
There is a csi bridge and csis interface that tie together to allow csi2 capture. Signed-off-by:
Laurent Pinchart <laurent.pinchart@ideasonboard.com> Reviewed-by:
Tim Harvey <tharvey@gateworks.com> Tested-by:
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David Heidelberg authored
fsl,tmu-calibration is in u32-matrix. Use matching property syntax. No functional changes. Fixes warnings as: $ make dtbs_check ... arch/arm64/boot/dts/freescale/imx8mq-librem5-r3.dt.yaml: tmu@30260000: \ fsl,tmu-calibration:0: Additional items are not allowed (1, 41, 2, 47, \ 3, 53, 4, 61, 5, 67, 6, 75, 7, 81, 8, 87, 9, 95, 10, 103, 11, 111, 65536, \ 27, 65537, 35, 65538, 43, 65539, 51, 65540, 59, 65541, 67, 65542, 75, \ 65543, 85, 65544, 93, 65545, 103, 65546, 112, 131072, 23, 131073, 35, \ 131074, 45, 131075, 55, 131076, 65, 131077, 75, 131078, 87, 131079, 99, \ 131080, 111, 196608, 21, 196609, 33, 196610, 45, 196611, 57, 196612, 69, \ 196613, 83, 196614, 95, 196615, 113 were unexpected) From schema: Documentation/devicetree/bindings/thermal/qoriq-thermal.yaml ... Signed-off-by:
David Heidelberg <david@ixit.cz> Signed-off-by:
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