- Mar 25, 2020
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Yousong Zhou authored
This furthers what commit 42b10815 ("MIPS: Don't compile math-emu when CONFIG_MIPS_FP_SUPPORT=n") has done Signed-off-by:
Yousong Zhou <yszhou4tech@gmail.com> Signed-off-by:
Thomas Bogendoerfer <tsbogend@alpha.franken.de>
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Huacai Chen authored
LDDIR/LDPTE is Loongson-3's acceleration for Page Table Walking. If BD (Base Directory, the 4th page directory) is not enabled, then GDOffset is biased by BadVAddr[63:62]. So, if GDOffset (aka. BadVAddr[47:36] for Loongson-3) is big enough, "0b11(BadVAddr[63:62])|BadVAddr[47:36]|...." can far beyond pg_swapper_dir. This means the pg_swapper_dir may NOT be accessed by LDDIR correctly, so fix it by set PWDirExt in CP0_PWCtl. Cc: <stable@vger.kernel.org> Signed-off-by:
Pei Huang <huangpei@loongson.cn> Signed-off-by:
Huacai Chen <chenhc@lemote.com> Signed-off-by:
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Masahiro Yamada authored
MIPS provides multiple definitions for the following functions: fw_init_cmdline __delay __udelay __ndelay memmove __rmemcpy memcpy __copy_user The generic ones are defined in lib-y objects, which are overridden by the Octeon ones when CONFIG_CAVIUM_OCTEON_SOC is enabled. The use of EXPORT_SYMBOL in static libraries potentially causes a problem for the llvm linker [1]. So, I want to forcibly link lib-y objects to vmlinux when CONFIG_MODULES=y. As a groundwork, we must fix multiple definitions that have previously been hidden by lib-y. If you look at lib/string.c, arch can define __HAVE_ARCH_* to opt out the generic implementation. Similarly, this commit adds CONFIG_HAVE_PLAT_* to allow a platform to opt out the MIPS generic code. [1]: https://github.com/ClangBuiltLinux/linux/issues/515 Reported-by:
kbuild test robot <lkp@intel.com> Signed-off-by:
Masahiro Yamada <masahiroy@kernel.org> Signed-off-by:
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Jiaxun Yang authored
To include newly added irqchip drivers. Signed-off-by:
Jiaxun Yang <jiaxun.yang@flygoat.com> Signed-off-by:
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Jiaxun Yang authored
Load proper dtb according to firmware passed parameters and CPU PRID. Signed-off-by:
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Jiaxun Yang authored
Add generic device dts for Loongson-3 devices. They are currently almost identical but will be different later. Some PCH devices like PCI Host Bridge is still enabled by platform code for now. Signed-off-by:
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Jiaxun Yang authored
Prepare for later dts. Signed-off-by:
Rob Herring <robh@kernel.org> Co-developed-by:
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Jiaxun Yang authored
We've made generic irqchip drivers for Loongson-3 platform, it's time to say goodbye to these legacy code. Signed-off-by:
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Jiaxun Yang authored
Document Loongson-3 HyperTransport PIC controller. Signed-off-by:
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Jiaxun Yang authored
This controller appeared on Loongson-3 family of chips to receive interrupts from PCH PIC. It is a I8259 with optimized interrupt polling flow. We can poll interrupt number from HT vector directly but still have to follow standard I8259 routines to mask, unmask and EOI. Signed-off-by:
Marc Zyngier <maz@kernel.org> Signed-off-by:
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Jiaxun Yang authored
Document Loongson I/O Interrupt controller. Signed-off-by:
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Jiaxun Yang authored
The 1.0 version of that controller has a bug that status bit of LPC IRQ sometimes doesn't get set correctly. So we can always blame LPC IRQ when spurious interrupt happens at the parent interrupt line which LPC IRQ supposed to route to. Signed-off-by:
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Jiaxun Yang authored
This controller appeared on Loongson family of chips as the primary package interrupt source. Signed-off-by:
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- Mar 24, 2020
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Bartlomiej Zolnierkiewicz authored
Since the au1xxx-ide IDE host driver is no longer needed its documentation can be removed. Acked-by:
Manuel Lauss <manuel.lauss@gmail.com> Acked-by:
Christoph Hellwig <hch@lst.de> Signed-off-by:
Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com> Signed-off-by:
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Bartlomiej Zolnierkiewicz authored
Since the only user of this header (au1xxx-ide IDE host driver) is now gone it can also be removed. Acked-by:
Paul Burton <paulburton@kernel.org> Acked-by:
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Bartlomiej Zolnierkiewicz authored
Commit 54ff4a1d ("MIPS: Alchemy: pata_platform for DB1200") from year 2014 converted the only user of au1xxx-ide IDE host driver (MIPS Alchemy DB1200 platform) to use pata_platform libata host driver instead. This patch removes dead au1xxx-ide driver code. Acked-by:
David S. Miller <davem@davemloft.net> Acked-by:
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- Mar 23, 2020
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Tiezhu Yang authored
Enable DMI scanning on the MIPS architecture, this setups DMI identifiers (dmi_system_id) for printing it out on task dumps and prepares DIMM entry information (dmi_memdev_info) from the SMBIOS table. With this patch, the driver can easily match various of mainboards. In the SMBIOS reference specification, the table anchor string "_SM_" is present in the address range 0xF0000 to 0xFFFFF on a 16-byte boundary, but there exists a special case for Loongson platform, when call function dmi_early_remap, it should specify the start address to 0xFFFE000 due to it is reserved for SMBIOS and can be normally access in the BIOS. This patch works fine on the Loongson 3A3000 platform which belongs to MIPS architecture and has no influence on the other architectures such as x86 and ARM. Additionally, in order to avoid the unknown risks on the mips platform which is not MACH_LOONGSON64, the DMI config is better to depend on MACH_LOONGSON64. If other mips platform also needs this DMI feature in the future, the "depends on" condition can be modified. Co-developed-by:
Yinglu Yang <yangyinglu@loongson.cn> Signed-off-by:
Tiezhu Yang <yangtiezhu@loongson.cn> Reviewed-by:
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Tiezhu Yang authored
Use SMBIOS_ENTRY_POINT_SCAN_START instead of 0xF0000, because other archtecture maybe use a special start address such as 0xFFFE000 for Loongson platform. Signed-off-by:
Jean Delvare <jdelvare@suse.de> Signed-off-by:
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Sergio Paracuellos authored
mt7621 SoC has its own 'ralink_soc_info' structure with some information about the soc itself. Pcie controller and pcie phy drivers for this soc which are still in staging git tree make uses of 'soc_device_attribute' looking for revision 'E2' in order to know if reset lines are or not inverted. This way of doing things seems to be necessary in order to make things clean and properly. Hence, introduce this 'soc_device' to be able to properly use those attributes in drivers. Also set 'data' pointer points to the struct 'ralink_soc_info' to be able to export also current soc information using this mechanism. Cc: Paul Burton <paul.burton@mips.com> Cc: ralf@linux-mips.org Cc: jhogan@kernel.org Cc: john@phrozen.org Cc: NeilBrown <neil@brown.name> Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Cc: linux-mips@vger.kernel.org Signed-off-by:
Sergio Paracuellos <sergio.paracuellos@gmail.com> Signed-off-by:
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H. Nikolaus Schaller authored
a) configure for supporting modules Not all drivers need to be compiled into the kernel. Support building and loading of kernel modules. b) compile leds-gpio driver into the kernel and configure for LED triggers DTS has been augmented to add some gpio-leds. We need the leds-gpio driver and enable the triggers. c) configure CONFIG_REGULATOR_ACT8865 for PMU The PMU on the CI20 board is an ACT8600 using the ACT8865 driver. Since it is not compiled, the PMU and the CI20 board is running in power-on reset state of the PMU. d) compile gpio-ir driver The CI20 board has a gpio based IR receiver. e) configure for CONFIG_KEYBOARD_GPIO=m The SW1 button is hooked up to send input events. Signed-off-by:
H. Nikolaus Schaller <hns@goldelico.com> Reviewed-by:
Paul Cercueil <paul@crapouillou.net> Signed-off-by:
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H. Nikolaus Schaller authored
a) add DT node for SW1 as Enter button The SW1 button can be used as a simple one-button keyboard and is connected to PD17. Note: SW1 has a second meaning to change the boot sequence when pressed while powering on. b) give eth0_power a defined voltage. This is a 3.3V power switch (DVNET3.3V). Signed-off-by:
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Alex Smith authored
The infrared sensor on the CI20 board is connected to a GPIO and can be operated by using the gpio-ir-recv driver. Add a DT node for the sensor to allow that driver to be used. Signed-off-by:
Alex Smith <alex.smith@imgtec.com> Signed-off-by:
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Thomas Bogendoerfer authored
Pull in mips-fixes avoiding conflicts with more CI20 DT changes. A few MIPS fixes: - DT fixes for CI20 - Fix command line handling - Correct patchwork URL Signed-off-by:
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- Mar 19, 2020
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Tiezhu Yang authored
Fix the following checkpatch error: ERROR: do not initialise statics to 0 #125: FILE: loongson64/numa.c:125: + static unsigned long num_physpages = 0; Signed-off-by:
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bibo mao authored
There are some common header files which are referenced locally with #includenext method, includenext is tricky method and only used on mips platform. This patech removes includenext method, replace it with defailed pathname prefix for header files. This patch passes to compile on all mips platform with defconfig, and is verified on my loongson64 box. Changes: -------- v2: - Fix compiling issue on malta platform Reported-by:
bibo mao <maobibo@loongson.cn> Signed-off-by:
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YunQiang Su authored
Some userland application/program runtime/dynamic loaded need to know about the current ISA level to use the best runtime. While kernel doesn't provides this info. ELF_PLATFORM only provides some info about the CPU, with very few info, for example, the value is "mips" for both 24Kc and P6600. Currently ELF_BASE_PLATFORM is not used by MIPS (only by powerpc). So we cant set its value as: mips2, mips3, mips4, mips5, mips32, mips32r2, mips32r6 mips64, mips64r2, mips64r6 Then in userland, we can get it by: getauxval(AT_BASE_PLATFORM) The only problem is that it seems has different defination than ppc: on ppc, it is the mircoarchitecture while now we use it as ISA level on MIPS. Signed-off-by:
YunQiang Su <syq@debian.org> Reviewed-by:
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- Mar 16, 2020
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Kamal Dasu authored
Zephyr secondary cache is 256KB, 128B lines. 32B sectors. A secondary cache line can contain two instruction cache lines (64B), or four data cache lines (32B). Hardware prefetch Cache detects stream access, and prefetches ahead of processor access. Add support to invalidate BMIPS5000 cpu zephyr secondary cache module (ZSCM) on DMA from device so that data returned is coherent during DMA read operations. Signed-off-by:
Kamal Dasu <kdasu.kdev@gmail.com> Reviewed-by:
Florian Fainelli <f.fainelli@gmail.com> Signed-off-by:
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afzal mohammed authored
Recently all usages of setup_irq() was replaced by request_irq(). request_irq() does a few sanity checks that were not done in setup_irq(), if they fail irq registration will fail. One of the check is to ensure that non-NULL dev_id is passed in the case of shared irq. This caused malta on qemu to hang. Fix it by passing handler as dev_id to all request_irq()'s that are shared. For sni, instead of passing non-NULL dev_id, remove shared irq flags. Fixes: ac8fd122 ("MIPS: Replace setup_irq() by request_irq()") Reported-by:
Nathan Chancellor <natechancellor@gmail.com> Suggested-by:
afzal mohammed <afzal.mohd.ma@gmail.com> Tested-by:
Guenter Roeck <linux@roeck-us.net> Tested-by:
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- Mar 09, 2020
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Thomas Bogendoerfer authored
MIPS patchwork lives on patchwork.kernel.org for quite some time. Signed-off-by:
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- Mar 07, 2020
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H. Nikolaus Schaller authored
Interrupts should not be specified by interrupt line but by gpio parent and reference. Fixes: 73f2b940 ("MIPS: CI20: DTS: Add I2C nodes") Cc: stable@vger.kernel.org Signed-off-by:
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H. Nikolaus Schaller authored
There is a ACT8600 on the CI20 board and the bindings of the ACT8865 driver have changed without updating the CI20 device tree. Therefore the PMU can not be probed successfully and is running in power-on reset state. Fix DT to match the latest act8865-regulator bindings. Fixes: 73f2b940 ("MIPS: CI20: DTS: Add I2C nodes") Cc: stable@vger.kernel.org Signed-off-by:
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- Mar 05, 2020
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afzal mohammed authored
request_irq() is preferred over setup_irq(). Invocations of setup_irq() occur after memory allocators are ready. Per tglx[1], setup_irq() existed in olden days when allocators were not ready by the time early interrupts were initialized. Hence replace setup_irq() by request_irq(). remove_irq() has been replaced by free_irq() as well. There were build error's during previous version, couple of which was reported by kbuild test robot <lkp@intel.com> of which one was reported by Thomas Bogendoerfer <tsbogend@alpha.franken.de> as well. There were a few more issues including build errors, those also have been fixed. [1] https://lkml.kernel.org/r/alpine.DEB.2.20.1710191609480.1971@nanos Signed-off-by:
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Gustavo A. R. Silva authored
There is a potential NULL pointer dereference in case kzalloc() fails and returns NULL. Fix this by adding a NULL check on *cd* This bug was detected with the help of Coccinelle. Fixes: 64b139f9 ("MIPS: OCTEON: irq: add CIB and other fixes") Cc: stable@vger.kernel.org Signed-off-by:
Gustavo A. R. Silva <gustavo@embeddedor.com> Signed-off-by:
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Randy Dunlap authored
Fix wording in NUMA help text. Signed-off-by:
Randy Dunlap <rdunlap@infradead.org> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: Paul Burton <paulburton@kernel.org> Cc: linux-mips@vger.kernel.org Reviewed-by:
Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by:
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- Feb 28, 2020
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Oleksij Rempel authored
Default printk log level is KERN_WARNING. This makes automatic log parsing problematic, since we get false positive alarms on not critical information. Set all not critical cache related information to KERN_INFO, the same level as used on most kernel drivers. Signed-off-by:
Oleksij Rempel <o.rempel@pengutronix.de> Signed-off-by:
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YueHaibing authored
There is no need to have the 'struct device_node *node' variable static since new value always be assigned before use it. Signed-off-by:
YueHaibing <yuehaibing@huawei.com> Signed-off-by:
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- Feb 27, 2020
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Paul Cercueil authored
The CONFIG_MIPS_CMDLINE_DTB_EXTEND option is used so that the kernel arguments provided in the 'bootargs' property in devicetree are extended with the kernel arguments provided by the bootloader. The code was broken, as it didn't actually take any of the kernel arguments provided in devicetree when that option was set. Fixes: 7784cac6 ("MIPS: cmdline: Clean up boot_command_line initialization") Cc: stable@vger.kernel.org Signed-off-by:
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- Feb 25, 2020
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Paul Burton authored
My time with MIPS the company has reached its end, and so at best I'll have little time spend on maintaining arch/mips/. Ralf last authored a patch over 2 years ago, the last time he committed one is even further back & activity was sporadic for a while before that. The reality is that he isn't active. Having a new maintainer with time to do things properly will be beneficial all round. Thomas Bogendoerfer has been involved in MIPS development for a long time & has offered to step up as maintainer, so add Thomas and remove myself & Ralf from the MIPS entry. Ralf already has an entry in CREDITS to honor his contributions, so this just adds one for me. Signed-off-by:
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- Feb 20, 2020
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Finn Thain authored
Enable some options for machine type, framebuffer, serial controller and ATA interfaces. This allows a jazz_defconfig build to work on the emulated MIPS Magnum machine provided by qemu-system-mips64el. Reviewed-by:
Finn Thain <fthain@telegraphics.com.au> Signed-off-by:
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Finn Thain authored
Remove some redundant assignments, that have no effect on 'make jazz_defconfig': CONFIG_INET_XFRM_MODE_TRANSPORT=m CONFIG_INET_XFRM_MODE_TUNNEL=m CONFIG_CRYPTO_HMAC=y Also drop the settings relating to crypto, wireless, advanced networking etc. The Kconfig defaults for these options are fine. This reduces the size of vmlinux so it can be launched by "NetBSD/arc Bootstrap, Revision 1.1", which is conveniently available on NetBSD/arc 5.1 ISO images. Tested-by:
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