- Mar 22, 2018
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Ulrich Hecht authored
Use union vin_data and VIN_DATA_PIN_GROUP() to reduce redundancies in pin definitions. Signed-off-by:
Ulrich Hecht <ulrich.hecht+renesas@gmail.com> Signed-off-by:
Geert Uytterhoeven <geert+renesas@glider.be>
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Ulrich Hecht authored
Use union vin_data and VIN_DATA_PIN_GROUP() to reduce redundancies in pin definitions. Signed-off-by:
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Ulrich Hecht authored
Use union vin_data and VIN_DATA_PIN_GROUP() to reduce redundancies in pin definitions. Signed-off-by:
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Ulrich Hecht authored
RGB666 has a pin assignment that differs from the other formats. Fixes: fbd452ae ("pinctrl: sh-pfc: r8a77995: Add VIN4 pins, groups and function") Signed-off-by:
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Ulrich Hecht authored
RGB666 has a pin assignment that differs from the other formats. Fixes: 8db6cbab ("pinctrl: sh-pfc: r8a7796: Add VIN4, VIN5 pins, groups and functions") Signed-off-by:
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Ulrich Hecht authored
RGB666 has a pin assignment that differs from the other formats. Fixes: 6b4de408 ("pinctrl: sh-pfc: r8a7795: Add VIN4, VIN5 pins, groups and functions") Signed-off-by:
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Geert Uytterhoeven authored
On other Renesas SoCs, the pin group for the MDIO bus is named "mdio" instead of "mdc". Fix the inconsistency, while retaining backwards compatibility with old DTBs using a pin group alias. Fixes: 66abd968 ("pinctrl: sh-pfc: r8a77995: Add EthernetAVB pins, groups and functions") Signed-off-by:
Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
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Geert Uytterhoeven authored
On other Renesas SoCs, the pin group for the MDIO bus is named "mdio" instead of "mdc". Fix the inconsistency, while retaining backwards compatibility with old DTBs using a pin group alias. Fixes: fa3e8b71 ("pinctrl: sh-pfc: r8a77965: Add EtherAVB groups/functions") Signed-off-by:
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Geert Uytterhoeven authored
On other Renesas SoCs, the pin group for the MDIO bus is named "mdio" instead of "mdc". Fix the inconsistency, while retaining backwards compatibility with old DTBs using a pin group alias. Fixes: 41397032 ("pinctrl: sh-pfc: r8a7796: Add group for AVB MDIO and MII pins") Fixes: 9c99a63e ("pinctrl: sh-pfc: r8a7796: Add EtherAVB pins, groups and functions") Signed-off-by:
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Geert Uytterhoeven authored
On other Renesas SoCs, the pin group for the MDIO bus is named "mdio" instead of "mdc". Fix the inconsistency, while retaining backwards compatibility with old DTBs using a pin group alias. Fixes: b25719eb ("pinctrl: sh-pfc: r8a7795: Add group for AVB MDIO and MII pins") Fixes: 819fd4bf ("pinctrl: sh-pfc: r8a7795: add EtherAVB support") Signed-off-by:
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Geert Uytterhoeven authored
On other Renesas SoCs, the pin group for the MDIO bus is named "mdio" instead of "mdc". Fix the inconsistency, while retaining backwards compatibility with old DTBs using a pin group alias. Fixes: 30c078de ("pinctrl: sh-pfc: r8a7795: Add EtherAVB pins, groups and function") Signed-off-by:
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Geert Uytterhoeven authored
Add a macro to refer to another pin group with a different name. This will be used to rename wrongly-named pin groups, while retaining backwards compatibility with old DTBs. Signed-off-by:
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Geert Uytterhoeven authored
The pin controller drivers for all R-Car Gen2 SoCs have entries for the EtherAVB TX_ER pins in their EtherAVB MII groups, except on R-Car H2. Add the missing pin to restore consistency. Note that technically TX_ER is an optional signal in the MII bus, and thus could have its own group, but this is currently not supported by any R-Car Gen2 pin controller driver. Fixes: 19ef697d ("sh-pfc: r8a7790: add EtherAVB pin groups") Signed-off-by:
Simon Horman <horms+renesas@verge.net.au>
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- Mar 14, 2018
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Sergei Shtylyov authored
Add the EtherAVB pin groups to the R8A77970 PFC driver. Signed-off-by:
Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Signed-off-by:
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- Mar 09, 2018
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Sergei Shtylyov authored
Add the PFC support for the R8A77980 SoC including pin groups for some on-chip devices such as AVB, CAN-FD, GETHER, [H]SCIF, I2C, INTC-EX, MMC, MSIOF, PWM, and VIN... Based on the original (and large) patch by Vladimir Barinov. Signed-off-by:
Vladimir Barinov <vladimir.barinov@cogentembedded.com> Signed-off-by:
Rob Herring <robh@kernel.org> Signed-off-by:
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Sergei Shtylyov authored
They follow the style of the existing PORT_GP_CFG_<n>() macros and will be used by a follow-up patch for the R8A77980 SoC. Based on the original (and large) patch by Vladimir Barinov. Signed-off-by:
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- Mar 05, 2018
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Takeshi Kihara authored
This patch adds USB30 (USB3.0 host) pin, group and function to the R8A77965 SoC. Signed-off-by:
Takeshi Kihara <takeshi.kihara.df@renesas.com> Signed-off-by:
Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Signed-off-by:
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Takeshi Kihara authored
This patch adds USB{0,1} (USB2.0 host) pins, groups and functions to the R8A77965 SoC. Signed-off-by:
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- Feb 28, 2018
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Takeshi Kihara authored
Most pins on the R8A77965 SoC can be configured in GPIO mode for interrupt and GPIO functionality, while a couple of them can also be routed to the INTC-EX hardware block (formerly known as IRQC). On R8A77965 the INTC-EX hardware handles pins IRQ0 -> IRQ5 and this patch adds support for them to the PFC driver as "intc_ex_irqN". Based on a similar patch for the R8A7795 PFC driver by Magnus Damm <damm+renesas@opensource.se>. Signed-off-by:
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- Feb 26, 2018
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Ulrich Hecht authored
This patch adds VIN4 pins, groups and function for the R8A77995 (D3) SoC. Signed-off-by:
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Ulrich Hecht authored
This patch adds VIN4 and VIN5 pins, groups and functions for the R8A7795 SoC. Signed-off-by:
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Ulrich Hecht authored
This patch adds VIN4 and VIN5 pins, groups and functions for the R8A7796 SoC. Signed-off-by:
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- Feb 21, 2018
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Jacopo Mondi authored
Add EtherAVB groups and functions definitions for R-Car M3-N. Signed-off-by:
Jacopo Mondi <jacopo+renesas@jmondi.org> Signed-off-by:
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Jacopo Mondi authored
Add SCIF[0-5] groups and pin function definitions for R-Car M3-N. Signed-off-by:
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Jacopo Mondi authored
Add initial PFC support for R-Car M3-N (r8a77965) SoC. No groups or functions defined, just pin and registers enumeration. Signed-off-by:
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Takeshi Kihara authored
This patch adds TMU TCLK{1,2} pins, groups and functions to the R8A7796 SoC. Signed-off-by: -
Takeshi Kihara authored
This patch adds TMU TCLK{1,2} pins, groups and functions to the R8A7795 ES1.x SoC. Signed-off-by: -
Takeshi Kihara authored
This patch adds TMU TCLK{1,2} pins, groups and functions to the R8A7795 SoC. Signed-off-by: -
Takeshi Kihara authored
This patch adds HDMI0 CEC pin, group and function to the R8A7796 SoC. Signed-off-by:
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Takeshi Kihara authored
This patch adds HDMI0 CEC pin, group and function to the R8A7795 ES1.x SoC. Signed-off-by:
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Takeshi Kihara authored
This patch adds HDMI0 CEC pin, group and function to the R8A7795 SoC. Signed-off-by:
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Takeshi Kihara authored
This patch fixes to set IPSR and MOD_SEL when using NFDATA{14,15}_A and NF{RB,WP}_N_A pin function is selected. And renamess MOD_SEL2 bit22 value definition name to SEL_NDFC. This is a correction to the incorrect implementation of MOD_SEL register pin assignment for R8A7796 SoC specification of R-Car Gen3 Hardware User's Manual Rev.0.53E. Fixes: f9aece73 ("pinctrl: sh-pfc: Initial R8A7796 PFC support") Signed-off-by: -
Takeshi Kihara authored
This patch fixes MOD_SEL1 bit20 and MOD_SEL2 bit20, bit21 pin assignment for SSI pins group. This is a correction to the incorrect implementation of MOD_SEL register pin assignment for R8A7796 SoC specification of R-Car Gen3 Hardware User's Manual Rev.0.51E or later. Fixes: f9aece73 ("pinctrl: sh-pfc: Initial R8A7796 PFC support") Signed-off-by:
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Takeshi Kihara authored
This patch fixes MOD_SEL1 bit20 and MOD_SEL2 bit20, bit21 pin assignment for SSI pins group. This is a correction because MOD_SEL register specification for R8A7795 ES2.0 SoC was changed in R-Car Gen3 Hardware User's Manual Rev.0.53E. Fixes: b205914c ("pinctrl: sh-pfc: r8a7795: Add support for R-Car H3 ES2.0") Signed-off-by:
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- Feb 20, 2018
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Ulrich Hecht authored
This patch adds DU pins, groups and function for the R8A77995 (D3) SoC. Signed-off-by:
Kieran Bingham <kieran.bingham+renesas@ideasonboard.com> Signed-off-by:
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- Feb 12, 2018
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Markus Elfring authored
A string which did not contain a data format specification should be put into a sequence. Thus use the corresponding function "seq_puts". This issue was detected by using the Coccinelle software. Signed-off-by:
Markus Elfring <elfring@users.sourceforge.net> Signed-off-by:
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Geert Uytterhoeven authored
R8A7778 is R-Car (not R-Mobile) M1. Signed-off-by:
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Linus Torvalds authored
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Al Viro authored
except, again, POLLFREE and POLL_BUSY_LOOP. With this, we finally get to the promised end result: - POLL{IN,OUT,...} are plain integers and *not* in __poll_t, so any stray instances of ->poll() still using those will be caught by sparse. - eventpoll.c and select.c warning-free wrt __poll_t - no more kernel-side definitions of POLL... - userland ones are visible through the entire kernel (and used pretty much only for mangle/demangle) - same behavior as after the first series (i.e. sparc et.al. epoll(2) working correctly). Signed-off-by:Al Viro <viro@zeniv.linux.org.uk> Signed-off-by:
Linus Torvalds <torvalds@linux-foundation.org>
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Linus Torvalds authored
This is the mindless scripted replacement of kernel use of POLL* variables as described by Al, done by this script: for V in IN OUT PRI ERR RDNORM RDBAND WRNORM WRBAND HUP RDHUP NVAL MSG; do L=`git grep -l -w POLL$V | grep -v '^t' | grep -v /um/ | grep -v '^sa' | grep -v '/poll.h$'|grep -v '^D'` for f in $L; do sed -i "-es/^\([^\"]*\)\(\<POLL$V\>\)/\\1E\\2/" $f; done done with de-mangling cleanups yet to come. NOTE! On almost all architectures, the EPOLL* constants have the same values as the POLL* constants do. But they keyword here is "almost". For various bad reasons they aren't the same, and epoll() doesn't actually work quite correctly in some cases due to this on Sparc et al. The next patch from Al will sort out the final differences, and we should be all done. Scripted-by:
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