Merge tag 'tegra-for-4.10-bus' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into next/drivers

bus: Add Tegra GMI support

This provides a driver to enable the use of the Generic Memory Interface
found on Tegra SoCs that can host various types of high-speed devices.

* tag 'tegra-for-4.10-bus' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux

:
  bus: Add support for Tegra Generic Memory Interface
  dt/bindings: Add bindings for Tegra GMI controller

Signed-off-by: Olof Johansson <olof@lixom.net>

Merge tag 'tegra-for-4.10-reset' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into next/drivers

reset: Add Tegra BPMP reset driver

This contains a patch which implements a reset driver using the services
provided by the BPMP firmware (via the MRQ_RESET request).

* tag 'tegra-for-4.10-reset' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux

:
  reset: Add Tegra BPMP reset driver

Signed-off-by: Olof Johansson <olof@lixom.net>

Merge tag 'tegra-for-4.10-firmware' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into next/drivers

firmware: Add Tegra IVC and BPMP support

IVC is an inter-processor communication protocol that uses shared memory
to exchange data between processors. The BPMP driver makes use of this
to communicate with the Boot and Power Management Processor (BPMP) and
uses an additional hardware synchronization primitive from the HSP block
to signal availability of new data (doorbell).

Firmware running on the BPMP implements a number of services such as the
control of clocks and resets within the system, or the ability to ungate
or gate power partitions.

* tag 'tegra-for-4.10-firmware' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux

:
  dt-bindings: firmware: Allow child nodes inside the Tegra BPMP
  dt-bindings: Add power domains to Tegra BPMP firmware
  firmware: tegra: Add BPMP support
  firmware: tegra: Add IVC library
  dt-bindings: firmware: Add bindings for Tegra BPMP

Signed-off-by: Olof Johansson <olof@lixom.net>

Merge tag 'tegra-for-4.10-mailbox' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into next/drivers

mailbox: Add Tegra HSP driver

This contains the device tree bindings and a driver for the Tegra HSP, a
hardware block that provides hardware synchronization primitives and is
the foundation for inter-processor communication between CPU and BPMP.

* tag 'tegra-for-4.10-mailbox' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux

:
  mailbox: tegra-hsp: Use after free in tegra_hsp_remove_doorbells()
  mailbox: Add Tegra HSP driver
  dt-bindings: mailbox: Add Tegra HSP binding
  soc/tegra: Add Tegra186 support

Signed-off-by: Olof Johansson <olof@lixom.net>

Reset controller changes for v4.10

- remove obsolete STiH41[56] platform support
- add Oxford Semiconductor OX820 support
- add reset index include files for OX810SE and OX820
- make drivers with boolean Kconfig options explicitly
  non-modular
- allow shared pulsed resets via reset_control_reset, which
  in this case means that the reset must have been triggered
  once, but possibly earlier, after the function returns, and
  is never triggered again for the lifetime of the reset
  control

* tag 'reset-for-4.10' of git://git.pengutronix.de/git/pza/linux

:
  reset: allow using reset_control_reset with shared reset
  reset: lpc18xx: make it explicitly non-modular
  reset: zynq: make it explicitly non-modular
  reset: sunxi: make it explicitly non-modular
  reset: socfpga: make it explicitly non-modular
  reset: berlin: make it explicitly non-modular
  dt-bindings: reset: oxnas: Update for OX820
  dt-bindings: reset: oxnas: Add include file with reset indexes
  reset: oxnas: Add OX820 support
  reset: sti: softreset: Remove obsolete platforms from dt binding doc.
  reset: sti: Remove STiH415/6 reset support

Signed-off-by: Olof Johansson <olof@lixom.net>

Merge tag 'at91-ab-4.10-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/abelloni/linux into next/drivers

Drivers for 4.10:

 - few fixes for the memory drivers
 - minimal security module driver
 - support for the Secure SRAM

* tag 'at91-ab-4.10-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/abelloni/linux

:
  misc: sram: add Atmel securam support
  misc: sram: document new compatible
  ARM: at91: add secumod register definitions
  Documentation: dt: atmel-at91: Document secumod bindings
  memory: atmel-sdramc: use builtin_platform_driver to simplify the code
  memory: atmel-ebi: fix return value check in at91_ebi_dev_disable()

Signed-off-by: Olof Johansson <olof@lixom.net>

This driver uses the services provided by the BPMP firmware driver to
implement a reset driver based on the MRQ_RESET request.

Acked-by: Philipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: Thierry Reding <treding@nvidia.com>

The BPMP implements some services which must be represented by separate
nodes. For example, it can provide access to certain I2C controllers,
and the I2C bindings represent each I2C controller as a device tree
node. Update the binding to describe how the BPMP supports this.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Rob Herring <robh@kernel.org>
Acked-by: Jon Hunter <jonathanh@nvidia.com>
[treding@nvidia.com: renamed bpmp-i2c to i2c as per Rob]
Signed-off-by: Thierry Reding <treding@nvidia.com>

The Tegra186 BPMP is also a provider of power domains. Enhance the
device tree binding to describe this.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Rob Herring <robh@kernel.org>
Acked-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>

The Boot and Power Management Processor (BPMP) is a co-processor found
on Tegra SoCs. It is designed to handle the early stages of the boot
process and offload power management tasks (such as clocks, resets,
powergates, ...) as well as system control services.

Compared to the ARM SCPI, the services provided by BPMP are message-
based rather than method-based. The BPMP firmware driver provides the
services to transmit data to and receive data from the BPMP. Users can
also register a Message ReQuest (MRQ), for which a service routine will
be run when a corresponding event is received from the firmware.

A set of messages, called the BPMP ABI, are specified for a number of
different services provided by the BPMP (such as clocks or resets).

Based on work by Sivaram Nair <sivaramn@nvidia.com> and Joseph Lo
<josephl@nvidia.com>.

Signed-off-by: Thierry Reding <treding@nvidia.com>

The Inter-VM communication (IVC) is a communication protocol which is
designed for interprocessor communication (IPC) or the communication
between the hypervisor and the virtual machine with a guest OS.

Message channels are used to communicate between processors. They are
backed by DRAM or SRAM, so care must be taken to maintain coherence of
data.

The IVC library maintains memory-based descriptors for the transmission
and reception channels as well as the data coherence of the counter and
payload. Clients, such as the driver for the BPMP firmware, can use the
library to exchange messages with remote processors.

Based on work by Peter Newman <pnewman@nvidia.com> and Joseph Lo
<josephl@nvidia.com>.

Signed-off-by: Thierry Reding <treding@nvidia.com>

The Boot and Power Management Processor (BPMP) is a co-processor found
in Tegra SoCs. It is designed to handle the early stages of the boot
process as well as to offload power management tasks (such as clocks,
resets, powergates, ...).

The binding document defines the resources that are used by the BPMP
firmware, which implements the interprocessor communication (IPC)
between the CPU and the BPMP.

Signed-off-by: Joseph Lo <josephl@nvidia.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Rob Herring <robh@kernel.org>
Acked-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>

We have to use the _safe version of list_for_each() because we're
freeing the pointer as we go along.  (This might not show up testing
depending on what config options you have enabled).

Fixes: 0fe88461

 ("mailbox: Add Tegra HSP driver")
Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>

This driver exposes a mailbox interface for interprocessor communication
using the Hardware Synchronization Primitives (HSP) module's doorbell
mechanism. There are multiple HSP instances and they provide additional
features such as shared mailboxes, shared and arbitrated semaphores.

A driver for a remote processor can use the mailbox client provided by
the HSP driver and build an IPC protocol on top of this synchronization
mechanism.

Based on work by Joseph Lo <josephl@nvidia.com>.

Acked-by: Jassi Brar <jaswinder.singh@linaro.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>

- prepare mtk-scpsys to for multi soc support
- add support for mt2701 to mtk-scpsys

* tag 'v4.9-next-soc' of https://github.com/mbgg/linux-mediatek

:
  soc: mediatek: Add MT2701 scpsys driver
  soc: mediatek: Refine scpsys to support multiple platform

Signed-off-by: Olof Johansson <olof@lixom.net>

Merge tag 'davinci-for-v4.10/drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/nsekhar/linux-davinci into next/drivers

This pull request adds two new drivers for better
support for LCD found on DaVinci DA8xx devices.

They allow configuration of memory interface and
bus priorities on the SoC to allow sufficient
bandwidth for the LCD and prevent underruns.

The DT bindings have been reviewed by Rob and
patches have been reviewed by Kevin.

* tag 'davinci-for-v4.10/drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/nsekhar/linux-davinci

:
  bus: davinci: add support for da8xx bus master priority control
  memory: davinci: add support for da8xx DDR2/mDDR controller

Signed-off-by: Olof Johansson <olof@lixom.net>

Merge tag 'qcom-drivers-for-4.10' of git://git.kernel.org/pub/scm/linux/kernel/git/agross/linux into next/drivers

Qualcomm ARM Based Driver Updates for v4.10

* Fixup QCOM SCM to use devm_reset_controller_register
* Add QCOM pinctrl to Qualcomm MAINTAINERS entry
* Add PM8994 regulator definitions
* Add stub for WCNSS_CTRL API

* tag 'qcom-drivers-for-4.10' of git://git.kernel.org/pub/scm/linux/kernel/git/agross/linux

:
  firmware: qcom: scm: Use devm_reset_controller_register()
  MAINTAINERS: add drivers/pinctrl/qcom to ARM/QUALCOMM SUPPORT
  pinctrl: pm8994: add pad voltage regulator defines
  soc: qcom: wcnss_ctrl: Stub wcnss_ctrl API

Signed-off-by: Olof Johansson <olof@lixom.net>

Merge tag 'v4.10-rockchip-drivers1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into next/drivers

Changes to the power-domain driver including counter presets now being set
by firmware on the rk3399, avoiding infite loops when powering on/off a
domain and actually returning an error if power-domain addition fails.
The last part requires usage of the (new in 4.9-rc1) pm_genpd_remove
functionality as well.

* tag 'v4.10-rockchip-drivers1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip

:
  soc: rockchip: power-domain: Handle errors from of_genpd_add_provider_onecell
  soc: rockchip: power-domain: use pm_genpd_remove in error cleanup
  soc: rockchip: power-domain: avoid infinite loop
  soc: rockchip: power-domain: Don't (incorrectly) set rk3399 up/down counts

Signed-off-by: Olof Johansson <olof@lixom.net>

The Generic Memory Interface bus can be used to connect high-speed
devices such as NOR flash, FPGAs, DSPs...

Signed-off-by: Mirza Krak <mirza.krak@gmail.com>
Tested-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Tested-on: Colibri T20/T30 on EvalBoard V3.x and GMI-Memory Board
Acked-by: Jon Hunter <jonathanh@nvidia.com>
[treding@nvidia.com: symmetry and coding style OCD]
Signed-off-by: Thierry Reding <treding@nvidia.com>

Document the devicetree bindings for the Generic Memory Interface (GMI)
bus driver found on Tegra SOCs.

Signed-off-by: Mirza Krak <mirza.krak@gmail.com>
Tested-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Tested-on: Colibri T20/T30 on EvalBoard V3.x and GMI-Memory Board
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>

Add DT binding for the Hardware Synchronization Primitives (HSP). The
HSP is designed for the processors to share resources and communicate
with one another. A set of hardware synchronization primitives for
interprocessor communication (IPC) is provided. IPC protocols can use
use these hardware synchronization primitives when operating between
processors in an AMP configuration.

Signed-off-by: Joseph Lo <josephl@nvidia.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Rob Herring <robh@kernel.org>
Acked-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>

The Tegra186 features a combination of Denver and Cortex-A57 CPU cores
and a GPU based on the Pascal architecture. It contains an ADSP with a
Cortex-A9 CPU used for audio processing, hardware video encoders and
decoders with multi-format support, ISP for image capture processing
and BPMP for power management.

Signed-off-by: Joseph Lo <josephl@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>

Create the driver for the da8xx master peripheral priority
configuration and implement support for writing to the three
Master Priority registers on da850 SoCs.

Reviewed-by: Kevin Hilman <khilman@baylibre.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
[nsekhar@ti.com: subject line adjustment]
Signed-off-by: Sekhar Nori <nsekhar@ti.com>

Create a new driver for the da8xx DDR2/mDDR controller and implement
support for writing to the Peripheral Bus Burst Priority Register.

Reviewed-by: Kevin Hilman <khilman@baylibre.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
[nsekhar@ti.com: subject line adjustment]
Signed-off-by: Sekhar Nori <nsekhar@ti.com>

Some SoCs (for example Amlogic GXBB) implement a reset controller which
only supports a reset pulse (triggered via reset_control_reset). At the
same time multiple devices (in case of the Amlogic GXBB SoC both USB
PHYs) are sharing the same reset line.

This patch allows using reset_control_reset also for shared resets.
There are limitations though:
reset_control_reset can only be used if reset_control_assert was not
used yet.
reset_control_assert can only be used if reset_control_reset was not
used yet.
For shared resets the reset is only triggered once for the lifetime of
the reset_control instance (the reset can be triggered again if all
consumers of that specific reset_control are gone, as the reset
framework will free the reset_control instance in that case).

Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>

Use devm_reset_controller_register() for the reset controller
registration and fixes the memory leak when unload the module.

Signed-off-by: Wei Yongjun <weiyongjun1@huawei.com>
Signed-off-by: Andy Gross <andy.gross@linaro.org>

When running checkpatch.pl on a new pinctrl driver in
drivers/pinctrl/qcom, I noticed a warning about creating
a new maintainer.  The drivers/pinctrl/qcom folder doesn't have
anyone assigned in the MAINTAINERS file.

Let's assign it to ARM/QUALCOMM SUPPORT.

Signed-off-by: Michael Scott <michael.scott@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>

It was a bit surprising that the device was reported to have probed just
fine, but the provider hadn't been registered.

So handle any errors when registering the provider and fail the probe
accordingly.

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Cc: Caesar Wang <wxt@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>

The newly introduced pm_genpd_remove reverts the initialization done
by pm_genpd_init and is necessary in the error path of the rockchip
power-domain driver.

Without it the driver will in the error case cleanup the devm-allocated
structures including the elements referenced in the gpd_list thus making
deactivation of unused domains (and probably later genpd accesses as
well) fail by accessing invalid pointers.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>

Merge tag 'renesas-drivers-for-v4.10' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/drivers

Renesas ARM Based SoC Drivers Updates for v4.10

* Add support for the r8a7743 SoC to rcar-sysc

* tag 'renesas-drivers-for-v4.10' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas

:
  soc: renesas: rcar-sysc: add R8A7743 support
  ARM: shmobile: r8a7743: add power domain index macros

Signed-off-by: Olof Johansson <olof@lixom.net>

The Atmel secure SRAM is connected to a security module and may be erased
automatically under certain conditions. For that reason, it is necessary to
wait for the security module to flag that SRAM accesses are allowed before
accessing it.

Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

Add atmel,sama5d2-securam to the compatible list.

Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Acked-by: Rob Herring <robh@kernel.org>

Add registers and bits definitions for the security module found on
sama5d2.

Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>

A security module is available starting with sama5d2, add its bindings.

Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Acked-by: Rob Herring <robh@kernel.org>

In some cases, we have met the infinite loop in
rockchip_pmu_set_idle_request() or rockchip_do_pmu_set_power_domain().

As the crosbug.com/p/57351 reported, the boot hangs right after this
[1.629163] bootconsole [uart8250] disabled
[1.639286] [drm:drm_core_init] Initialized drm 1.1.0 20060810
[1.645926] [drm:drm_get_platform_dev] Initialized vgem 1.0.0 20120112..
[1.654558] iommu: Adding device ff8f0000.vop to group 0
[1.660569] iommu: Adding device ff900000.vop to group 1
<hang>

This patch adds the error message and timeout to avoid infinite loop if
it fails to get the ack.

Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>

Add scpsys driver for MT2701.

mtk-scpsys now supports MT8173 (arm64) and MT2701 (arm). So it should
be enabled on both arm64 and arm platforms.

Signed-off-by: Shunli Wang <shunli.wang@mediatek.com>
Signed-off-by: James Liao <jamesjj.liao@mediatek.com>
Reviewed-by: Kevin Hilman <khilman@baylibre.com>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>

Refine scpsys driver common code to support multiple SoC / platform.

Signed-off-by: James Liao <jamesjj.liao@mediatek.com>
Reviewed-by: Kevin Hilman <khilman@baylibre.com>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>