Merge tag 'tegra-for-3.10-cleanup' of git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-tegra into next/cleanup

From Stephen Warren <swarren@wwwdotorg.org>:

ARM: tegra: cleanup

This branch includes various cleanup of the core Tegra support.

* Unification of the separate board-dt-tegra*.c files into a single
  tegra.c, now that everything is DT-driven and basically identical.
* Use of_clk_get() in the Tegra clocksource driver so that clocks are
  described in DT rather than hard-coding clock names.
* Some cleanup of the PMC-related code, with the aim that the PMC
  "driver" contains more of the code that touches PMC registers, rather
  than spreading PMC register accesses through other files.
* Conversion of the "PMC" driver to acquire resources describe in device
  tree rather than hard-coding them.
* Use of common code for the CPU sleep TLB invalidation.

This branch is based on the previous fixes pull request.

* tag 'tegra-for-3.10-cleanup' of git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-tegra

:
  ARM: tegra: use setup_mm_for_reboot rather than explicit pgd switch
  ARM: tegra: replace the CPU power on function with PMC call
  ARM: tegra: pmc: add power on function for secondary CPUs
  ARM: tegra: pmc: convert PMC driver to support DT only
  ARM: tegra: fix the PMC compatible string in DT
  ARM: tegra: pmc: add specific compatible DT string for Tegra30 and Tegra114
  ARM: tegra: refactor tegra{20,30}_boot_secondary
  clocksource: tegra: move to of_clk_get
  ARM: tegra: Unify Device tree board files
  ARM: tegra: Rename board-dt-tegra20.c to tegra.c
  ARM: tegra: Unify tegra{20,30,114}_init_early()

Conflicts:
	drivers/clocksource/tegra20_timer.c

Signed-off-by: Arnd Bergmann <arnd@arndb.de>

This is a dependency for tegra/cleanups

Signed-off-by: Arnd Bergmann <arnd@arndb.de>

Merge tag 'omap-for-v3.10/fixes-pm-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/cleanup

From Tony Lindgren <tony@atomide.com>:

Non-critical PM fix via Kevin Hilman <khilman@linaro.org>:

OMAP PM fixes for v3.10

Note that this has a dependency to omap-for-v3.10/cleanup-v2-signed.

* tag 'omap-for-v3.10/fixes-pm-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap

:
  ARM: OMAP4+: PM: Restore CPU power state to ON with clockdomain force wakeup method

Signed-off-by: Arnd Bergmann <arnd@arndb.de&lt;>

Merge tag 'omap-pm-v3.10/fixes/pm' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-omap-pm into omap-for-v3.10/fixes-pm

OMAP PM fixes for v3.10

Merge tag 'omap-for-v3.10/cleanup-v2-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/cleanup

From Tony Lindgren <tony@atomide.com>:

Clean up related changes for v3.10 merge window.
Mostly clock and PM related with removal of now unused
DMA channel definitions. The clock change to use SoC
specific lists will make it a little bit easier to
add support for new SoCs variants without having to patch
all over the place.

* tag 'omap-for-v3.10/cleanup-v2-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap

:
  ARM: OMAP4: Fix the init code to have OMAP4460 errata available in DT build
  ARM: OMAP4: PM: Now remove L4 per clockdomain static depedency with MPU
  ARM: OMAP4: PM: Remove L4 wakeup depedency with MPU since errata fix exist now
  ARM: OMAP4+: Move the CPU wakeup prepare code under smp_prepare_cpus()
  ARM: OMAP4+: Remove out of placed smp_wmb() in secondary wakeup code
  ARM: OMAP4+: Remove un-necessary cacheflush in secondary CPU boot path
  ARM: OMAP4+: Remove the un-necessary cache flush from hotplug code
  ARM: OMAP2+: PM: Remove bogus fiq_[enable/disable] tuple
  ARM: OMAP4+: Use common scratchpad SAR RAM offsets for all architectures
  ARM: OMAP2+: Remove unused DMA channel definitions
  ARM: OMAP1: Remove unused DMA channel definitions
  ARM: OMAP2+: clock data: Remove CK_* flags

Signed-off-by: Arnd Bergmann <arnd@arndb.de>

While waking up CPU from off state using clock domain force wakeup, restore
the CPU power state to ON state before putting CPU clock domain under
hardware control. Otherwise CPU wakeup might fail. The change is recommended
for all OMAP4+ devices though the PRCM weakness was observed on OMAP5
devices first.

As a result of weakness, lock-up is observed inside the hardware state
machine of local CPU PRCM and results are UN-predictable as per designers.
In software testing, we have seen hard-locks most of the time where system
gets frozen. With power domain state restored, system behaves correctly.

So update the code accordingly.

Acked-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Signed-off-by: Kevin Hilman <khilman@linaro.org>

* gic/cleanup:
  irqchip: vic: add include of linux/irq.h

Signed-off-by: Olof Johansson <olof@lixom.net>

With the include of <asm/mach/irq.h> removed, the implicit include of
linux/irq.h also disappeared. Add it back.

Signed-off-by: Olof Johansson <olof@lixom.net>

Tiny one-line typo patch.

* tag 'at91-cleanup' of git://github.com/at91linux/linux-at91

:
  ARM: at91: Fix typo in restart code panic message

Signed-off-by: Olof Johansson <olof@lixom.net>

More and more sub-architectures are using only the irqchip_init
function. Make the core code call this function if no init_irq field is
provided in the machine description to remove some boilerplate code.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Rob Herring <rob.herring@calxeda.com>
Signed-off-by: Olof Johansson <olof@lixom.net>

Merge branch 'gic' of git://git.kernel.org/pub/scm/linux/kernel/git/cmarinas/linux-aarch64 into next/cleanup

* 'gic' of git://git.kernel.org/pub/scm/linux/kernel/git/cmarinas/linux-aarch64

:
  irqchip: gic: Perform the gic_secondary_init() call via CPU notifier
  irqchip: gic: Call handle_bad_irq() directly
  arm: Move chained_irq_(enter|exit) to a generic file
  arm: Move the set_handle_irq and handle_arch_irq declarations to asm/irq.h
  + Linux 3.9-rc3

Signed-off-by: Olof Johansson <olof@lixom.net>

Fixes the following errors:
ERROR: do not initialise statics to 0 or NULL
ERROR: space required after that ',' (ctx:VxV)

Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
Signed-off-by: Olof Johansson <olof@lixom.net>

Don't treat it as an error if a partition is already in the same power
state when a user wants to power it on or off. This allows code to
proceed if no state change is required.

Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de>
Signed-off-by: Stephen Warren <swarren@nvidia.com>

This function can be used by drivers to enable power to the hardware
blocks that they drive. Most of the drivers can be built as a module
and therefore require this function to be exported.

Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de>
Signed-off-by: Stephen Warren <swarren@nvidia.com>

Merge branch 'for_3.10/omap_generic_cleanup_v2' of git://git.kernel.org/pub/scm/linux/kernel/git/ssantosh/linux into omap-for-v3.10/cleanup-v2

OMAP4460 ROM code bug needs the GIC distributor and local timer
bases to be available for the bug work around. In current code, dt
case these bases are not initialized leading to failure of the
errata work-around.

Fix it by extracting the bases from dt blob and populating them.

Reported-by: Sourav Poddar <sourav.poddar@ti.com>
Tested-by: Sourav Poddar <sourav.poddar@ti.com>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>

UART driver slave idle issue has been taken care by driver using hwmod
framework.

So we can now ger rid off the L4 per clockdomain static dependency with
MPU which was used to wrok around UART wakeup and console sluggishnesh issue
on OMAP4 SOCs.

Acked-by: Kevin Hilman <khilman@linaro.org>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>

With commit bfd6d021

 {ARM: OMAP3+: Implement timer workaround for errata
i103 and i767}, the sync and gptimer synchronization errata got fixed.

Hence the l4_wakeup static dependency with MPU can  can be removed
now. Static dependency was one of the proposed workaround but from
power savings perspective, it isn't an ideal workaround.

Acked-by: Kevin Hilman <khilman@deeprootsystems.com>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>

Move the secondary CPU wakeup prepare code under smp_prepare_cpus() where it
belongs. It was remainder of the pen release code which was borrowed from
ARM code initially.

While at it drop the un-necessary sev() and barrier which was under
prepare code.

Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>

The smp_wmb() here is out of placed and redundant. So remove it. It is
a left over of the pen_release cleanup mostly.

Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>

This was borrowed from ARM versatile code with pen_release mechanism but since
OMAP uses hardware register based synchronisation, pen_release stuff was
dropped. Unfortunately the cacheflush wasn't dropped along with it.

Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>

This was added with intial port where OMAP PM support wasn't existing
and only simple WFI based hooks were used.

This should have been cleaned up while adding the PM support but some
how fall through cracks.

So remove the cache flush code which is no longer needed now.

Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>

On OMAP platform, FIQ is reserved for secure environment only. If at all
the FIQ needs to be disabled, it involves going through security
API call. Hence the local_fiq_[enable/disable]() in the OMAP code is bogus.
On GP devices too, the fiq is disabled for non-secure software.

So just get rid of it.

Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>

Choose the common scratch pad offsets, so that same offsets can work for
OMAP4 and OMAP5 devices. It simplifies code and also allows the re-use as
is on OMAP5 devices. Note that these offsets are used by low power
code for various power state management. They are not hardware register
offsets.

Signed-off-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>

Merge tag 'omap-cleanup-a-for-3.10' of git://git.kernel.org/pub/scm/linux/kernel/git/pjw/omap-pending into omap-for-v3.10/cleanup

In the OMAP2+ clock data, replace the flags that determine whether a
clock should be registered on a given SoC with per-SoC lists.

Basic build, boot, and power management test results are available at:

http://www.pwsan.com/omap/testlogs/jk_clock_flags_cleanup_3.10/20130318100504/

This patch changes the Tegra PM code to use the setup_mm_for_reboot
helper rather than call cpu_switch_mm directly. This keeps things like
TLB invalidation in one place.

Cc: Stephen Warren <swarren@wwwdotorg.org>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>

All the calls to gic_secondary_init() pass 0 as the first argument.
Since this function is called on each CPU when starting, it can be done
in a platform-independent way via a CPU notifier registered by the GIC
code.

Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Acked-by: Rob Herring <rob.herring@calxeda.com>
Acked-by: Simon Horman <horms+renesas@verge.net.au>
Tested-by: Simon Horman <horms+renesas@verge.net.au>
Acked-by: Srinidhi Kasagar <srinidhi.kasagar@stericsson.com>
Tested-by: Dinh Nguyen <dinguyen@altera.com>
Acked-by: Nicolas Pitre <nico@linaro.org>
Tested-by: Marc Zyngier <marc.zyngier@arm.com>
Cc: Russell King <linux@arm.linux.org.uk>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Kukjin Kim <kgene.kim@samsung.com>
Cc: Sascha Hauer <kernel@pengutronix.de>
Cc: David Brown <davidb@codeaurora.org>
Cc: Bryan Huntsman <bryanh@codeaurora.org>
Cc: Tony Lindgren <tony@atomide.com>
Cc: Magnus Damm <magnus.damm@gmail.com>
Cc: Shiraz Hashim <shiraz.hashim@st.com>
Cc: Linus Walleij <linus.walleij@linaro.org>
Cc: Will Deacon <will.deacon@arm.com>
Cc: Kukjin Kim <kgene.kim@samsung.com>
Cc: Barry Song <baohua.song@csr.com>

Previously, the gic_handle_cascade_irq() function was calling the
ARM-specific do_bad_IRQ() function which calls handle_bad_irq() after
acquiring the desk->lock. Locking the cascaded IRQ desc is not needed
for error reporting, so just call handle_bad_irq() directly.

Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Tested-by: Marc Zyngier <marc.zyngier@arm.com>
Cc: Russell King <linux@arm.linux.org.uk>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Rob Herring <rob.herring@calxeda.com>

These functions have been introduced by commit 10a8c383

 (irq: introduce
entry and exit functions for chained handlers) in asm/mach/irq.h. This
patch moves them to linux/irqchip/chained_irq.h so that generic irqchip
drivers do not rely on architecture specific header files.

Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Tested-by: Marc Zyngier <marc.zyngier@arm.com>
Cc: Russell King <linux@arm.linux.org.uk>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Rob Herring <rob.herring@calxeda.com>

This patch prepares the removal of <asm/mach/irq.h> include in the
GIC and VIC irqchip drivers.

Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Tested-by: Marc Zyngier <marc.zyngier@arm.com>
Cc: Russell King <linux@arm.linux.org.uk>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Rob Herring <rob.herring@calxeda.com>

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Cc: stable <stable@vger.kernel.org> # 3.4+

Many of these channel definitions have became unused or were never used
so remove unused definitions from arch/arm/mach-omap2/dma.h using a script
below. See also notes in commit d5e7c864


("ARM: OMAP2+: DMA: Moving OMAP2+ DMA channel definitions to mach-omap2")
for removing remaining ones.

egrep '#define OMAP.*DMA' arch/arm/mach-omap2/dma.h \
	|cut -f 1 |cut -d ' ' -f 2 | while read -r i; do \
		if [ `git grep -c $i | wc -l` -eq 1 ]; then \
			echo "removing" $i; \
			sed -i "/${i}/d" arch/arm/mach-omap2/dma.h; \
		fi; \
	done

Signed-off-by: Jarkko Nikula <jarkko.nikula@bitmer.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>

Many of these channel definitions have became unused or were never used
so remove unused definitions from arch/arm/mach-omap1/dma.h using a script
below. See also notes in commit 8c4cc005


("ARM: OMAP1: DMA: Moving OMAP1 DMA channel definitions to mach-omap1")
for removing remaining ones.

egrep '#define OMAP.*DMA' arch/arm/mach-omap1/dma.h \
        |cut -f 1 |cut -d ' ' -f 2 | while read -r i; do \
                if [ `git grep -c $i | wc -l` -eq 1 ]; then \
                        echo "removing" $i; \
                        sed -i "/${i}/d" arch/arm/mach-omap1/dma.h; \
                fi; \
        done

Signed-off-by: Jarkko Nikula <jarkko.nikula@bitmer.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>

The patch removes all the CK_* which were used to identify the family of
processors for which the individual clocks belonged to. Instead now separate
lists are created based on the family of processors.

Boot Tested on: OMAP4430, OMAP4460, Beagle-board, AM33X boards, OMAP2 boards.

Signed-off-by: J Keerthy <j-keerthy@ti.com>
Tested-by: Vaibhav Bedia <vaibhav.bedia@ti.com>
Tested-by: Jon Hunter <jon-hunter@ti.com>
Cc: Paul Walmsley <paul@pwsan.com>
[paul@pwsan.com: changed omap_clock_register_links() to omap_clocks_register();
 updated to apply]
Signed-off-by: Paul Walmsley <paul@pwsan.com>

From Jason Cooper <jason@lakedaemon.net>:

mvebu cleanup for v3.10

 - plat-orion: prep for mvebu-mbus driver

* tag 'cleanup_for_v3.10' of git://git.infradead.org/users/jcooper/linux

:
  arm: mach-orion5x: use mv_mbus_dram_info() in PCI code
  arm: plat-orion: use mv_mbus_dram_info() in PCIe code
  arm: plat-orion: only build addr-map.c when needed

Signed-off-by: Arnd Bergmann <arnd@arndb.de>

Commit 1d9d8639

 ("perf,x86: fix kernel crash with PEBS/BTS after
suspend/resume") introduces a link failure since
perf_restore_debug_store() is only defined for CONFIG_CPU_SUP_INTEL:

	arch/x86/power/built-in.o: In function `restore_processor_state':
	(.text+0x45c): undefined reference to `perf_restore_debug_store'

Fix it by defining the dummy function appropriately.

Signed-off-by: David Rientjes <rientjes@google.com>
Cc: stable@vger.kernel.org
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>

Commit 1d9d8639

 ("perf,x86: fix kernel crash with PEBS/BTS after
suspend/resume") fixed a crash when doing PEBS performance profiling
after resuming, but in using init_debug_store_on_cpu() to restore the
DS_AREA mtrr it also resulted in a new WARN_ON() triggering.

init_debug_store_on_cpu() uses "wrmsr_on_cpu()", which in turn uses CPU
cross-calls to do the MSR update.  Which is not really valid at the
early resume stage, and the warning is quite reasonable.  Now, it all
happens to _work_, for the simple reason that smp_call_function_single()
ends up just doing the call directly on the CPU when the CPU number
matches, but we really should just do the wrmsr() directly instead.

This duplicates the wrmsr() logic, but hopefully we can just remove the
wrmsr_on_cpu() version eventually.

Reported-and-tested-by: Parag Warudkar <parag.lkml@gmail.com>
Cc: stable@vger.kernel.org
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>

Pull btrfs fixes from Chris Mason:
 "Eric's rcu barrier patch fixes a long standing problem with our
  unmount code hanging on to devices in workqueue helpers.  Liu Bo
  nailed down a difficult assertion for in-memory extent mappings."

* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/mason/linux-btrfs:
  Btrfs: fix warning of free_extent_map
  Btrfs: fix warning when creating snapshots
  Btrfs: return as soon as possible when edquot happens
  Btrfs: return EIO if we have extent tree corruption
  btrfs: use rcu_barrier() to wait for bdev puts at unmount
  Btrfs: remove btrfs_try_spin_lock
  Btrfs: get better concurrency for snapshot-aware defrag work

The PCI code was directly accessing the orion_mbus_dram_info structure
to get access to a description of the SDRAM chip selects in order to
configure the PCIe -> SDRAM address decoding windows.

However, with the introduction of the mvebu-mbus driver, we are going
to remove this global structure and instead leave only the exported
mv_mbus_dram_info() function to access this description of the SDRAM
chip selects. Therefore, we simply switch to using this API.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>