1. Oct 09, 2009
  2. Oct 08, 2009
  3. Oct 07, 2009
    • Borislav Petkov's avatar
      amd64_edac: beef up DRAM error injection · 94baaee4
      Borislav Petkov authored
      
      
      When injecting DRAM ECC errors (F3xBC_x8), EccVector[15:0] is a bitmask
      of which bits should be error injected when written to and holds the
      payload of 16-bit DRAM word when read, respectively.
      
      Add /sysfs members to show the DRAM ECC section/word/vector.
      
      Fail wrong injection values entered over /sysfs instead of truncating
      them.
      
      Signed-off-by: default avatarBorislav Petkov <borislav.petkov@amd.com>
      94baaee4
    • Borislav Petkov's avatar
      amd64_edac: fix DRAM base and limit extraction · 66216a7a
      Borislav Petkov authored
      
      
      On Fam10h and above, F1x[1, 0][7C:40] are DRAM Base/Limit registers
      which specify the destination node of a DRAM address. Those address
      boundaries are being extracted into ->dram_base[] and ->dram_limit[].
      Correct the extraction masks to match the respective address bits.
      
      Signed-off-by: default avatarBorislav Petkov <borislav.petkov@amd.com>
      66216a7a
    • Borislav Petkov's avatar
      amd64_edac: fix chip select handling · 9d858bb1
      Borislav Petkov authored
      
      
      Different processor families support a different number of chip selects.
      Handle this in a family-dependent way with the proper values assigned at
      init time (see amd64_set_dct_base_and_mask).
      
      Remove _DCSM_COUNT defines since they're used at one place and originate
      from public documentation.
      
      CC: Keith Mannthey <kmannth@us.ibm.com>
      Signed-off-by: default avatarBorislav Petkov <borislav.petkov@amd.com>
      9d858bb1