- May 14, 2010
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Thomas Koeller authored
More complete AEMIF support for boards. Signed-off-by:
Thomas Koeller <thomas.koeller@baslerweb.com> Signed-off-by:
Kevin Hilman <khilman@deeprootsystems.com>
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Thomas Koeller authored
Added PINMUX configurations for the CLKOUT0 .. CLKOUT2 functions, for boards that want to use these clocks. Signed-off-by:
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Thomas Koeller authored
Board code may want to use them. Signed-off-by:
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Cyril Chemparathy authored
This patch allows for a more flexible ioremap() interception based on iotable contents. With this patch, the ioremap() interception code can properly translate addresses only after davinci_soc_info has been initialized. Consequently, in soc-specific init functions, davinci_common_init() has to happen before any ioremap() attempts. The da8xx init sequence has been suitably modified to meet this restriction. Signed-off-by:
Cyril Chemparathy <cyril@ti.com> Signed-off-by:
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Cyril Chemparathy authored
This patch modifies the pinmux implementation so as to ioremap() the pinmux register area on first use. Signed-off-by:
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Cyril Chemparathy authored
This patch implements the following: - interrupt initialization uses ioremap() instead of passing a virtual address via davinci_soc_info. - machine definitions directly point to cp_intc_init() or davinci_irq_init() - davinci_intc_type and davinci_intc_base now get initialized in controller specific init functions instead of davinci_common_init() - minor fix in davinci_irq_init() to use intc_irq_num instead of DAVINCI_N_AINTC_IRQ Signed-off-by:
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Cyril Chemparathy authored
This patch modifies the psc and clock control code to use ioremap()ed registers. Signed-off-by:
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Cyril Chemparathy authored
This patch eliminates IO_ADDRESS() usage for Davinci timer definitions. The timer code has correspondingly been modified to ioremap() MMRs instead. Signed-off-by:
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Cyril Chemparathy authored
This patch replaces the jtag id base info in davinci_soc_info with a physical address which is then ioremap()ed within common code. This patch (in combination with a similar change for PSC) will allow us to eliminate the SYSCFG nastiness in DA8xx code. Signed-off-by:
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Cyril Chemparathy authored
This patch modifies the RTC unlock code to use ioremap() maps instead of IO_ADDRESS() translation. Signed-off-by:
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Cyril Chemparathy authored
This patch modifies the gpio_base definition in davinci_soc_info to be a physical address, which is then ioremap()ed by the gpio initialization function. Signed-off-by:
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Sekhar Nori authored
In the edma driver, most of the long lines in 'if condition' are broken after the logical operator '&&' except two instances. This patch fixes that to bring consistency across the file. Signed-off-by:
Sekhar Nori <nsekhar@ti.com> Signed-off-by:
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Sekhar Nori authored
This patch replaces occurences of (1 << x) with BIT(x) as it makes for much better reading. Signed-off-by:
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- May 07, 2010
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Sekhar Nori authored
In the edma driver, there are couple of instances where braces are used for a single statement 'if' construct. There are other instances where 'else' part of the if-else construct does not use braces even if the 'if' part is a multi-line statement. This patch fixes both. Signed-off-by:
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Sekhar Nori authored
'edma_info' structure inside the edma driver represents a single instance of edma channel controller. Call it 'edma_cc' instead. This also avoids readers confusing it with an instance of edma_soc_info structre which carries the platform data for a single channel controller instance. Signed-off-by:
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Cyril Chemparathy authored
With this patch, AR7 type uart ports are not reset via pwremu registers. This allows davinci_serial_init() reuse on tnetv107x soc. Signed-off-by:
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Cyril Chemparathy authored
This patch implements davinci serial cleanups towards having this code reusable on tnetv107x. The change reuses the platform data membase field to hold the remapped space. By disabling the UPF_IOREMAP flag in the platform data, we prevent the 8250 driver from repeating the ioremap. Signed-off-by:
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Cyril Chemparathy authored
The uart pdata array is already terminated by a zero flag field. This patch reuses this terminator and eliminates DAVINCI_MAX_NR_UARTS definition. This way, future platforms can have different number of uarts initialized via davinci_serial_init(). Signed-off-by:
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Cyril Chemparathy authored
The earlier watchdog reset mechanism had a couple of limitations. First, it embedded a reference to "davinci_wdt_device" inside common code. This forced all derived platforms (da8xx and tnetv107x) to define such a device. This also would have caused problems in including multiple socs in a single build due to symbol redefinition. With this patch, davinci_watchdog_reset() now takes the platform device as an argument. The davinci_soc_info struct has been extended to include a reset function and a watchdog platform_device. arch_reset() then uses these elements to reset the system in a SoC specific fashion. Signed-off-by:
Sandeep Paulraj <s-paulraj@ti.com> Signed-off-by:
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Cyril Chemparathy authored
Pinmux registers are sequential, and do not need to be enumerated out as they currently are. This reduces code volume and keeps things simple. If some future SoC comes up with a discontiguous register map, PINMUX() can then be expanded with local token pasting. Signed-off-by:
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Cyril Chemparathy authored
This patch eliminates the global gpio_lock, and implements a per-controller lock instead. This also switches to irqsave/irqrestore locks in case gpios are manipulated in isr. Signed-off-by:
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Cyril Chemparathy authored
This patch allows for gpio controllers that deviate from those found on traditional davinci socs. davinci_soc_info has an added field to indicate the soc-specific gpio controller type. The gpio initialization code then bails out if necessary. More elements (tnetv107x) to be added later into enum davinci_gpio_type. Signed-off-by:
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Cyril Chemparathy authored
This patch renders the inlined gpio accessors in gpio.h independent of the underlying controller's register layout. This is done by including three new fields in davinci_gpio_controller to hold the addresses of the set, clear, and in data registers. Other changes: 1. davinci_gpio_regs structure definition moved to gpio.c. This structure is no longer common across all davinci socs (davinci_gpio_controller is). 2. controller base address calculation code (gpio2controller()) moved to gpio.c as this was no longer necessary for the inline implementation. 3. modified inline range checks to use davinci_soc_info.gpio_num instead of DAVINCI_N_GPIO. Signed-off-by:
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Cyril Chemparathy authored
Renamed gpio types to something more sensible: struct gpio_controller --> struct davinci_gpio_regs struct davinci_gpio --> struct davinci_gpio_controller gpio2controller() --> gpio2regs() irq2controller() --> irq2regs() This change also moves davinci_gpio_controller definition to gpio.h. Eventually, the gpio registers structure will be moved to gpio.c and no longer a common cross-soc definition. Signed-off-by:
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Cyril Chemparathy authored
macroized repeated container_of()s to improve readability. unified direction in/out functions. Signed-off-by:
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Sergei Shtylyov authored
The IDE platform device is registered in three different places (2 board files for DM644x and in dm646x.c for DM646x) while both the IDE base address and the IDE IRQ are the same for both SoCs -- therefore, the proper place for the IDE platform seems to be in devices.c. Merge the IDE platform data and registration code and create davinci_init_ide() in place of dm646x_init_ide()... Signed-off-by:
Sergei Shtylyov <sshtylyov@ru.mvista.com> Signed-off-by:
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Thomas Koeller authored
linux/compiler.h is required for __iomem linux/types.h is required u32 Signed-off-by:
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Cyril Chemparathy authored
This patch allows socs to override the divider ratio mask by setting an optional field (div_ratio_mask) in the pll_data structure. Signed-off-by:
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Thomas Koeller authored
Extended the MUX configuration to allow use of GPIO terminals 64..57. Signed-off-by:
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Sergei Shtylyov authored
The board file #define's its own version of EMIFA base addresses, while there are DA8XX_AEMIF_*_BASE macros #define'd in <mach/da8xx.h>. Start using them instead. Signed-off-by:
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Sergei Shtylyov authored
Currently each DaVinci board file #define's its own version of the EMIFA base addresses (all named DAVINCI_ASYNC_EMIF_*_BASE), which leads to duplication. Move these #define's to the SoC specific headers, changing their prefixes from 'DAVINCI' to the 'DM355', 'DM644X', and 'DM646X' since all these base addresses are SoC specific... And while at it, rename DM646X_ASYNC_EMIF_DATA_CE0_BASE to DM646X_ASYNC_EMIF_CS2_SPACE_BASE in order to match the DM646x datasheet. Signed-off-by:
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Cyril Chemparathy authored
Added tnetv107x cpu type definitions and cpu identification macros. Signed-off-by:
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Cyril Chemparathy authored
IRQ numbers as defined for tnetv107x cp_intc. Signed-off-by:
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Cyril Chemparathy authored
Added definitions for LPSC modules in the tnetv107x SOC Signed-off-by:
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Cyril Chemparathy authored
Added list of muxed pins on the tnetv107x SOC. Signed-off-by:
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Cyril Chemparathy authored
Rename da8xx_pinmux_setup() to davinci_cfg_reg_list() and promote it for use in other SOCs that may need the ability to configure multiple pins in one shot. Signed-off-by:
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Cyril Chemparathy authored
The current clock control code always gates the clock (PSC state Disable = 2) on clk_disable(). Some on-chip peripherals (e.g. LCD controller on TNETV107X) need to be put into SwRstDisable = 0 on clock disable, to maintain hardware sanity. This patch extends the davinci_psc_config() arguments to pass in the desired module state instead of a boolean enable/disable. Further, clk_disable() now checks for the PSC_SWRSTDISABLE clk flag before selecting the target state. Signed-off-by:
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Cyril Chemparathy authored
Host map configuration instructs the interrupt controller to route interrupt channels to FIQ or IRQ lines. Currently, DA8xx family of devices leave these registers at their reset-default values. TNETV107X however does not have sane reset defaults, and therefore this architecture needs to reconfigure the host-map such that channels 0 and 1 go to FIQ, and the remaining channels raise IRQs. This patch adds an optional host map argument to cp_intc_init() for this. Signed-off-by:
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Cyril Chemparathy authored
timer_init() programs timer64 hardware. The module should ideally be brought out of reset before this happens. Signed-off-by:
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Cyril Chemparathy authored
Preliminary modification prior to adding support for TNETV107X based on ARM1176. This change allows for CPUs other than ARM926T to be used for Davinci derivative SoCs. Existing devices (DA8x and DMx) operate unchanged. Signed-off-by:
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