- Jun 16, 2013
-
-
Mugunthan V N authored
This utilize the new pinctrl core PM helpers to transition the driver to "default" and "sleep" states. Signed-off-by:
Mugunthan V N <mugunthanvnm@ti.com> Acked-by:
David S. Miller <davem@davemloft.net> Signed-off-by:
Linus Walleij <linus.walleij@linaro.org>
-
Linus Walleij authored
This utilize the new pinctrl core PM helpers to transition the driver to "sleep" and "idle" states, cutting away some boilerplate code. Cc: Hebbar Gururaja <gururaja.hebbar@ti.com> Cc: Dmitry Torokhov <dmitry.torokhov@gmail.com> Cc: Kevin Hilman <khilman@linaro.org> Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Cc: Stephen Warren <swarren@wwwdotorg.org> Cc: Wolfram Sang <wsa@the-dreams.de> Acked-by:
Mark Brown <broonie@kernel.org> Signed-off-by:
-
Maxime Ripard authored
The A10 and A13 has a few pins that can be muxed into a particular function that can be used as an interrupt source. Add the available pins for such functions to the A10 and A13 description array. Signed-off-by:
Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by:
-
Maxime Ripard authored
The port controller IP found in the Allwinner A10 and A13 can use few of the pins it manage as an interrupt source, called external interrupts in the datasheet. The number of these external interrupts are SoCs specific, but the current upper limit is 32. In order to work, the external interrupts' pins have to be muxed to a specific function to generate an interrupt. This patch adds the irqchip and the needed logic to use the PIO controller as an interrupt controller. Signed-off-by:
-
Maxime Ripard authored
Avoid to use expensive string manipulation functions and search by pin id when possible. Signed-off-by:
-
Thomas Abraham authored
This patch fixes issues reported by prevent tool. Signed-off-by:
Thomas Abraham <thomas.ab@samsung.com> Signed-off-by:
Kukjin Kim <kgene.kim@samsung.com> [Drop hunk already in-tree from a patch by Wei Yongjun] Signed-off-by:
-
Manjunathappa, Prakash authored
Take care to name pin names as register-offset.bit-pos-of-pin-in-register in case configuring multiple pins in register. Signed-off-by:
Manjunathappa, Prakash <prakash.pm@ti.com> Acked-by:
Haojian Zhuang <haojian.zhuang@gmail.com> Acked-by:
Tony Lindgren <tony@atomide.com> Signed-off-by:
-
Manjunathappa, Prakash authored
Add support to configure multiple pins in each register, existing implementation added by [1] does not support full fledge multiple pin configuration in single register, reports a pin clash when different modules configure different bits of same register. The issue reported and discussed here http://www.spinics.net/lists/arm-kernel/msg235213.html With pinctrl-single,bits-per-mux property specified, use function-mask property to find out number pins to configure. Allocate and register pin control functions based sub mask. Tested on da850/omap-l138 EVM. does not support variable submask for pins. does not support pinconf. [1] "pinctrl: pinctrl-single: Add pinctrl-single,bits type of mux" (9e605cb6 ), Signed-off-by:
Lad, Prabhakar <prabhakar.csengg@gmail.com> Tested-by:
-
Linus Walleij authored
This utilize the new pinctrl core PM helpers to transition the driver to "sleep" and "idle" states, cutting away some boilerplate code. Cc: Hebbar Gururaja <gururaja.hebbar@ti.com> Cc: Mark Brown <broonie@kernel.org> Cc: Dmitry Torokhov <dmitry.torokhov@gmail.com> Cc: Kevin Hilman <khilman@linaro.org> Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Cc: Stephen Warren <swarren@wwwdotorg.org> Acked-by:
Wolfram Sang <wsa@the-dreams.de> Signed-off-by:
-
Linus Walleij authored
This augments the PL011 UART driver to utilize the new pinctrl core PM helpers to transition the driver to default and sleep states, cutting away some boilerplate code. Cc: Hebbar Gururaja <gururaja.hebbar@ti.com> Cc: Mark Brown <broonie@kernel.org> Cc: Dmitry Torokhov <dmitry.torokhov@gmail.com> Cc: Kevin Hilman <khilman@linaro.org> Cc: Stephen Warren <swarren@wwwdotorg.org> Acked-by:
Greg Kroah-Hartman <gregkh@linuxfoundation.org> Signed-off-by:
-
Linus Walleij authored
If a device have sleep and idle states in addition to the default state, look up these in the core and stash them in the pinctrl state container. Add accessor functions for pinctrl consumers to put the pins into "default", "sleep" and "idle" states passing nothing but the struct device * affected. Solution suggested by Kevin Hilman, Mark Brown and Dmitry Torokhov in response to a patch series from Hebbar Gururaja. Cc: Hebbar Gururaja <gururaja.hebbar@ti.com> Cc: Dmitry Torokhov <dmitry.torokhov@gmail.com> Cc: Stephen Warren <swarren@wwwdotorg.org> Acked-by:
Kevin Hilman <khilman@linaro.org> Signed-off-by:
-
Heiko Stübner authored
There exist controllers that don't support to set the pull to up or down separately but instead automatically set the pull direction based on embedded knowledge inside the controller, for example depending on the selected mux function of the pin. Therefore this patch adds another config option to use this default pull-state for a pin where it is not possible to know or decide if the pin will be pulled up or down. Signed-off-by:
Heiko Stuebner <heiko@sntech.de> Reviewed-by:
Stephen Warren <swarren@nvidia.com> Signed-off-by:
-
Jingchang Lu authored
Adds Freescale Vybrid VF610 pin controller driver to IMX common pinctrl driver framework. Signed-off-by:
Jingchang Lu <b35083@freescale.com> Acked-by:
Shawn Guo <shawn.guo@linaro.org> Signed-off-by:
-
Jingchang Lu authored
On some platforms such as VF610, offset of mux and pad ctrl register may be zero, and the mux_mode and config_val are in one 32-bit register. This patch adds support to imx core pinctrl framework to handle these cases. Signed-off-by:
-
James Hogan authored
Fix typo in "communicate directly with with the pinctrl subsystem". Signed-off-by:
James Hogan <james.hogan@imgtec.com> Cc: Linus Walleij <linus.walleij@linaro.org> Acked-by:
Rob Landley <rob@landley.net> Signed-off-by:
-
Patrice Chotard authored
- rework abx500_gpio_dbg_show_one() to take in account pull up/down feature available on AB8540 only. - add abx500_get_pull_updown() needed by abx500_gpio_dbg_show_one() - rename abx500_config_pull_updown() to abx500_set_pull_updown() Signed-off-by:
Patrice Chotard <patrice.chotard@st.com> Signed-off-by:
-
Patrice Chotard authored
On ABx500 chip family, all pins support only pull down except for AB8540 which supports pull up/down on some pins. Rework abx500_pin_config_set to be able to set pull up on pins which support this feature. Signed-off-by:
-
Patrice Chotard authored
Fix abx500_config_pull_updown() to set correct bit in AB8540_GPIO_PULL_UPDOWN_REG. Signed-off-by:
-
James Hogan authored
Add a new PIN_CONFIG_BIAS_BUS_HOLD pin configuration for a bus holder pin mode (also known as bus keeper, or repeater). This is a weak latch which drives the last value on a tristate bus. Another device on the bus can drive the bus high or low before going tristate to change the value driven by the pin. Signed-off-by:
-
James Hogan authored
Add the drive strength pinconf to debugfs output (with the unit "mA"). Signed-off-by:
-
Patrice Chotard authored
Suppress a mutex which was initialized on probe and destroyed on remove but never used. Signed-off-by:
Lee Jones <lee.jones@linaro.org> Signed-off-by:
-
Barry Song authored
this patch saves the status of pinctrl registers and restore them while resuming. this makes all drivers have coherent status for pinmux after suspending and resuming. Signed-off-by:
Barry Song <Baohua.Song@csr.com> Signed-off-by:
-
Linus Walleij authored
The pinctrldev_list_mutex is sinked into the functions that actually traverse the list and lock it there. The code makes much more sense in this way. All the callers are in non-performance critical paths and the code is way more readable this way. Also refactor the function get_pinctrl_dev_from_devname() to follow the design pattern of get_pinctrl_dev_from_of_node() which is slightly simpler. Signed-off-by: -
Barry Song authored
atlas6 is a SoC very similar with primaII, the register layput of pinctrl is same, but the pads, groups and functions of atlas6 have different layout with prima2, this patch 1. pull the definition of pads, groups and functions out of the pinctrl-sirf driver,and put them into soc-specific files 2. add pads, groups and functions tables for atlas6 3. let pads, groups and functions tables become the config data of the related dt compatible node, so the pinctrl-sirf can support all SiRF SoCs with the config data as private data. In this patch,we create a sirf dir, and let the old drivers/pinctrl/pinctrl-sirf.c = drivers/pinctrl/sirf/pinctrl-prima2.c + drivers/pinctrl/sirf/pinctrl-sirf.c drivers/pinctrl/sirf/pinctrl-atlas6.c is a newly created file for the pin layout of atlas6. Signed-off-by: -
Laurent Navet authored
Replace a call to deprecated devm_request_and_ioremap by devm_ioremap_resource. Found with coccicheck and this semantic patch: scripts/coccinelle/api/devm_ioremap_resource.cocci Signed-off-by:
Laurent Navet <laurent.navet@gmail.com> Acked-by:
Tony Prisk <linux@prisktech.co.nz> Signed-off-by:
-
Sebastian Hesselbarth authored
Dove power management unit can mux some special functions to mpp0-15. This patch adds support to set/get the current PMU function mapped to the corresponding mpp pins. The device tree documentation is also updated accordingly. Signed-off-by:
Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Acked-by:
Jason Cooper <jason@lakedaemon.net> Signed-off-by:
-
Wolfram Sang authored
devm_ioremap_resource does sanity checks on the given resource. No need to duplicate this in the driver. Signed-off-by:
Viresh Kumar <viresh.kumar@linaro.org> Signed-off-by:
-
Shawn Guo authored
The pinctrl-imx6sl is in place. Enable the build of it. Signed-off-by:
-
Wolfram Sang authored
devm_ioremap_resource does sanity checks on the given resource. No need to duplicate this in the driver. Signed-off-by:
Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Signed-off-by:
-
Jingoo Han authored
The driver core clears the driver data to NULL after device_release or on probe failure, since commit 0998d063 (device-core: Ensure drvdata = NULL when no driver is bound). Thus, it is not needed to manually clear the device driver data to NULL. Signed-off-by:
Jingoo Han <jg1.han@samsung.com> Signed-off-by:
-
Jingoo Han authored
The driver core clears the driver data to NULL after device_release or on probe failure, since commit 0998d063 (device-core: Ensure drvdata = NULL when no driver is bound). Thus, it is not needed to manually clear the device driver data to NULL. Signed-off-by:
-
Jingoo Han authored
The driver core clears the driver data to NULL after device_release or on probe failure, since commit 0998d063 (device-core: Ensure drvdata = NULL when no driver is bound). Thus, it is not needed to manually clear the device driver data to NULL. Signed-off-by:
-
Jingoo Han authored
The driver core clears the driver data to NULL after device_release or on probe failure, since commit 0998d063 (device-core: Ensure drvdata = NULL when no driver is bound). Thus, it is not needed to manually clear the device driver data to NULL. Signed-off-by:
-
- Jun 09, 2013
-
-
Linus Torvalds authored
-
Mikulas Patocka authored
This patch fixes warnings due to missing lock on write error path. WARNING: at fs/hpfs/hpfs_fn.h:353 hpfs_truncate+0x75/0x80 [hpfs]() Hardware name: empty Pid: 26563, comm: dd Tainted: P O 3.9.4 #12 Call Trace: hpfs_truncate+0x75/0x80 [hpfs] hpfs_write_begin+0x84/0x90 [hpfs] _hpfs_bmap+0x10/0x10 [hpfs] generic_file_buffered_write+0x121/0x2c0 __generic_file_aio_write+0x1c7/0x3f0 generic_file_aio_write+0x7c/0x100 do_sync_write+0x98/0xd0 hpfs_file_write+0xd/0x50 [hpfs] vfs_write+0xa2/0x160 sys_write+0x51/0xa0 page_fault+0x22/0x30 system_call_fastpath+0x1a/0x1f Signed-off-by:Mikulas Patocka <mikulas@artax.karlin.mff.cuni.cz> Cc: stable@kernel.org # 2.6.39+ Signed-off-by:
Linus Torvalds <torvalds@linux-foundation.org>
-
git://git.kernel.org/pub/scm/linux/kernel/git/tip/tipLinus Torvalds authored
Pull timer fixes from Thomas Gleixner: - Trivial: unused variable removal - Posix-timers: Add the clock ID to the new proc interface to make it useful. The interface is new and should be functional when we reach the final 3.10 release. - Cure a false positive warning in the tick code introduced by the overhaul in 3.10 - Fix for a persistent clock detection regression introduced in this cycle * 'timers-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: timekeeping: Correct run-time detection of persistent_clock. ntp: Remove unused variable flags in __hardpps posix-timers: Show clock ID in proc file tick: Cure broadcast false positive pending bit warning
-
git://git.secretlab.ca/git/linuxLinus Torvalds authored
Pull irqdomain bug fixes from Grant Likely: "This branch contains a set of straight forward bug fixes to the irqdomain code and to a couple of drivers that make use of it." * tag 'irqdomain-for-linus' of git://git.secretlab.ca/git/linux: irqchip: Return -EPERM for reserved IRQs irqdomain: document the simple domain first_irq kernel/irq/irqdomain.c: before use 'irq_data', need check it whether valid. irqdomain: export irq_domain_add_simple
-
Grant Likely authored
The irqdomain core will report a log message for any attempted map call that fails unless the error code is -EPERM. This patch changes the Versatile irq controller drivers to use -EPERM because it is normal for a subset of the IRQ inputs to be marked as reserved on the various Versatile platforms. Signed-off-by:Grant Likely <grant.likely@linaro.org>
-
Linus Walleij authored
The first_irq needs to be zero to get a linear domain and that comes with special semantics. We want to simplify this going forward but some documentation never hurts. Signed-off-by:
-
Chen Gang authored
Since irq_data may be NULL, if so, we WARN_ON(), and continue, 'hwirq' which related with 'irq_data' has to initialize later, or it will cause issue. Signed-off-by:
Chen Gang <gang.chen@asianux.com> Signed-off-by:
-
