- Nov 28, 2019
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Linus Walleij authored
We have a special quirk to handle the Freescale nonstandard SPI chipselect GPIOs in the gpiolib-of.c file, but it currently only handles the case where the GPIOs are actually requested (gpiod_*get()). We also need to handle that the SPI core attempts to count the GPIOs before use, and that needs a similar quirk in the OF part of the library. Cc: Christophe Leroy <christophe.leroy@c-s.fr> Reported-by:
Christophe Leroy <christophe.leroy@c-s.fr> Fixes: 0f0581b2 ("spi: fsl: Convert to use CS GPIO descriptors") Signed-off-by:
Linus Walleij <linus.walleij@linaro.org> Tested-by:
Mark Brown <broonie@kernel.org>
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Linus Walleij authored
This makes the driver actually support looking up GPIO descriptor. A coding mistake in the initial descriptor support patch was that it was failing to turn on the very feature it was implementing. Mea culpa. Cc: Christophe Leroy <christophe.leroy@c-s.fr> Reported-by:
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Charles Keepax authored
This patch reverts commit 6e0a32d6 ("spi: dw: Fix default polarity of native chipselect"). The SPI framework always called the set_cs callback with the logic level it desired on the chip select line, which is what the drivers original handling supported. commit f3186dd8 ("spi: Optionally use GPIO descriptors for CS GPIOs") changed these symantics, but only in the case of drivers that also support GPIO chip selects, to true meaning apply slave select rather than logic high. This left things in an odd state where a driver that only supports hardware chip selects, the core would handle polarity but if the driver supported GPIOs as well the driver should handle polarity. At this point the reverted change was applied to change the logic in the driver to match new system. This was then broken by commit 3e5ec1db ("spi: Fix SPI_CS_HIGH setting when using native and GPIO CS") which reverted the core back to consistently calling set_cs with a logic level. This fix reverts the driver code back to its original state to match the current core code. This is probably a better fix as a) the set_cs callback is always called with consistent symantics and b) the inversion for SPI_CS_HIGH can be handled in the core and doesn't need to be coded in each driver supporting it. Fixes: 3e5ec1db ("spi: Fix SPI_CS_HIGH setting when using native and GPIO CS") Signed-off-by:
Charles Keepax <ckeepax@opensource.cirrus.com> Acked-by:
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- Nov 27, 2019
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Charles Keepax authored
To fix a regression on the Cadence SPI driver, this patch reverts commit 6046f540 ("spi: cadence: Fix default polarity of native chipselect"). This patch was not the correct fix for the issue. The SPI framework calls the set_cs line with the logic level it desires on the chip select line, as such the old is_high handling was correct. However, this was broken by the fact that before commit 3e5ec1db ("spi: Fix SPI_CS_HIGH setting when using native and GPIO CS") all controllers that offered the use of a GPIO chip select had SPI_CS_HIGH applied, even for hardware chip selects. This caused the value passed into the driver to be inverted. Which unfortunately makes it look like a logical enable the chip select value. Since the core was corrected to not unconditionally apply SPI_CS_HIGH, the Cadence driver, whilst using the hardware chip select, will deselect the chip select every time we attempt to communicate with the device, which results in failed communications. Fixes: 3e5ec1db ("spi: Fix SPI_CS_HIGH setting when using native and GPIO CS") Signed-off-by:
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- Nov 25, 2019
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Jarkko Nikula authored
LPSS SPI on Intel Jasper Lake is compatible with Intel Ice Lake which follows Intel Cannon Lake. Add PCI IDs of Jasper Lake. Signed-off-by:
Jarkko Nikula <jarkko.nikula@linux.intel.com> Link: https://lore.kernel.org/r/20191125125159.15404-1-jarkko.nikula@linux.intel.com Signed-off-by:
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- Nov 23, 2019
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Benjamin Gaignard authored
Convert the STM32 QSPI binding to DT schema format using json-schema Signed-off-by:
Benjamin Gaignard <benjamin.gaignard@st.com> Reviewed-by:
Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20191120194444.10540-1-benjamin.gaignard@st.com Signed-off-by:
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Peter Ujfalusi authored
There is no reason to use the dma_request_slave_channel_compat() as no filter function and parameter is provided. Switch the driver to use dma_request_chan() instead and add support for deferred probing against DMA channel. Signed-off-by:
Peter Ujfalusi <peter.ujfalusi@ti.com> Reviewed-by:
Vinod Koul <vkoul@kernel.org> Link: https://lore.kernel.org/r/20191121092703.30465-1-peter.ujfalusi@ti.com Signed-off-by:
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- Nov 21, 2019
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Krzysztof Kozlowski authored
Adjust indentation from spaces to tab (+optional two spaces) as in coding style with command like: $ sed -e 's/^ /\t/' -i */Kconfig Signed-off-by:
Krzysztof Kozlowski <krzk@kernel.org> Link: https://lore.kernel.org/r/20191120133916.13595-1-krzk@kernel.org Signed-off-by:
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- Nov 19, 2019
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Luhua Xu authored
Change to use SPI_CS_HIGH to support spi CS polarity setting for chips support enhance_timing. Signed-off-by:
Luhua Xu <luhua.xu@mediatek.com> Link: https://lore.kernel.org/r/1574053037-26721-2-git-send-email-luhua.xu@mediatek.com Signed-off-by:
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- Nov 18, 2019
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Chuhong Yuan authored
The driver forgets to call pm_runtime_disable in probe failure and remove. Add the missed calls to fix it. Signed-off-by:
Chuhong Yuan <hslester96@gmail.com> Link: https://lore.kernel.org/r/20191118024848.21645-1-hslester96@gmail.com Signed-off-by:
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- Nov 15, 2019
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Chuhong Yuan authored
The driver misses calling clk_unprepare in probe failure and remove. Add the calls to fix it. Signed-off-by:
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Peter Ujfalusi authored
dma_request_slave_channel_reason() is: #define dma_request_slave_channel_reason(dev, name) \ dma_request_chan(dev, name) Signed-off-by:
Jon Hunter <jonathanh@nvidia.com> Link: https://lore.kernel.org/r/20191113094256.1108-10-peter.ujfalusi@ti.com Signed-off-by:
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Peter Ujfalusi authored
dma_request_slave_channel_reason() is: #define dma_request_slave_channel_reason(dev, name) \ dma_request_chan(dev, name) Signed-off-by:
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Peter Ujfalusi authored
dma_request_slave_channel_reason() is: #define dma_request_slave_channel_reason(dev, name) \ dma_request_chan(dev, name) Signed-off-by:
Andi Shyti <andi@etezian.org> Link: https://lore.kernel.org/r/20191113094256.1108-8-peter.ujfalusi@ti.com Signed-off-by:
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Peter Ujfalusi authored
dma_request_slave_channel_reason() is: #define dma_request_slave_channel_reason(dev, name) \ dma_request_chan(dev, name) Signed-off-by:
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Peter Ujfalusi authored
dma_request_slave_channel_reason() is: #define dma_request_slave_channel_reason(dev, name) \ dma_request_chan(dev, name) Signed-off-by:
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Peter Ujfalusi authored
dma_request_slave_channel_reason() is: #define dma_request_slave_channel_reason(dev, name) \ dma_request_chan(dev, name) Signed-off-by:
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Peter Ujfalusi authored
dma_request_slave_channel_reason() is: #define dma_request_slave_channel_reason(dev, name) \ dma_request_chan(dev, name) Signed-off-by:
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Peter Ujfalusi authored
dma_request_slave_channel_reason() is: #define dma_request_slave_channel_reason(dev, name) \ dma_request_chan(dev, name) Signed-off-by:
Nicolas Ferre <nicolas.ferre@microchip.com> Link: https://lore.kernel.org/r/20191113094256.1108-3-peter.ujfalusi@ti.com Signed-off-by:
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Peter Ujfalusi authored
dma_request_slave_channel_reason() is: #define dma_request_slave_channel_reason(dev, name) \ dma_request_chan(dev, name) Signed-off-by:
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- Nov 13, 2019
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Tony Lindgren authored
Commit d948e6ca ("spi: add power control when set_cs") added generic runtime PM handling, but also changed the return value to be 1 instead of 0 that we had earlier as pm_runtime_get functions return a positve value on success. This causes SPI devices to return errors for cases where they do: ret = spi_setup(spi); if (ret) return ret; As in many cases the SPI devices do not check for if (ret < 0). Let's fix this by setting the status to 0 on succeess after the runtime PM calls. Let's not return 0 at the end of the function as this might break again later on if the function changes and starts returning status again. Fixes: d948e6ca ("spi: add power control when set_cs") Cc: Luhua Xu <luhua.xu@mediatek.com> Cc: wsd_upstream@mediatek.com Signed-off-by:
Tony Lindgren <tony@atomide.com> Link: https://lore.kernel.org/r/20191111195334.44833-1-tony@atomide.com Signed-off-by:
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- Nov 11, 2019
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Chuhong Yuan authored
pxa2xx_spi_init_pdata misses checks for devm_clk_get and platform_get_irq. Add checks for them to fix the bugs. Since ssp->clk and ssp->irq are used in probe, they are mandatory here. So we cannot use _optional() for devm_clk_get and platform_get_irq. Signed-off-by:
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Chuhong Yuan authored
This driver forgets to unregister controller when remove. Use devm API to unregister it automatically to fix it. Signed-off-by:
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Vignesh Raghavendra authored
Both omap2_mcspi_tx_dma() and omap2_mcspi_rx_dma() are only called from omap2_mcspi_txrx_dma() and omap2_mcspi_txrx_dma() is always called after making sure that mcspi_dma->dma_rx and mcspi_dma->dma_tx are not NULL (see omap2_mcspi_transfer_one()). Therefore remove redundant NULL checks for omap2_mcspi->dma_tx and omap2_mcspi->dma_rx pointers in omap2_mcspi_tx_dma() and omap2_mcspi_rx_dma() respectively. Signed-off-by:
Vignesh Raghavendra <vigneshr@ti.com> Link: https://lore.kernel.org/r/20191109041827.26934-1-vigneshr@ti.com Signed-off-by:
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- Nov 09, 2019
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Miquel Raynal authored
The Zynq QSPI controller features 2 CS. When the num-cs DT property is set to 2, the hardware will be initialized to support having two devices connected over each CS. In this case, both CS lines are driven by the state of the U_PAGE (upper page) bit. When unset, the lower page (CS0) is selected, otherwise it is the upper page (CS1). Change tested on a custom design featuring two SPI-NORs with different CS on the Zynq-7000 QSPI bus. Signed-off-by:
Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/r/20191108140744.1734-8-miquel.raynal@bootlin.com Signed-off-by:
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Miquel Raynal authored
Supporting more than one CS will need some tweaking of the linear configuration register which is (rightfully) initialized in the hardware initialization helper. The extra initialization needs the knowledge of the actual number of CS, which is retrieved by reading the value of the num-cs DT property. As the initialization helper is called pretty early and might be called much later in the probe without side effect, let's delay it a bit so that the number of CS will be available when running this helper. This way, adding support for multiple CS lines in a next patch will be eased. Signed-off-by:
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Miquel Raynal authored
The code used to assert and de-assert a chip select line is very complicated for no reason. Simplify the logic by either setting or resetting the concerned bit, which actually only changes an electrical state. Update the comment to reflect that there is no possibility to actually choose a CS as the default (CS0) will be driven in any case. Signed-off-by:
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Miquel Raynal authored
Using masks makes sense when manipulating fields of several bits. When only one bit is involved, it is usual to just use the BIT() macro but in this case using the term mask is abusive. Fix the #define macros and their comments. Signed-off-by:
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Miquel Raynal authored
Most of the bits/bitfields #define'd in this driver are composed with: 1/ the driver prefix 2/ the name of the register they apply to Keep the naming consistent by applying this rule to the CONFIG register internals. These definitions will be used in a following change set. Signed-off-by:
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Miquel Raynal authored
Unlike what the driver is currently advertizing, CS0 only can be used, CS1 is not supported at all. Prevent people to use CS1. Signed-off-by:
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- Nov 08, 2019
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Miquel Raynal authored
In this driver (and also in a lot of other drivers in drivers/spi/), the spi_controller structure is sometimes referred as 'ctlr' and sometimes as 'ctrl'. Grepping there shows that 'ctlr' seems to be more common so keep the naming consistent in this driver and s/ctrl/ctlr/. Signed-off-by:
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- Nov 07, 2019
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Chris Packham authored
Devices with chip selects driven via GPIO are not compatible with the spi-mem operations. Fallback to using standard spi transfers when the device is connected with a gpio CS. Signed-off-by:
Chris Packham <chris.packham@alliedtelesis.co.nz> Link: https://lore.kernel.org/r/20191107044235.4864-3-chris.packham@alliedtelesis.co.nz Signed-off-by:
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Chris Packham authored
Set use_gpio_descriptors to true and avoid asserting the native chip select if the spi core has done it for us. Signed-off-by:
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- Nov 06, 2019
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Pan Bian authored
The channels spfi->tx_ch and spfi->rx_ch are not set to NULL after they are released. As a result, they will be released again, either on the error handling branch in the same function or in the corresponding remove function, i.e. img_spfi_remove(). This patch fixes the bug by setting the two members to NULL. Signed-off-by:
Pan Bian <bianpan2016@163.com> Link: https://lore.kernel.org/r/1573007769-20131-1-git-send-email-bianpan2016@163.com Signed-off-by:
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- Oct 31, 2019
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Luhua Xu authored
As to set_cs takes effect immediately, power spi is needed when setup spi. Cc: Mark Brown <broonie@kernel.org> Signed-off-by:
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- Oct 30, 2019
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Linus Walleij authored
This driver does not use any symbols from the legacy GPIO header so drop the include. Signed-off-by:
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Linus Walleij authored
The DW driver does not use the legacy GPIO header so drop it from the spi-dw.h include. Signed-off-by:
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Linus Walleij authored
This converts the TXX9 SPI driver to use GPIO descriptors to control the GPIO chip selects. As the driver was clearly (ab)using the device tree "reg" property to offset into the global GPIO chip we have to add a hack to counter the hack: add a 1-to-1 chip select to GPIO offset mapping for all 16 lines on the TXX9 GPIO chip. The details are described in a largeish comment in the patch. We do not need to set up the GPIO as output any more since the core will take care of this, as well as it will handle the polarity inversion semantics. Cc: Atsushi Nemoto <atsushi.nemoto@sord.co.jp> Signed-off-by:
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Jarkko Nikula authored
Committed version of the commit b9fc2d20 ("spi: dw: Move runtime PM enable/disable from common to platform driver part") does not include by some reason changes to drivers/spi/spi-dw.c that were part of the original patch sent to the mailing list. Complete the code move by doing those changes now. Fixes: b9fc2d20 ("spi: dw: Move runtime PM enable/disable from common to platform driver part") Cc: Phil Edworthy <phil.edworthy@renesas.com> Signed-off-by:
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- Oct 28, 2019
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Lingling Xu authored
When rebooting system, the PMIC watchdog time loading may not be loaded correctly when another system is feeding the PMIC watchdog, since we did not check the watchdog busy status before loading time values. Thus we should set the BIT_WDG_NEW bit before loading time values, that can support multiple loads without checking busy status to make sure the time values can be loaded successfully to avoid this potential issue. Signed-off-by:
Lingling Xu <ling_ling.xu@unisoc.com> Signed-off-by:
Baolin Wang <baolin.wang@linaro.org> Link: https://lore.kernel.org/r/5655318a7252c9ea518c2f7950a61228ab8f42bf.1572257085.git.baolin.wang@linaro.org Signed-off-by:
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