- Apr 29, 2017
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Chunming Zhou authored
[ 132.036658] amdgpu 0000:22:00.0: VM IB without ID [ 132.036709] [drm:amdgpu_job_run [amdgpu]] *ERROR* Error scheduling IBs (-22) [ 132.036755] [drm:amd_sched_main [amdgpu]] *ERROR* Failed to run job! root cause is fence is signaled during sync transfer. Signed-off-by:
Chunming Zhou <David1.Zhou@amd.com> Reviewed-by:
Christian König <christian.koenig@amd.com> Signed-off-by:
Alex Deucher <alexander.deucher@amd.com>
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Roger.He authored
Reviewed-by:
Roger.He <Hongbo.He@amd.com> Signed-off-by:
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Chunming Zhou authored
v2: address Alex's comment, add AMDGPU_DEFAULT_GTT_SIZE_MB. Signed-off-by:
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Christian König authored
We need to check if the VM is swapped out before trying to update it. Fixes: 23e0563e ("drm/amdgpu: clear freed mappings immediately when BO may be freed") Signed-off-by:
Nicolai Hähnle <nicolai.haehnle@amd.com> Signed-off-by:
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Chunming Zhou authored
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Christian König authored
BOs not mapped into the GART are always valuable for an eviction. Otherwise we don't correctly swap them out on VRAM evictions during memory pressure. Signed-off-by:
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Rex Zhu authored
Signed-off-by:
Rex Zhu <Rex.Zhu@amd.com> Reviewed-by:
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Rex Zhu authored
Correctly calculate CKSVidOffset Signed-off-by:
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Rex Zhu authored
Signed-off-by:
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Rex Zhu authored
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Rex Zhu authored
Signed-off-by:
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Huang Rui authored
Signed-off-by:
Huang Rui <ray.huang@amd.com> Reviewed-by:
Evan Quan <evan.quan@amd.com> Reviewed-by:
Edward O'Callaghan <funfunctor@folklore1984.net> Reviewed-by:
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Alex Deucher authored
This leads to hangs on init. This reverts commit d1aff8ec.
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Zhang, Jerry authored
Fix PRT handling on gfx9 v2: unify PRT bit for all ASICs v3: move PRT flag checking in amdgpu_vm_bo_split_mapping() Signed-off-by:
Junwei Zhang <Jerry.Zhang@amd.com> Acked-by:
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Christian König authored
Use amdgpu_vm_bo_update_mapping() instead of amdgpu_vm_bo_split_mapping() here. We don't want any flags set in the cleared areas and splitting shouldn't be necessary. v2: fix typo in commit message Signed-off-by:
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Trigger Huang authored
Fix issue that PSP initialization will fail if reload amdgpu module. That's because the PSP ring must be destroyed to be ready for the next time PSP initialization. Changes in v2: - Move psp_ring_destroy before all BOs free (suggested by Ray Huang). Changes in v3: - Check firmware load type, if it is not PSP, we should do nothing in fw_fini(), and of course will not destroy PSP ring too (suggested by Ray Huang). Signed-off-by:
Trigger Huang <trigger.huang@amd.com> Reviewed-by:
Xiangliang Yu <Xiangliang.Yu@amd.com> Reviewed-by:
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Evan Quan authored
Updated interface between the driver and the SMU controller. Signed-off-by:
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Tom St Denis authored
So it's more obvious which rings are using which INV engines. Signed-off-by:
Tom St Denis <tom.stdenis@amd.com> Reviewed-by:
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Tom St Denis authored
umr expects the ring name to be a complete word. This also makes it consistent with GFXv7/8. Signed-off-by:
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Tom St Denis authored
umr expects the ring name to be a complete word. This also makes it consistent with GFXv7/8. Signed-off-by:
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Trigger Huang authored
Apply commit 4e683cb2644f ("drm/amdgpu: Fix module unload hang by KIQ IRQ set")to vega10 V2: delete reduant kiq irq funcs type check (suggested by Rex.Zhu) Signed-off-by: -
Rex Zhu authored
if we set only lowest mclk level enabled, when we enable uvd dpm during boot time, mclk will be fixed in the lowest level. the mclk switch will fail if try to enable other level of mclk at this time. so set all mclk levels enabled. Signed-off-by:
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Xiangliang Yu authored
For SRIOV doesn't need clockgating, bypass it. Signed-off-by:
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Xiangliang Yu authored
For SRIOV doesn't need CG, so bypass it. Signed-off-by:
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Christian König authored
Based on commit "drm/radeon: remove useless and potentially wrong message". The size of the info printing is incorrect and the PCI subsystems prints the same info on boot anyway. Signed-off-by:
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Pixel Ding authored
The interrupt after FLR is missed sometimes due to hardware reason, so guest driver get the notification of FLR completion via polling message. Then host doesn't write VALID bit to avoid sending interrupt, otherwise the completion will be handled twice. So there's a valid message without VALID bit for FLR completion, driver should handle it without checking. Signed-off-by:
Pixel Ding <Pixel.Ding@amd.com> Reviewed-by:
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Junwei Zhang authored
Was incorrect for SI. Signed-off-by:
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Rex Zhu authored
Vega10 does not support AVFS BTC, remove function. Signed-off-by:
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Rex Zhu authored
Replace 8 spaces with tabs. correct {} braces, etc. Signed-off-by: -
Rex Zhu authored
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Huang Rui authored
The ret must be 0 here, otherwise, the function will return after init_mem_type. Signed-off-by:
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Huang Rui authored
Signed-off-by:
Michel Dänzer <michel.daenzer@amd.com> Signed-off-by:
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Huang Rui authored
Driver must free the console lock whether driver resuming successful or not. Otherwise, fb_console will be always waiting for the lock and then cause system stuck. [ 244.405541] INFO: task kworker/0:0:4 blocked for more than 120 seconds. [ 244.405543] Tainted: G OE 4.9.0-custom #1 [ 244.405544] "echo 0 > /proc/sys/kernel/hung_task_timeout_secs" disables this message. [ 244.405541] INFO: task kworker/0:0:4 blocked for more than 120 seconds. [ 244.405543] Tainted: G OE 4.9.0-custom #1 [ 244.405544] "echo 0 > /proc/sys/kernel/hung_task_timeout_secs" disables this message. [ 244.405550] kworker/0:0 D 0 4 2 0x00080000 [ 244.405559] Workqueue: events console_callback [ 244.405564] ffff88045a2cfc00 0000000000000000 ffff880462b75940 ffffffff81c0e500 [ 244.405568] ffff880476419280 ffffc900018f7c90 ffffffff817dcf62 000000000000003c [ 244.405572] 0000000100000000 0000000000000002 ffff880462b75940 ffff880462b75940 [ 244.405573] Call Trace: [ 244.405580] [<ffffffff817dcf62>] ? __schedule+0x222/0x6a0 [ 244.405584] [<ffffffff817dd416>] schedule+0x36/0x80 [ 244.405588] [<ffffffff817e041c>] schedule_timeout+0x1fc/0x390 [ 244.405592] [<ffffffff817df1b4>] __down_common+0xa5/0xf8 [ 244.405598] [<ffffffff810b2ca8>] ? put_prev_entity+0x48/0x710 [ 244.405601] [<ffffffff817df224>] __down+0x1d/0x1f [ 244.405606] [<ffffffff810c71a1>] down+0x41/0x50 [ 244.405611] [<ffffffff810d380a>] console_lock+0x1a/0x40 [ 244.405614] [<ffffffff814e3c03>] console_callback+0x13/0x160 [ 244.405617] [<ffffffff817dcf6a>] ? __schedule+0x22a/0x6a0 [ 244.405623] [<ffffffff810954e3>] process_one_work+0x153/0x3f0 [ 244.405628] [<ffffffff81095cab>] worker_thread+0x12b/0x4b0 [ 244.405633] [<ffffffff81095b80>] ? rescuer_thread+0x350/0x350 [ 244.405637] [<ffffffff8109b473>] kthread+0xd3/0xf0 [ 244.405641] [<ffffffff8109b3a0>] ? kthread_park+0x60/0x60 [ 244.405645] [<ffffffff8109b3a0>] ? kthread_park+0x60/0x60 [ 244.405649] [<ffffffff817e1ee5>] ret_from_fork+0x25/0x30 Signed-off-by:
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Christian König authored
Seems to be mandatory for WMV playback. Bugs: https://bugs.freedesktop.org/show_bug.cgi?id=100510 Signed-off-by:
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Alex Deucher authored
fixed in: "drm/amdgpu:fix race condition" Reviewed-by:
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Alex Deucher authored
Reviewed-by:
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Christian König authored
Trace on which hub we are doing the flush. v2: fix typo in commit message Signed-off-by:
Andres Rodriguez <andresx7@gmail.com> Signed-off-by:
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Christian König authored
Trace on which VMHUB we assigned an VMID. Signed-off-by:
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Christian König authored
Enable concurrent VM flushes for Vega10. Signed-off-by:
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Christian König authored
For Vega10 we have 18 VM invalidation engines for each VMHUB. Start to assign them manually to the rings. v2: add a BUG_ON if we use to many engines Signed-off-by:
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