- Jul 11, 2022
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Arnd Bergmann authored
Merge tag 'v5.19-next-dts64' of git://git.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux into arm/dt Some fixes to follow DT spec. MT6795: - Big update of supported devices: cpu-map, L2 cache, PMU, watchdog, MediaTek timer, Arm CCI, pincontroller MT7622: - Change WPS button to active low MT8173: - Add infracfg property to the IOMMU node (also for mt2712e) - Add optional AXI clock to NOR Flash node MT8183: - add Medaitek CCI support - add support for Smart Voltag Scaling (SVS) - add GCE support to mutex - Add panel default rotation to some chromebooks - Add power supply to power domain so that SRAM for the GPU has power MT8186: - compatible added, DTS not yet ready. MT8192: - Add support for Acer Chromebook 514 MT8195: - Add efuse node - Enable USB wakeup support - Add support for Acer Chromebook Spin 513 * tag 'v5.19-next-dts64' of git://git.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux: (66 commits) arm64: dts: mt8183: Add panel rotation arm64: dts: mt7622: fix BPI-R64 WPS button arm64: dts: mt8173: Fix nor_flash node arm64: dts: mediatek: cherry: Add I2C-HID touchscreen on I2C4 arm64: dts: mediatek: cherry: Enable support for the SPI NOR flash arm64: dts: mediatek: cherry: Enable MT6360 sub-pmic on I2C7 arm64: dts: mediatek: cherry: Enable T-PHYs and USB XHCI controllers arm64: dts: mediatek: cherry: Enable I2C and SPI controllers arm64: dts: mediatek: cherry: Document gpios and add default pin config arm64: dts: mediatek: cherry: Add support for internal eMMC storage arm64: dts: mediatek: cherry: Assign interrupt line to MT6359 PMIC arm64: dts: mediatek: cherry: Add platform regulators layout and config arm64: dts: mediatek: Introduce MT8195 Cherry platform's Tomato dt-bindings: arm: mediatek: Add MT8195 Cherry Tomato Chromebooks arm64: dts: mediatek: asurada: Add SPI NOR flash memory arm64: dts: mediatek: asurada: Enable SCP arm64: dts: mediatek: asurada: Enable MMC arm64: dts: mediatek: asurada: Add SPMI regulators arm64: dts: mediatek: asurada: Add MT6359 PMIC arm64: dts: mediatek: asurada: Enable PCIe and add WiFi ... Link: https://lore.kernel.org/r/b0d5b584-2693-73b3-79f6-3e2292f006ea@gmail.com Signed-off-by:
Arnd Bergmann <arnd@arndb.de>
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Arnd Bergmann authored
Merge tag 'v5.19-next-dts32' of git://git.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux into arm/dt Airoha EN7523: - Add clock and PCIe support Several style fixes to comply with DT spec. * tag 'v5.19-next-dts32' of git://git.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux: ARM: dts: mediatek: align gpio-key node names with dtschema ARM: dts: mediatek: adjust whitespace around '=' ARM: dts: Add PCIe support for Airoha EN7523 ARM: dts: add clock support for Airoha EN7523 Link: https://lore.kernel.org/r/63536da6-fbe4-2d96-ab91-ae756cd580c4@gmail.com Signed-off-by:
Arnd Bergmann <arnd@arndb.de>
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- Jul 08, 2022
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Arnd Bergmann authored
Merge tag 'renesas-dt-bindings-for-v5.20-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into arm/dt Renesas DT binding updates for v5.20 (take two) - Miscellaneous fixes and improvements. * tag 'renesas-dt-bindings-for-v5.20-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel: dt-bindings: hwinfo: renesas,prr: move from soc directory MAINTAINERS: Add Renesas SoC DT bindings to Renesas Architecture sections Link: https://lore.kernel.org/r/cover.1657278851.git.geert+renesas@glider.be Signed-off-by:
Arnd Bergmann <arnd@arndb.de>
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Arnd Bergmann authored
Merge tag 'renesas-arm-dt-for-v5.20-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into arm/dt Renesas ARM DT updates for v5.20 (take two) - Ethernet MAC and switch support for the RZ/N1 SoC on the RZN1D-DB development board, - AA1024XD12 panel overlay support for the Draak, Ebisu, and Salvator-X(S) development boards, - Miscellaneous fixes and improvements. * tag 'renesas-arm-dt-for-v5.20-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel: arm64: dts: renesas: Add panel overlay for Draak and Ebisu boards arm64: dts: renesas: Add panel overlay for Salvator-X(S) boards arm64: dts: renesas: Prepare AA1024XD12 panel .dtsi for overlay support arm64: dts: renesas: spider-cpu: Fix scif0/scif3 sort order ARM: dts: r9a06g032-rzn1d400-db: Add switch description dt-bindings: net: pcs: add bindings for Renesas RZ/N1 MII converter ARM: dts: r9a06g032: Describe switch ARM: dts: r9a06g032: Describe GMAC2 ARM: dts: r9a06g032: Describe MII converter arm64: dts: renesas: r9a07g054l2-smarc: Correct SoC name in comment ARM: dts: renesas: Fix DA9063 watchdog subnode names arm64: dts: renesas: r8a779m8: Drop operating points above 1.5 GHz Link: https://lore.kernel.org/r/cover.1657278845.git.geert+renesas@glider.be Signed-off-by:
Arnd Bergmann <arnd@arndb.de>
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https://github.com/Xilinx/linux-xlnxArnd Bergmann authored
arm64: dts: ZynqMP DT changes for v5.20 - Extend gpio-zynq DT binding (compatible, power-domains, gpio-line-names) - Fix sm-k26 gpio comment - Wire AMS device - Align gpio-keys node names with dtschema * tag 'zynqmp-dt-for-v5.20' of https://github.com/Xilinx/linux-xlnx: arm64: dts: xilinx: align gpio-key node names with dtschema arm64: dts: zynqmp: add AMS driver to device tree dt-bindings: gpio: zynq: Describe gpio-line-names arm64: zynqmp: Fix comment about number of gpio line names dt-bindings: gpio: zynq: Add power-domains dt-bindings: gpio: zynq: Add missing compatible strings Link: https://lore.kernel.org/r/452e8c68-b63b-f4f6-a937-67f65c64a8a0@monstr.eu Signed-off-by:
Arnd Bergmann <arnd@arndb.de>
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https://github.com/Xilinx/linux-xlnxArnd Bergmann authored
ARM: Zynq DT changes for v5.20 - Align gpio-keys node names with dtschema * tag 'zynq-dt-for-v5.20' of https://github.com/Xilinx/linux-xlnx: ARM: dts: xilinx: align gpio-key node names with dtschema Link: https://lore.kernel.org/r/87d2bd4a-b90d-6396-17c5-c95ac64d17d0@monstr.eu Signed-off-by:
Arnd Bergmann <arnd@arndb.de>
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- Jul 07, 2022
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Hsin-Yi Wang authored
krane, kakadu, and kodama boards have a default panel rotation. Signed-off-by:
Hsin-Yi Wang <hsinyi@chromium.org> Reviewed-by:
Enric Balletbo i Serra <enric.balletbo@collabora.com> Tested-by:
Enric Balletbo i Serra <enric.balletbo@collabora.com> Link: https://lore.kernel.org/r/20220530113033.124072-2-hsinyi@chromium.org Signed-off-by:
Matthias Brugger <matthias.bgg@gmail.com>
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Nick Hainke authored
The bananapi R64 (BPI-R64) experiences wrong WPS button signals. In OpenWrt pushing the WPS button while powering on the device will set it to recovery mode. Currently, this also happens without any user interaction. In particular, the wrong signals appear while booting the device or restarting it, e.g. after doing a system upgrade. If the device is in recovery mode the user needs to manually power cycle or restart it. The official BPI-R64 sources set the WPS button to GPIO_ACTIVE_LOW in the device tree. This setting seems to suppress the unwanted WPS button press signals. So this commit changes the button from GPIO_ACTIVE_HIGH to GPIO_ACTIVE_LOW. The official BPI-R64 sources can be found on https://github.com/BPI-SINOVOIP/BPI-R64-openwrt Fixes: 0b6286dd ("arm64: dts: mt7622: add bananapi BPI-R64 board") Suggested-by:
INAGAKI Hiroshi <musashino.open@gmail.com> Signed-off-by:
Nick Hainke <vincent@systemli.org> Link: https://lore.kernel.org/r/20220630111746.4098-1-vincent@systemli.org Signed-off-by:
Matthias Brugger <matthias.bgg@gmail.com>
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Xiangsheng Hou authored
Add axi clock since the driver change to DMA mode which need to enable axi clock. And change spi clock to 26MHz as default. Signed-off-by:
Xiangsheng Hou <xiangsheng.hou@mediatek.com> Link: https://lore.kernel.org/r/20220630090157.29486-2-xiangsheng.hou@mediatek.com Signed-off-by:
Matthias Brugger <matthias.bgg@gmail.com>
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AngeloGioacchino Del Regno authored
This platform carries a HID compatible I2C touchscreen on the i2c4 bus, but it may be at a different address, depending on the board model. Add the node for a touchscreen at 0x10, but enable it only in the final board dts. Signed-off-by:
AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://lore.kernel.org/r/20220704101321.44835-12-angelogioacchino.delregno@collabora.com Signed-off-by:
Matthias Brugger <matthias.bgg@gmail.com>
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AngeloGioacchino Del Regno authored
This platform has a SPI NOR: enable support for it, completing the storage compartment enablement for the entire platform. Signed-off-by:
AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Reviewed-by:
Nícolas F. R. A. Prado <nfraprado@collabora.com> Link: https://lore.kernel.org/r/20220704101321.44835-11-angelogioacchino.delregno@collabora.com Signed-off-by:
Matthias Brugger <matthias.bgg@gmail.com>
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AngeloGioacchino Del Regno authored
All devices of the Cherry platform have a MT6360 sub-pmic, providing two LDOs. Add the required node to enable the PMIC but without regulators yet, as these will be added in a later commit. Signed-off-by:
AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Reviewed-by:
Nícolas F. R. A. Prado <nfraprado@collabora.com> Link: https://lore.kernel.org/r/20220704101321.44835-10-angelogioacchino.delregno@collabora.com Signed-off-by:
Matthias Brugger <matthias.bgg@gmail.com>
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AngeloGioacchino Del Regno authored
Add USB functionality by enabling the required PHYs and the XHCI controllers. This enables all of the supported USB ports on the Cherry boards. Please note that u3phy1 also enables u3port1, which is configured to be a PCI-Express PHY for the second PCIe controller that is found on the MT8195 SoC, which will be enabled in a later commit. Signed-off-by:
AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Reviewed-by:
Nícolas F. R. A. Prado <nfraprado@collabora.com> Link: https://lore.kernel.org/r/20220704101321.44835-9-angelogioacchino.delregno@collabora.com Signed-off-by:
Matthias Brugger <matthias.bgg@gmail.com>
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AngeloGioacchino Del Regno authored
This platform uses eight I2C controllers and one SPI controller: in preparation for enabling devices attached to these controllers, add basic configuration to enable the busses. Signed-off-by:
AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Reviewed-by:
Nícolas F. R. A. Prado <nfraprado@collabora.com> Link: https://lore.kernel.org/r/20220704101321.44835-8-angelogioacchino.delregno@collabora.com Signed-off-by:
Matthias Brugger <matthias.bgg@gmail.com>
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AngeloGioacchino Del Regno authored
Add gpio-line-names to document GPIO names and add the default basic pin configuration to allow lower power operation by setting appropriate state on the unused pins. Signed-off-by:
AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Reviewed-by:
Nícolas F. R. A. Prado <nfraprado@collabora.com> Link: https://lore.kernel.org/r/20220704101321.44835-7-angelogioacchino.delregno@collabora.com Signed-off-by:
Matthias Brugger <matthias.bgg@gmail.com>
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AngeloGioacchino Del Regno authored
Add mtk-sd controller and pin configuration to enable the internal eMMC storage: now it is possible to mount a rootfs located at the internal storage. Signed-off-by:
AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Reviewed-by:
Nícolas F. R. A. Prado <nfraprado@collabora.com> Link: https://lore.kernel.org/r/20220704101321.44835-6-angelogioacchino.delregno@collabora.com Signed-off-by:
Matthias Brugger <matthias.bgg@gmail.com>
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AngeloGioacchino Del Regno authored
To allow MT6359 peripherals to trigger interrupts and the driver to safely handle them, assign the right interrupt line for the Cherry platform to the MT6359 PMIC node. Signed-off-by:
AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Reviewed-by:
Nícolas F. R. A. Prado <nfraprado@collabora.com> Link: https://lore.kernel.org/r/20220704101321.44835-5-angelogioacchino.delregno@collabora.com Signed-off-by:
Matthias Brugger <matthias.bgg@gmail.com>
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AngeloGioacchino Del Regno authored
Add the regulators layout for this platform, including the basic power rails controlled by the EC (and/or always on). Moreover, include the MT6359 PMIC devicetree and add some configuration for its regulators, essential to keep the machine alive after booting. Signed-off-by:
AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Reviewed-by:
Nícolas F. R. A. Prado <nfraprado@collabora.com> Link: https://lore.kernel.org/r/20220704101321.44835-4-angelogioacchino.delregno@collabora.com Signed-off-by:
Matthias Brugger <matthias.bgg@gmail.com>
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AngeloGioacchino Del Regno authored
Introduce the MT8195 Cherry Chromebook platform, including three revisions of Cherry Tomato boards. This basic configuration allows to boot Linux on all board revisions and get a serial console from a ramdisk. Signed-off-by:
AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://lore.kernel.org/r/20220704101321.44835-3-angelogioacchino.delregno@collabora.com Signed-off-by:
Matthias Brugger <matthias.bgg@gmail.com>
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AngeloGioacchino Del Regno authored
Document board compatibles for the MT8195 Cherry platform's Tomato Chromebooks, at the time of writing composed of four revisions (r1, r2, r3-r4). Signed-off-by:
AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Reviewed-by:
Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20220704101321.44835-2-angelogioacchino.delregno@collabora.com Signed-off-by:
Matthias Brugger <matthias.bgg@gmail.com>
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Nícolas F. R. A. Prado authored
Add support for the SPI NOR flash memory present on the Asurada platform. Signed-off-by:
Nícolas F. R. A. Prado <nfraprado@collabora.com> Reviewed-by:
AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Tested-by:
Chen-Yu Tsai <wenst@chromium.org> Link: https://lore.kernel.org/r/20220629155956.1138955-20-nfraprado@collabora.com Signed-off-by:
Matthias Brugger <matthias.bgg@gmail.com>
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Nícolas F. R. A. Prado authored
Enable support for the SCP co-processor present on MT8192. It is used as part of the video encoding and decoding processes. A region of memory is carved out for its use, and remoteproc setup for communication with the ChromeOS EC. Signed-off-by:
Nícolas F. R. A. Prado <nfraprado@collabora.com> Reviewed-by:
AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Tested-by:
Chen-Yu Tsai <wenst@chromium.org> Link: https://lore.kernel.org/r/20220629155956.1138955-19-nfraprado@collabora.com Signed-off-by:
Matthias Brugger <matthias.bgg@gmail.com>
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Nícolas F. R. A. Prado authored
Enable both MMC controllers present on Asurada. MMC0 is for non-removable internal memory, while MMC1 is an SD card slot. MMC1 isn't used on all machines, but in those cases the CD interrupt is never triggered and thus it is basically as if it was disabled. Signed-off-by:
Nícolas F. R. A. Prado <nfraprado@collabora.com> Reviewed-by:
AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Tested-by:
Chen-Yu Tsai <wenst@chromium.org> Link: https://lore.kernel.org/r/20220629155956.1138955-18-nfraprado@collabora.com Signed-off-by:
Matthias Brugger <matthias.bgg@gmail.com>
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Nícolas F. R. A. Prado authored
The Asurada platform uses regulators from MT6315 PMICs acessible through SPMI. Add support for them. Signed-off-by:
Nícolas F. R. A. Prado <nfraprado@collabora.com> Reviewed-by:
AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Tested-by:
Chen-Yu Tsai <wenst@chromium.org> Link: https://lore.kernel.org/r/20220629155956.1138955-17-nfraprado@collabora.com Signed-off-by:
Matthias Brugger <matthias.bgg@gmail.com>
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Nícolas F. R. A. Prado authored
MT6359 is the primary PMIC present on the Asurada platform. Include its dtsi and configure properties specific for the platform. Signed-off-by:
Nícolas F. R. A. Prado <nfraprado@collabora.com> Reviewed-by:
AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Tested-by:
Chen-Yu Tsai <wenst@chromium.org> Link: https://lore.kernel.org/r/20220629155956.1138955-16-nfraprado@collabora.com Signed-off-by:
Matthias Brugger <matthias.bgg@gmail.com>
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Nícolas F. R. A. Prado authored
Enable MT8192's PCIe controller and add support for the MT7921e WiFi card that is present on that bus for the Asurada platform. Signed-off-by:
Nícolas F. R. A. Prado <nfraprado@collabora.com> Reviewed-by:
AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Tested-by:
Chen-Yu Tsai <wenst@chromium.org> Link: https://lore.kernel.org/r/20220629155956.1138955-15-nfraprado@collabora.com Signed-off-by:
Matthias Brugger <matthias.bgg@gmail.com>
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Nícolas F. R. A. Prado authored
Enable XHCI controller on the Asurada platform. This allows the use of the USB ports, and therefore a rootfs can be loaded and a usable shell reached from a live USB image. Signed-off-by:
Nícolas F. R. A. Prado <nfraprado@collabora.com> Reviewed-by:
AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Tested-by:
Chen-Yu Tsai <wenst@chromium.org> Link: https://lore.kernel.org/r/20220629155956.1138955-14-nfraprado@collabora.com Signed-off-by:
Matthias Brugger <matthias.bgg@gmail.com>
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Nícolas F. R. A. Prado authored
The Spherion board has keyboard backlight controlled by the PWM signal generated by the ChromeOS EC. Enable PWM output for ChromeOS EC and add a PWM controlled LED node for the keyboard backlight. Signed-off-by:
Nícolas F. R. A. Prado <nfraprado@collabora.com> Reviewed-by:
AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Tested-by:
Chen-Yu Tsai <wenst@chromium.org> Link: https://lore.kernel.org/r/20220629155956.1138955-13-nfraprado@collabora.com Signed-off-by:
Matthias Brugger <matthias.bgg@gmail.com>
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Nícolas F. R. A. Prado authored
All machines of the Asurada platform have a touchscreen at address 0x10 in the I2C0 bus, but the devices vary: Spherion has the Elan eKTH3500 touchscreen, while Hayato has a generic HID-over-i2c touchscreen. Add common support for the touchscreens on the platform and the specifics in each board file. Signed-off-by:
Nícolas F. R. A. Prado <nfraprado@collabora.com> Reviewed-by:
AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Tested-by:
Chen-Yu Tsai <wenst@chromium.org> Link: https://lore.kernel.org/r/20220629155956.1138955-12-nfraprado@collabora.com Signed-off-by:
Matthias Brugger <matthias.bgg@gmail.com>
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Nícolas F. R. A. Prado authored
Add support for the Elan eKTH3000 i2c trackpad present on Asurada. It is connected to the I2C2 bus and has address 0x15. Signed-off-by:
Nícolas F. R. A. Prado <nfraprado@collabora.com> Reviewed-by:
AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Tested-by:
Chen-Yu Tsai <wenst@chromium.org> Link: https://lore.kernel.org/r/20220629155956.1138955-11-nfraprado@collabora.com Signed-off-by:
Matthias Brugger <matthias.bgg@gmail.com>
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Nícolas F. R. A. Prado authored
The Asurada platform has a Google Security Chip connected to the SPI5 bus. It runs the cr50 firmware and provides TPM functionality. Add support for it. Signed-off-by:
Nícolas F. R. A. Prado <nfraprado@collabora.com> Reviewed-by:
AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Tested-by:
Chen-Yu Tsai <wenst@chromium.org> Link: https://lore.kernel.org/r/20220629155956.1138955-10-nfraprado@collabora.com Signed-off-by:
Matthias Brugger <matthias.bgg@gmail.com>
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Nícolas F. R. A. Prado authored
Chromebooks' embedded keyboards differ from standard layouts for the top row in that they have shortcuts in place of the standard function keys. Map these keys to achieve the functionality that is pictured on the printouts. There's a minor difference between the keys present on Hayato, which uses an older layout, and Spherion, which uses a newer one. Signed-off-by:
Nícolas F. R. A. Prado <nfraprado@collabora.com> Reviewed-by:
AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Tested-by:
Chen-Yu Tsai <wenst@chromium.org> Link: https://lore.kernel.org/r/20220629155956.1138955-9-nfraprado@collabora.com Signed-off-by:
Matthias Brugger <matthias.bgg@gmail.com>
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Nícolas F. R. A. Prado authored
Add support for the ChromeOS Embedded Controller present on the Asurada platform. It is connected through the SPI1 bus and offers several functionalities: base detection, PWM controller, I2C tunneling, regulators, Type-C connector management, keyboard and Smart Battery Metrics (SBS). Signed-off-by:
Nícolas F. R. A. Prado <nfraprado@collabora.com> Reviewed-by:
AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Tested-by:
Chen-Yu Tsai <wenst@chromium.org> Link: https://lore.kernel.org/r/20220629155956.1138955-8-nfraprado@collabora.com Signed-off-by:
Matthias Brugger <matthias.bgg@gmail.com>
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Nícolas F. R. A. Prado authored
The Asurada platform has five I2C controllers and two SPI controllers that are used. In preparation for enabling the devices connected to these controllers, enable and configure their busses. Signed-off-by:
Nícolas F. R. A. Prado <nfraprado@collabora.com> Reviewed-by:
AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Tested-by:
Chen-Yu Tsai <wenst@chromium.org> Link: https://lore.kernel.org/r/20220629155956.1138955-7-nfraprado@collabora.com Signed-off-by:
Matthias Brugger <matthias.bgg@gmail.com>
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Nícolas F. R. A. Prado authored
Add system-wide power supplies present on all of the boards in the Asurada family. Signed-off-by:
Nícolas F. R. A. Prado <nfraprado@collabora.com> Reviewed-by:
AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Tested-by:
Chen-Yu Tsai <wenst@chromium.org> Acked-by:
Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20220629155956.1138955-6-nfraprado@collabora.com Signed-off-by:
Matthias Brugger <matthias.bgg@gmail.com>
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Nícolas F. R. A. Prado authored
Add the gpio-line-names property to gpio-controller in order to document the usage of GPIOs on the Asurada platform. Signed-off-by:
Nícolas F. R. A. Prado <nfraprado@collabora.com> Reviewed-by:
AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Tested-by:
Chen-Yu Tsai <wenst@chromium.org> Link: https://lore.kernel.org/r/20220629155956.1138955-5-nfraprado@collabora.com Signed-off-by:
Matthias Brugger <matthias.bgg@gmail.com>
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Nícolas F. R. A. Prado authored
Introduce the MT8192 Asurada Chromebook platform, including the Asurada Spherion and Asurada Hayato boards. This is enough configuration to get serial output working on Spherion and Hayato. Signed-off-by:
Nícolas F. R. A. Prado <nfraprado@collabora.com> Reviewed-by:
AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Tested-by:
Chen-Yu Tsai <wenst@chromium.org> Link: https://lore.kernel.org/r/20220629155956.1138955-4-nfraprado@collabora.com Signed-off-by:
Matthias Brugger <matthias.bgg@gmail.com>
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Nícolas F. R. A. Prado authored
Add binding for the Google Hayato board. Signed-off-by:
Nícolas F. R. A. Prado <nfraprado@collabora.com> Reviewed-by:
AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Tested-by:
Chen-Yu Tsai <wenst@chromium.org> Acked-by:
Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20220629155956.1138955-3-nfraprado@collabora.com Signed-off-by:
Matthias Brugger <matthias.bgg@gmail.com>
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Nícolas F. R. A. Prado authored
Add binding for the Google Spherion board, which is used for Acer Chromebook 514 (CB514-2H). Signed-off-by:
Nícolas F. R. A. Prado <nfraprado@collabora.com> Reviewed-by:
AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Tested-by:
Chen-Yu Tsai <wenst@chromium.org> Acked-by:
Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20220629155956.1138955-2-nfraprado@collabora.com Signed-off-by:
Matthias Brugger <matthias.bgg@gmail.com>
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AngeloGioacchino Del Regno authored
Add a phandle to the MT8183_POWER_DOMAIN_MFG_ASYNC power domain and assign the GPU VSRAM supply to this in mt8183-kukui: this allows to keep the sram powered up while the GPU is used. Signed-off-by:
AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://lore.kernel.org/r/20220623123850.110225-3-angelogioacchino.delregno@collabora.com Signed-off-by:
Matthias Brugger <matthias.bgg@gmail.com>
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