- Jul 18, 2010
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Kulikov Vasiliy authored
The code checks 'davinci_vc' after kzalloc() and do not checks 'davinci_vcif_dev' that kzalloc() result is assigned to. It seems that it is a typo (autocompletion?). Signed-off-by:
Kulikov Vasiliy <segooon@gmail.com> Acked-by:
Liam Girdwood <lrg@slimlogic.co.uk> Signed-off-by:
Mark Brown <broonie@opensource.wolfsonmicro.com>
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Kuninori Morimoto authored
Specified ID is necessary, when some codecs are used with FSI. Signed-off-by:
Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Acked-by:
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Mark Brown authored
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Mark Brown authored
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- Jul 15, 2010
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Mark Brown authored
When a device is powered down volatile registers can't be read so attempts to display codec_reg will show error values, and obviously it is also possible for there to be hardware errors too. Check for errors from reads and display them more clearly when formatting codec_reg. Signed-off-by:
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Mark Brown authored
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Axel Lin authored
snd_soc_unregister_codec is called twice if snd_soc_register_dai fail. Signed-off-by:
Axel Lin <axel.lin@gmail.com> Acked-by:
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Axel Lin authored
otherwise the error path will always be executed. Signed-off-by:
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- Jul 13, 2010
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Manuel Lauss authored
Annotate platform probe callback with __devinit instead of plain __init. Signed-off-by:
Manuel Lauss <manuel.lauss@googlemail.com> Signed-off-by:
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arnaud.patard@rtp-net.org authored
The controller has mute/unmute capability and some bootloader may mute them at boot. If it's not handled, all things will seem to be working but no sound will come out of the speaker/headphone. Signed-off-by:
Arnaud Patard <arnaud.patard@rtp-net.org> Signed-off-by:
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arnaud.patard@rtp-net.org authored
Kirkwood controller needs to be informed if the audio stream is mono or not. Failing to do so will result in playing at the wrong speed. Signed-off-by:
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Kuninori Morimoto authored
This patch add hw_params to snd_soc_dai_ops, because board specific set_rate is needed when FSI was used as master mode. This patch remove fsi_clk_ctrl from fsi_dai_startup, because clock should be disabled before set_rate. Signed-off-by:
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Kuninori Morimoto authored
This patch didn't use dev_err, because it is difficult to get struct device here. Signed-off-by:
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Kuninori Morimoto authored
Many registers which were grouped by category were added in FSI2. To make easy to switch FSI/FSI2, fsi_core was added instead of fsi_regs. Signed-off-by:
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Kuninori Morimoto authored
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Kuninori Morimoto authored
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Kuninori Morimoto authored
There is no necessity that each bit in this area has the meaning. This patch modify it to sequence number Signed-off-by:
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Joe Perches authored
Signed-off-by:
Joe Perches <joe@perches.com> Acked-by:
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Joe Perches authored
Signed-off-by:
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Mark Brown authored
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Kuninori Morimoto authored
channel size should be set before setting register value Signed-off-by:
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Kuninori Morimoto authored
Clock inversion should be specified by each flags bit. Signed-off-by:
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- Jul 09, 2010
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Mark Brown authored
The WM8994 can output a clock derived from its internal SYSCLK, called OPCLK. The rate can be selected as a sysclk, with a division from the SYSCLK rate specified (multiplied by 10 since a division of 5.5 is supported) and the clock can be disabled by specifying a divisor of zero. Signed-off-by:
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Mark Brown authored
Very handy for debug. Signed-off-by:
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- Jul 06, 2010
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Raffaele Recalcati authored
i2s_accurate_sck switch can be used to have a better approximate sampling frequency. The clock is an externally visible bit clock and it is named i2s continuous serial clock (I2S_SCK). The trade off is between more accurate clock (fast clock) and less accurate clock (slow clock). The waveform will be not symmetric. Probably it is possible to get a better algorithm for calculating the divider, trying to keep a slower clock as possible. This patch has been developed against the http://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-davinci.git git tree and has been tested on bmx board (similar to dm365 evm, but using uda1345 as external audio codec). Signed-off-by:Raffaele Recalcati <raffaele.recalcati@bticino.it> Signed-off-by:
Davide Bonfanti <davide.bonfanti@bticino.it> Acked-by:
Sudhakar Rajashekhara <sudhakar.raj@ti.com> Signed-off-by:
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Raffaele Recalcati authored
When McBSP peripheral gets the clock from an external pin, there are three possible chooses, MCBSP_CLKX, MCBSP_CLKR and MCBSP_CLKS. evm-dm365 uses MCBSP_CLKR, instead in bmx board I have a different hardware connection and I use MCBSP_CLKS, so I have added this possibility. This patch has been developed against the: http://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-davinci.git git tree and has been tested on bmx board (similar to dm365 evm) Signed-off-by: -
Raffaele Recalcati authored
Added two clocking options for dm365 McBSP peripheral when used with I2S timings, that are SND_SOC_DAIFMT_CBS_CFS (the cpu generates clock and frame sync) and SND_SOC_DAIFMT_CBS_CFM (the cpu gets clock from external pin and generates frame sync). A slave clock management can be important when the external codec needs the system clock and the bit clock synchronized (tested with uda1345). This patch has been developed against the: http://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-davinci.git git tree and has been tested on bmx board (similar to dm365 evm, but using uda1345 as external audio codec). Signed-off-by: -
Maurus Cuelenaere authored
The speaker was enabled when the headphone was plugged in, which isn't the wanted behaviour so correct this. Signed-off-by:
Maurus Cuelenaere <mcuelenaere@gmail.com> Acked-by:
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Mark Brown authored
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- Jul 05, 2010
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Mark Brown authored
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Mark Brown authored
It will be replaced with automatic deemphasis rate configuration but since we have an enumeration table in this driver this is done in a separate commit to make the renumbering of the enumeration items clear. Signed-off-by:
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Mark Brown authored
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- Jul 04, 2010
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Maurus Cuelenaere authored
This adds sound support for the SmartQ board. The hardware consists of a S3C6410 coupled with a WM8987 over I²S. The WM8750 driver is used for driving the WM8987, as they are register compatible. Signed-off-by:
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Maurus Cuelenaere authored
The WM8987 codec is register compatible with the WM8750, so just add it to the SPI and I²C device table. Signed-off-by:
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- Jul 02, 2010
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Kuninori Morimoto authored
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- Jun 30, 2010
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Vladimir Zapolskiy authored
For UDA1341 codec power control is managed in STATUS1 register, and for all other codecs in DATA011 register. Signed-off-by:
Vladimir Zapolskiy <vzapolskiy@gmail.com> Signed-off-by:
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Vladimir Zapolskiy authored
In UDA1340, UDA1344 and UDA1345 codecs there is one more functional register in part of DATA0 tranfser. For UDA1341 this register coincides with EA register. Signed-off-by:
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Mark Brown authored
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- Jun 25, 2010
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Eric Bénard authored
Signed-off-by:
Eric Bénard <eric@eukrea.com> Acked-by:
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Vladimir Zapolskiy authored
On initialization ADC/DAC are enabled only for UDA1341, that's why bias_level shall be set to off explicitly, otherwise dapm is misinformed about bias_level on startup. Signed-off-by:
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