- Oct 13, 2020
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Tao Zhou authored
Update driver if version according to PMFW with version 0x003B0100. Signed-off-by:
Tao Zhou <tao.zhou1@amd.com> Reviewed-by:
Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by:
Alex Deucher <alexander.deucher@amd.com>
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Tao Zhou authored
Same as navy_flounder, the athub ip of dimgrey_cavefish is v2.1. Signed-off-by:
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Tao Zhou authored
Support both back and front door loading for dimgrey_cavefish. Signed-off-by:
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James Zhu authored
Enable JPEG3.0 PG and CG for dimgrey_cavefish. Signed-off-by:
James Zhu <James.Zhu@amd.com> Reviewed-by:
Leo Liu <leo.liu@amd.com> Reviewed-by:
Kenneth Feng <kenneth.feng@amd.com> Signed-off-by:
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James Zhu authored
Enable VCN3.0 PG and CG for dimgrey_cavefish Signed-off-by:
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Chengming Gui authored
Add KFD support. Signed-off-by:
Chengming Gui <Jack.Gui@amd.com> Reviewed-by:
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Chengming Gui authored
Add KFD support for dimgrey cavefish. v2: rebase (Alex) Signed-off-by:
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Tao Zhou authored
Add gc golden setting for dimgrey_cavefish. Signed-off-by:
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Tao Zhou authored
Same as sienna_cichlid, dimgrey_cavefish supports WAIT_REG_MEM packet. Signed-off-by:
Jiansong Chen <Jiansong.Chen@amd.com> Signed-off-by:
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Tao Zhou authored
Add check before reroute ih setting, it's not supported by some ASICs. Signed-off-by:
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Tao Zhou authored
General psp support for dimgrey_cavefish. v2: remove the checks for asd load and reroute ih. Signed-off-by:
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Tao Zhou authored
Increase fw_name string size so longer chip name can be stored. v2: define macro for the length of psp fw name. Signed-off-by:
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Tao Zhou authored
Reuse sienna_cichlid pp table for dimgrey_cavefish. v2: update related comment. Signed-off-by:
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Tao Zhou authored
A longer chip name needs more space. v2: define macro for the length of smu fw name Signed-off-by:
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Tao Zhou authored
The athub version for dimgrey_cavefish is v2.1. Signed-off-by:
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James Zhu authored
Enable VCN DPG mode for dimgrey_cavefish. Signed-off-by:
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James Zhu authored
Add firmware support for dimgrey_cavefish. Signed-off-by:
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Tao Zhou authored
pa_sc_tile_steering_override is only programmable for gfx10.0/10.1/10.2, the same as sienna_cichlid. Signed-off-by:
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Tao Zhou authored
Add virtual ip block for dimgrey_cavefish. Signed-off-by:
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Tao Zhou authored
The gfx version of dimgrey_cavefish is 10.3, identical to sienna_cichlid, follow the way of sienna_cichlid. Signed-off-by:
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Tao Zhou authored
Enable sdma block for dimgrey_cavefish, same as sienna_cichlid. Signed-off-by:
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Tao Zhou authored
Enable gfx block for dimgrey_cavefish, same as navy_flounder. Signed-off-by:
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Tao Zhou authored
Enable ih block for dimgrey_cavefish, same as navy_flounder. Signed-off-by:
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Tao Zhou authored
Enable gmc block for dimgrey_cavefish, same as sienna_cichlid. Signed-off-by:
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Tao Zhou authored
Same as navy_flounder. Signed-off-by:
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Tao Zhou authored
Same as navy_flounder. Signed-off-by:
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Tao Zhou authored
Add ip offset definition for dimgrey_cavefish and initialize it. Signed-off-by:
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Tao Zhou authored
Add external id and set clock gating for dimgrey_cavefish. Signed-off-by:
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Tao Zhou authored
Set gfx clock gating for dimgrey_cavefish. Signed-off-by:
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Tao Zhou authored
Same as navy_flounder. Signed-off-by:
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Tao Zhou authored
Add support for dimgrey_cavefish cp/rlc firmware. Signed-off-by:
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Tao Zhou authored
Same as navi series. Signed-off-by:
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Tao Zhou authored
Use direct load for dimgrey_cavefish. Signed-off-by:
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Tao Zhou authored
Load gpu info firmware for dimgrey_cavefish. Signed-off-by:
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Tao Zhou authored
Add chip type for dimgrey_cavefish. Signed-off-by:
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Rodrigo Siqueira authored
It was recently introduced a change that enables driver to disable streams if pixel clock changes. Consequently, the code path executed in the disable vbios function expanded to an encoder verification part. The encoder loop is nested inside the pipe count loop, and both loops share the 'i' variable in control of their flow. This situation may lead to an infinite loop because the encoder loop constantly updates the `i` variable, making the first loop always positive. As a result, we can see a soft hang during the module load (modprobe amdgpu) and a series of dmesg log that looks like this: kernel:[ 124.538727] watchdog: BUG: soft lockup - CPU#2 stuck for 22s! [modprobe:1000] RSP: 0018:ffffabbf419bf0e8 EFLAGS: 00000282 RAX: ffffffffc0809de0 RBX: ffff93b35ccc0000 RCX: ffff93b366c21800 RDX: 0000000000000000 RSI: 0000000000000141 RDI: ffff93b35ccc0000 RBP: ffffabbf419bf108 R08: ffffabbf419bf164 R09: 0000000000000001 R10: 0000000000000003 R11: 0000000000000003 R12: 0000000008677d40 R13: 0000000000000141 R14: ffff93b35cfc0000 R15: ffff93b35abc0000 FS: 00007f1400717540(0000) GS:ffff93b37f680000(0000) knlGS:0000000000000000 CS: 0010 DS: 0000 ES: 0000 CR0: 0000000080050033 CR2: 00005649b66b0968 CR3: 00000003e0fec000 CR4: 0000000000350ee0 Call Trace: amdgpu_device_rreg+0x17/0x20 [amdgpu] amdgpu_cgs_read_register+0x14/0x20 [amdgpu] dm_read_reg_func+0x3a/0xb0 [amdgpu] get_pixel_clk_frequency_100hz+0x30/0x50 [amdgpu] dc_commit_state+0x8f1/0xae0 [amdgpu] ? drm_calc_timestamping_constants+0x101/0x160 [drm] amdgpu_dm_atomic_commit_tail+0x39d/0x21a0 [amdgpu] ? dcn21_validate_bandwidth+0xe5/0x290 [amdgpu] ? kfree+0xc3/0x390 ? dcn21_validate_bandwidth+0xe5/0x290 [amdgpu] ... RSP: 002b:00007fff26009bd8 EFLAGS: 00000246 ORIG_RAX: 0000000000000139 RAX: ffffffffffffffda RBX: 000055a8025bea50 RCX: 00007f140085c89d RDX: 0000000000000000 RSI: 000055a8025b8290 RDI: 000000000000000c RBP: 0000000000040000 R08: 0000000000000000 R09: 0000000000000000 R10: 000000000000000c R11: 0000000000000246 R12: 000055a8025b8290 R13: 0000000000000000 R14: 000055a8025bead0 R15: 000055a8025bea50 This issue was fixed by introducing a second variable for the internal loop. Fixes: 8353d30e ("drm/amd/display: disable stream if pixel clock changed with link active") Reviewed-by:Roman Li <Roman.Li@amd.com> Reviewed-by:
Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Signed-off-by:
Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by:
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Bhawanpreet Lakha authored
These function pointers are missing from dcn30_init .calc_vupdate_position : Used to help avoid cursor stuttering .set_pipe : Needed for setting ABM So add them Signed-off-by:
Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Reviewed-by:
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- Oct 10, 2020
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Ye Bin authored
Fix follow warning: [drivers/gpu/drm/amd/amdgpu/amdgpu_xgmi.c:249]: (warning) %d in format string (no. 1) requires 'int' but the argument type is 'unsigned int'. Reported-by:
Hulk Robot <hulkci@huawei.com> Signed-off-by:
Ye Bin <yebin10@huawei.com> Signed-off-by:
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Ye Bin authored
Fix follow warning: Checking drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c... [drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c:770]: (error) Invalid number of character '{' when these macros are defined: ''. Checking drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c: CONFIG_ACPI... [drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c:770]: (error) Invalid number of character '{' when these macros are defined: 'CONFIG_ACPI'. ...... Checking drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c: CONFIG_X86... [drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c:770]: (error) Invalid number of character '{' when these macros are defined: 'CONFIG_X86'. Checking drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c: _X86_... [drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c:770]: (error) Invalid number of character '{' when these macros are defined: '_X86_'. Checking drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c: __linux__... [drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c:770]: (error) Invalid number of character '{' when these macros are defined: '__linux__'. Fixes: 97d798b2 ("drm/amdgpu: simplify ATIF backlight handling") Reported-by: -
Alex Deucher authored
These were leftover from the initial implementation, but never used. Drop them. Reviewed-by:
Evan Quan <evan.quan@amd.com> Noticed-by:
Ryan Taylor <ryan.taylor@amd.com> Signed-off-by:
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