- Feb 16, 2018
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Jernej Skrabec authored
Some TCONs on newer SoCs doesn't support channel 0, since they are meant to be used only with TV or HDMI encoder. Prepare support for them with adding has_channel_0 quirk. Acked-by:
Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by:
Jernej Skrabec <jernej.skrabec@siol.net> Signed-off-by:
Maxime Ripard <maxime.ripard@bootlin.com> Link: https://patchwork.freedesktop.org/patch/msgid/20180214200906.31509-8-jernej.skrabec@siol.net
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Jernej Skrabec authored
This commit adds all necessary compatibles and descriptions needed to implement A83T HDMI pipeline. Mixer is already properly described, so only compatible is added. However, A83T TV TCON, which is connected to HDMI, doesn't have channel 0, contrary to all TCONs currently described. Because of that, TCON documentation is extended. A83T features Synopsys DW HDMI controller with a custom PHY which looks like Synopsys Gen2 PHY with few additions. Since there is no documentation, needed properties were found out through experimentation and reading BSP code. At the end, example is added for newer SoCs, which feature DE2 and DW HDMI. Signed-off-by:
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Jernej Skrabec authored
dw_hdmi shouldn't set drvdata since some drivers might need to store it's own data there. Rework dw_hdmi in a way to return struct dw_hdmi instead to store it in drvdata. This way drivers are responsible to store and pass structure when needed. Idea was taken from the following commit: 8242ecbd ("drm/bridge/synopsys: stop clobbering drvdata") Cc: p.zabel@pengutronix.de Cc: Laurent.pinchart@ideasonboard.com Cc: hjc@rock-chips.com Acked-by:
Heiko Stuebner <heiko@sntech.de> Acked-by:
Neil Armstrong <narmstrong@baylibre.com> Reviewed-by:
Archit Taneja <architt@codeaurora.org> Tested-by:
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Jernej Skrabec authored
Parts of PHY code could be useful also for custom PHYs. For example, Allwinner A83T has custom PHY which is probably Synopsys gen2 PHY with few additional memory mapped registers, so most of the Synopsys PHY related code could be reused. Functions exported here are actually not specific to Synopsys PHYs but to DWC HDMI controller PHY interface. This means that even if the PHY is completely custom, i.e. not designed by Synopsys, exported functions can be useful. Reviewed-by:
Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by:
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Jernej Skrabec authored
Allwinner SoCs have dw hdmi controller v1.32a which exhibits same magenta line issue as i.MX6Q and i.MX6DL. Enable workaround for it. Tests show that one iteration is enough. Acked-by:
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- Feb 15, 2018
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Anusha Srivatsa authored
Forward Error Correction is supported on DP 1.4. This patch adds corresponding DPCD register definitions. v2: Add dri-devel mailing list to the CC list(Jani) v3: Change names, add missing masks (Manasi) v4: Add missing shifts to mask (Manasi) v5: Arrange the definitions in ascending order of the address (Jani) v6: remove unnecessary definitions. Add missing masks, add "/* 1.4 */" to offset definitions. (Jani) Cc: dri-devel@lists.freedesktop.org Cc: Ville Syrjala <ville.syrjala@linux.intel.com> Cc: Jani Nikula <jani.nikula@linux.intel.com> Cc: Manasi Navare <manasi.d.navare@intel.com> Signed-off-by:
Anusha Srivatsa <anusha.srivatsa@intel.com> Signed-off-by:
Jani Nikula <jani.nikula@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/1518636498-20921-1-git-send-email-anusha.srivatsa@intel.com
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- Feb 14, 2018
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Chris Zhong authored
This patch adds a binding that describes the cdn DP controller for rk3399. Signed-off-by:
Chris Zhong <zyw@rock-chips.com> Acked-by:
Rob Herring <robh@kernel.org> Signed-off-by:
Enric Balletbo i Serra <enric.balletbo@collabora.com> [document the missing 3 reset-names] Signed-off-by:
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Chunming Zhou authored
swiotlb expands our card accessing range, but its path always is slower than ttm pool allocation. So add condition to use it. v2: move a bit later Signed-off-by:
Chunming Zhou <david1.zhou@amd.com> Reviewed-by:
Monk Liu <monk.liu@amd.com> Reviewed-by:
Christian König <christian.koenig@amd.com> Signed-off-by:
Alex Deucher <alexander.deucher@amd.com> Link: https://patchwork.freedesktop.org/patch/msgid/20180209024410.1469-3-david1.zhou@amd.com
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Chunming Zhou authored
get the max io mapping address of system memory to see if it is over our card accessing range. v2: move checking later Signed-off-by:
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Chunming Zhou authored
it will be used to check if the driver needs swiotlb v2: Don't use inline, instead, move function to drm_memory.c (Michel Daenzer <michel@daenzer.net>) Signed-off-by:
Michel Dänzer <michel.daenzer@amd.com> Signed-off-by:
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- Feb 11, 2018
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Boris Brezillon authored
The V3D engine has various hardware counters which might be interesting to userspace performance analysis tools. Expose new ioctls to create/destroy a performance monitor object and query the counter values of this perfmance monitor. Note that a perfomance monitor is given an ID that is only valid on the file descriptor it has been allocated from. A performance monitor can be attached to a CL submission and the driver will enable HW counters for this request and update the performance monitor values at the end of the job. Signed-off-by:
Boris Brezillon <boris.brezillon@free-electrons.com> Reviewed-by:
Eric Anholt <eric@anholt.net> Signed-off-by:
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Eric Anholt authored
When we debug print what ioctl we're calling into, we include the pid. If you have multiple processes rendering simulataneously, the error return also needs the pid so you can see which of the ioctl calls was the one to fail. Signed-off-by:
Daniel Vetter <daniel.vetter@ffwll.ch>
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- Feb 08, 2018
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Philippe CORNU authored
Hw older versions support non-alpha color formats derived from native alpha color formats only on the primary layer. For instance, RG16 native format without alpha works fine on 2nd layer but XR24 (derived color format from AR24) does not work on 2nd layer. Signed-off-by:
Philippe Cornu <philippe.cornu@st.com> Reviewed-by:
Yannick Fertré <yannick.fertre@st.com> Signed-off-by:
Benjamin Gaignard <benjamin.gaignard@linaro.org> Link: https://patchwork.freedesktop.org/patch/msgid/20180201104243.20726-3-philippe.cornu@st.com
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Philippe CORNU authored
ltdc supports natively some color formats with alpha (like ARGB8888, ARGB1555, ARGB4444...). Related non-alpha formats are supported too (ARGB8888->XRGB8888, ARGB4444->XRGB4444...) by adjusting ltdc blending factors. Note: Wayland/Weston requests by default the non-alpha XRGB8888 color format. Signed-off-by:
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Philippe Cornu authored
Add support for the Synopsys DesignWare MIPI DSI version 1.31 Two registers need to be updated/added for supporting 1.31: * PHY_TMR_CFG 0x9c (updated) 1.30 [31:24] phy_hs2lp_time [23:16] phy_lp2hs_time [14: 0] max_rd_time 1.31 [25:16] phy_hs2lp_time [ 9: 0] phy_lp2hs_time * PHY_TMR_RD_CFG 0xf4 (new) 1.31 [14: 0] max_rd_time Signed-off-by:Andrzej Hajda <a.hajda@samsung.com> Signed-off-by:
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Philippe Cornu authored
This patch adds the DCS/GENERIC DSI read feature. Signed-off-by:
Brian Norris <briannorris@chromium.org> Signed-off-by:
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- Feb 07, 2018
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Linus Walleij authored
The Versatile PL110 implementations use multiple endpoints: from the PL111 port, the lines are routed through a PLD, and from there forked so the same lines go to a VGA DAC and an external TFT panel connector. This is discrete wireing so there is no way to turn of one output, i.e. this is really two endpoints, not two ports. We model this with multiple endpoints, so we need to loop over the available endpoints, check for panel or bridge on each and accumulate the result before continuing. The code already will give the panel preference over the bridge, if present, so the output will be sent to the panel if both a panel and a bridge is present on two endpoints of the same port. If they all return -EPROBE_DEFER we return -EPROBE_DEFER as well. If just one endpoint is present on the port, the behaviour is the same as before. Reviewed-by:
Linus Walleij <linus.walleij@linaro.org> Link: https://patchwork.freedesktop.org/patch/msgid/20180206093540.8147-5-linus.walleij@linaro.org
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Linus Walleij authored
The early Integrator CLCD synthesized in the Integrator CP and IM-PD1 FPGAs are broken: their vertical and next base interrupts are not functional. Support these variants by simply disabling the use of the vblank interrupt on these variants. Reviewed-by:
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Linus Walleij authored
The early Integrator CLCD synthesized in the Integrator CP and IM-PD1 FPGAs are broken: their clock dividers do not work properly. Support disabling the clock divider and drive the clock directly from the parent under these circumstances. Reviewed-by:
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Linus Walleij authored
The ARM Versatile series can do RGB/BGR565 with an external "PLD" (Programmable Logical Device). However the CLCD does not have control bits for this, so it needs to be set into the ordinary 16BPP mode, then the RGB/BGR565 handling of the pixel data is handled by configuring the PLD through the external register. Reviewed-by:
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Linus Walleij authored
With a bit of refactoring we can contain the variant data for the strange PL110 versions that is feature-incomplete PL110 for the ARM Integrator/CP and somewhere inbetween PL110 and PL111 for the ARM Versatile AB and Versatile PB. We also accomodate for the custom duct-taped RGB565/BGR565 support in the Versatile variant. Reviewed-by:
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Linus Walleij authored
The ARM reference designs "Versatile AB" and "Versatile PB" contain panel connectors with autodetection of the connected panel type. This adds a small driver utilizing the MFD syscon look-up to read the autodetection register and set up the corresponding panel appropriately. In the source file there is a bit of elaboration of the panel types and interfaces on these boards. This was tested with the PL111 DRM driver on the ARM Versatile AB with the IB2 daughterboard. Reviewed-by:
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Linus Walleij authored
This adds a pretty simple set of device tree bindings for ARM Versatile panels appearing as child nodes of a system controller. Cc: devicetree@vger.kernel.org Reviewed-by:
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Linus Walleij authored
Why is the argument to ->mode_valid() called "crtc"? I guess a copy/paste error. Fix it. Reviewed-by:
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- Feb 05, 2018
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Maarten Lankhorst authored
This will make it possible for userspace to know whether reading will block, without blocking on the fd. This makes it possible to drain all queued CRC's in blocking mode, without having to reopen the fd. Signed-off-by:
Maarten Lankhorst <maarten.lankhorst@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20180202142743.68527-1-maarten.lankhorst@linux.intel.com Reviewed-by:
Ville Syrjälä <ville.syrjala@linux.intel.com> [mlankhorst: Use POLLIN|POLLRDNORM, based on Ville's suggestion]
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- Feb 02, 2018
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Ville Syrjälä authored
Use drm_mode_get_hv_timing() to fill out the plane clip rectangle. Note that this replaces crtc_state->adjusted_mode usage with crtc_state->mode. The latter is the correct choice since that's the mode the user provided and it matches the plane crtc coordinates the user also provided. Once everyone agrees on this we can move the clip handling into drm_atomic_helper_check_plane_state(). Cc: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by:
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Ville Syrjälä authored
Use drm_mode_get_hv_timing() to fill out the plane clip rectangle. No functional changes as the code already uses crtc_state->mode to populate the clip, which is also what drm_mode_get_hv_timing() uses. Once everyone agrees on this we can move the clip handling into drm_atomic_helper_check_plane_state(). Cc: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by:
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Daniel Vetter authored
I'm stepping down, also handing all the drm-misc stuff to the new team. Plan is that Sean handles 4.17, and Maarten then has fun with 4.18 as his first release. Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> Cc: David Airlie <airlied@linux.ie> Cc: Gustavo Padovan <gustavo@padovan.org> Cc: Sean Paul <seanpaul@chromium.org> Acked-by:
Sean Paul <seanpaul@chromium.org> Acked-by:
Gustavo Padovan <gustavo.padovan@collabora.com> Acked-by:
Daniel Vetter <daniel.vetter@intel.com> Signed-off-by:
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Tomeu Vizoso authored
If the wait timeouts, the caps are probably invalid and we shouldn't be passing them to userspace. Signed-off-by:
Tomeu Vizoso <tomeu.vizoso@collabora.com> Link: http://patchwork.freedesktop.org/patch/msgid/20171127142126.25765-1-tomeu.vizoso@collabora.com Signed-off-by:
Gerd Hoffmann <kraxel@redhat.com>
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- Jan 31, 2018
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Gustavo A. R. Silva authored
Assign true or false to boolean variables instead of an integer value. This issue was detected with the help of Coccinelle. Signed-off-by:
Gustavo A. R. Silva <gustavo@embeddedor.com> Signed-off-by:
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Dan Carpenter authored
The parentheses are in the wrong place here so we pass the bits per pixel as zero. Fixes: abbee623 ("drm/mgag200: Added resolution and bandwidth limits for various G200e products.") Signed-off-by:
Dan Carpenter <dan.carpenter@oracle.com> Signed-off-by:
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Daniel Vetter authored
drm_encoder_slave is the old way to write bridge drivers, for i2c bridges only. It's deprecated, and definitely should not be used in new drivers. This has absolutely nothing to do with the new bridge driver infrastructure implemented by drm_bridge. What's even strange is that arcpgu doesn't even use any of this, it really only wants a plain normal drm_encoder. Nuke all the surplus real estate. v2: Actually git add after compile testing ... v3: Clarify commit message and stop including drm_encoder_slave.h. Cc: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Cc: Alexey Brodkin <abrodkin@synopsys.com> Reviewed-by:
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Shawn Guo authored
The structure should really be sw_sync_create_fence_data rather than sw_sync_ioctl_create_fence which is the function name. Signed-off-by:
Shawn Guo <shawn.guo@linaro.org> Signed-off-by:
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- Jan 30, 2018
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Maarten Lankhorst authored
Userspace can set a FB_ID on a plane without setting CRTC_ID, which will fail with -EINVAL, but the kernel shouldn't warn about that. Same for !FB_ID and CRTC_ID being set. Signed-off-by:
Harry Wentland <harry.wentland@amd.com>
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Philippe Cornu authored
The dw_mipi_dsi_host_transfer() must return the number of bytes transmitted/received on success instead of 0. Note: As the read feature is not implemented, only the transmitted number of bytes is returned for the moment. Reviewed-by:
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Philippe Cornu authored
The dcs/generic dsi read feature is not yet implemented so it is important to warn the host_transfer() caller in case of read operation requests. Reviewed-by:
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Philippe Cornu authored
To optimize data transfers, align pitch on 128 bytes & height on 4 bytes. This optimization is not applicable on hw without MMU. Signed-off-by:
Vincent Abriou <vincent.abriou@st.com> Signed-off-by:
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Philippe CORNU authored
Add support for the stm dsi phy/wrapper version 1.31. Only lane capabilities need to be modified. Signed-off-by:
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Philippe CORNU authored
In the dsi panel example, clock names in the "clock-names" field have been swapped: * "pclk" (peripheral clock) is <&rcc 1 CLK_F469_DSI> on stm32f4 * "ref" (dsi phy pll ref clock) is <&clk_hse> on stm32f4 Signed-off-by:
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Leo (Sunpeng) Li authored
During a non-blocking commit, it is possible to return before the commit_tail work is queued (-ERESTARTSYS, for example). Since a reference on the crtc commit object is obtained for the pending vblank event when preparing the commit, the above situation will leave us with an extra reference. Therefore, if the commit_tail worker has not consumed the event at the end of a commit, release it's reference. Changes since v1: - Also check for state->event->base.completion being set, to handle the case where stall_checks() fails in setup_crtc_commit(). Changes since v2: - Add a flag to drm_crtc_commit, to prevent dereferencing a freed event. i915 may unreference the state in a worker. Fixes: 24835e44 ("drm: reference count event->completion") Cc: <stable@vger.kernel.org> # v4.11+ Signed-off-by:
Leo (Sunpeng) Li <sunpeng.li@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> #v1 Signed-off-by:
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