- Dec 03, 2023
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Kuogee Hsieh authored
EV_HPD_INIT_SETUP flag is used to trigger the initialization of external DP host controller. Since external DP host controller initialization had been incorporated into pm_runtime_resume(), this flag became obsolete. msm_dp_irq_postinstall() which triggers EV_HPD_INIT_SETUP event is obsoleted accordingly. Changes in v4: -- reworded commit text -- drop EV_HPD_INIT_SETUP -- drop msm_dp_irq_postinstall() Changes in v3: -- drop EV_HPD_INIT_SETUP and msm_dp_irq_postinstall() Signed-off-by:
Kuogee Hsieh <quic_khsieh@quicinc.com> Reviewed-by:
Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/570075/ Link: https://lore.kernel.org/r/1701472789-25951-7-git-send-email-quic_khsieh@quicinc.com Signed-off-by:
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Kuogee Hsieh authored
Currently DP driver is executed independent of PM runtime framework. This leads msm eDP panel can not being detected by edp_panel driver during generic_edp_panel_probe() due to AUX DPCD read failed at edp panel driver. Incorporate PM runtime framework into DP driver so that host controller's power and clocks are enable/disable through PM runtime mechanism. Once PM runtime framework is incorporated into DP driver, waking up device from power up path is not necessary. Hence remove it. After incorporating pm_runtime framework into eDP/DP driver, dp_pm_suspend() to handle power off both DP phy and controller during suspend and dp_pm_resume() to handle power on both DP phy and controller during resume are not necessary. Therefore both dp_pm_suspend() and dp_pm_resume() are dropped and replace with dp_pm_runtime_suspend() and dp_pm_runtime_resume() respectively. Changes in v9: -- silent compiler warning message at dp_power_init() and dp_power_deinit() with W1 flag Changes in v7: -- add comments to dp_pm_runtime_resume() -- add comments to dp_bridge_hpd_enable() -- delete dp->hpd_state = ST_DISCONNECTED from dp_bridge_hpd_notify() Changes in v6: -- delete dp_power_client_deinit(dp->power); -- remove if (!dp->dp_display.is_edp) condition checkout at plug_handle() -- remove if (!dp->dp_display.is_edp) condition checkout at unplug_handle() -- add IRQF_NO_AUTOEN to devm_request_irq() -- add enable_irq() and disable_irq() to pm_runtime_resume()/suspend() -- del dp->hpd_state = ST_DISCONNECTED from dp_bridge_hpd_disable() Changes in v5: -- remove pm_runtime_put_autosuspend feature, use pm_runtime_put_sync() -- squash add pm_runtime_force_suspend()/resume() patch into this patch Changes in v4: -- reworded commit text to explain why pm_framework is required for edp panel -- reworded commit text to explain autosuspend is choiced -- delete EV_POWER_PM_GET and PM_EV_POWER_PUT from changes #3 -- delete dp_display_pm_get() and dp_display_pm_Put() from changes #3 -- return value from pm_runtime_resume_and_get() directly -- check return value of devm_pm_runtime_enable() -- delete pm_runtime_xxx from dp_display_remove() -- drop dp_display_host_init() from EV_HPD_INIT_SETUP -- drop both dp_pm_prepare() and dp_pm_compete() from this change -- delete ST_SUSPENDED state -- rewording commit text to add more details regrading the purpose of this change Changes in v3: -- incorporate removing pm_runtime_xx() from dp_pwer.c to this patch -- use pm_runtime_resume_and_get() instead of pm_runtime_get() -- error checking pm_runtime_resume_and_get() return value -- add EV_POWER_PM_GET and PM_EV_POWER_PUT to handle HPD_GPIO case -- replace dp_pm_suspend() with pm_runtime_force_suspend() -- replace dp_pm_resume() with pm_runtime_force_resume() Signed-off-by:
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Kuogee Hsieh authored
Original both parser->parse() and dp_power_client_init() are done at dp_display_bind() since eDP population is done at binding time. In the preparation of having eDP population done at probe() time, move both function from dp_display_bind() to dp_display_probe(). Changes in v6: -- move dp_power_client_deinit() to remove() Changes in v5: -- explain why parser->parse() and dp_power_client_init() are moved to probe time -- tear down sub modules if failed Changes in v4: -- split this patch out of "incorporate pm_runtime framework into DP driver" patch Signed-off-by:
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Kuogee Hsieh authored
Currently DP driver use drm_helper_hpd_irq_event(), bypassing drm bridge framework, to report HPD status changes to user space frame work. Replace it with drm_bridge_hpd_notify() since DP driver is part of drm bridge. Signed-off-by:
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Kuogee Hsieh authored
The is_connected flag is set to true after DP mainlink successfully finishes link training to enter into ST_MAINLINK_READY state rather than being set after the DP dongle is connected. Rename the is_connected flag with link_ready flag to match the state of DP driver's state machine. Changes in v5: -- reworded commit text according to review comments from change #4 Changes in v4: -- reworded commit text Signed-off-by:
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Kuogee Hsieh authored
Currently the dp_display_request_irq() is executed at msm_dp_modeset_init() which ties irq registering to the DPU device's life cycle, while depending on resources that are released as the DP device is torn down. Move register DP driver irq handler to dp_display_probe() to have dp_display_irq_handler() IRQ tied with DP device. In addition, use platform_get_irq() to retrieve irq number from platform device directly. Changes in v5: -- reworded commit text as review comments at change #4 -- tear down component if failed at dp_display_request_irq() Changes in v4: -- delete dp->irq check at dp_display_request_irq() Changes in v3: -- move calling dp_display_irq_handler() to probe Signed-off-by:
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Konrad Dybcio authored
Apart from the already handled data bus (MAS_MDP_Pn<->DDR), there are other connection paths: - a path that connects rotator block to the DDR. - a path that needs to be handled to ensure MDSS register access functions properly, namely the "reg bus", a.k.a the CPU-MDSS CFG interconnect. Describe these paths to allow using them in device trees and in the driver. [Konrad: rework for one vs two MDP paths, update examples] Reviewed-by:
Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by:
Konrad Dybcio <konrad.dybcio@linaro.org> Patchwork: https://patchwork.freedesktop.org/patch/569480/ Link: https://lore.kernel.org/r/20231125-topic-rb1_feat-v3-2-4cbb567743bb@linaro.org Signed-off-by:
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Konrad Dybcio authored
The "qcom,dsi-ctrl-6g-qcm2290" has been deprecated in commit 0c0f65c6 ("dt-bindings: msm: dsi-controller-main: Add compatible strings for every current SoC"), but the example hasn't been updated to reflect that. Fix that. Fixes: 0c0f65c6 ("dt-bindings: msm: dsi-controller-main: Add compatible strings for every current SoC") Reviewed-by:
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Dmitry Baryshkov authored
Flush queued events when disabling the crtc. This avoids timeouts when we come back and wait for dependencies (like the previous frame's flip_done). Fixes: c8afe684 ("drm/msm: basic KMS driver for snapdragon") Signed-off-by:
Abhinav Kumar <quic_abhinavk@quicinc.com> Patchwork: https://patchwork.freedesktop.org/patch/569127/ Link: https://lore.kernel.org/r/20231127215401.4064128-1-dmitry.baryshkov@linaro.org
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Krzysztof Kozlowski authored
Qualcomm SM8150 MDSS comes with a bit different 7nm DSI PHY with its own compatible. DTS already use it: sa8155p-adp.dtb: display-subsystem@ae00000: phy@ae94400:compatible:0: 'qcom,dsi-phy-7nm' was expected Signed-off-by:
Conor Dooley <conor.dooley@microchip.com> Patchwork: https://patchwork.freedesktop.org/patch/567178/ Link: https://lore.kernel.org/r/20231111142017.51922-1-krzysztof.kozlowski@linaro.org Signed-off-by:
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Krzysztof Kozlowski authored
Document the DisplayPort controller node in MDSS binding, already used in DTS: sm8250-xiaomi-elish-boe.dtb: display-subsystem@ae00000: Unevaluated properties are not allowed ('displayport-controller@ae90000' was unexpected) Signed-off-by: -
Dmitry Baryshkov authored
Change struct mdp4_lcdc_encoder allocation to use drmm_encoder_alloc(). This removes the need to perform any actions on this encoder destruction. Signed-off-by:
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Dmitry Baryshkov authored
Change struct mdp4_dtv_encoder allocation to use drmm_encoder_alloc(). This removes the need to perform any actions on this encoder destruction. Signed-off-by:
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Dmitry Baryshkov authored
Change struct mdp4_dsi_encoder allocation to use drmm_encoder_alloc(). This removes the need to perform any actions on this encoder destruction. Signed-off-by:
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Dmitry Baryshkov authored
Change struct mdp4_crtc allocation to use drmm_crtc_alloc(). This removes the need to perform any actions on CRTC destruction. Signed-off-by:
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Dmitry Baryshkov authored
Switch mdp4_lcdc_encoder to using regulator_bulk_* API instead of enumerating regulators by hand. Signed-off-by:
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Dmitry Baryshkov authored
Change struct mdp5_encoder allocation to use drmm_encoder_alloc(). This removes the need to perform any actions on encoder destruction. Signed-off-by:
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Dmitry Baryshkov authored
Change struct mdp5_crtc allocation to use drmm_crtc_alloc(). This removes the need to perform any actions on CRTC destruction. Signed-off-by:
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Dmitry Baryshkov authored
Use devm_kzalloc to create INTF data structure. This allows us to remove corresponding kfree() call. Signed-off-by:
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Dmitry Baryshkov authored
Use devm_kzalloc to create SMP data structure. This allows us to remove corresponding kfree and drop mdp5_smp_destroy() function. Signed-off-by:
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Dmitry Baryshkov authored
Use devm_kzalloc to create pipe data structure. This allows us to remove corresponding kfree and drop mdp5_pipe_destroy() function. Signed-off-by:
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Dmitry Baryshkov authored
Use devm_kzalloc to create mixer data structure. This allows us to remove corresponding kfree and drop mdp5_mixer_destroy() function. Signed-off-by:
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Dmitry Baryshkov authored
Use devm_kzalloc to create CTL manager data structure. This allows us to remove corresponding kfree and drop mdp5_ctlm_destroy() function. Signed-off-by:
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Dmitry Baryshkov authored
Use devm_kzalloc to create configuration data structure. This allows us to remove corresponding kfree and drop mdp5_cfg_destroy() function. Signed-off-by:
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Dmitry Baryshkov authored
Currently there are two subdirs for DP debugfs files, e.g. DP-1, created by the drm core for the connector, and the msm_dp-DP-1, created by the DP driver itself. Merge those two, so that there are no extraneous connector-related subdirs. Reviewed-by:
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- Dec 02, 2023
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Arnd Bergmann authored
When QMP is in a loadable module, the A6xx GPU driver fails to link as built-in: x86_64-linux-ld: drivers/gpu/drm/msm/adreno/a6xx_gmu.o: in function `a6xx_gmu_resume': a6xx_gmu.c:(.text+0xd62): undefined reference to `qmp_send' Add the usual dependency that still allows compiling without QMP but otherwise avoids the broken combination of options. Fixes: 88a0997f ("drm/msm/a6xx: Send ACD state to QMP at GMU resume") Signed-off-by:
Arnd Bergmann <arnd@arndb.de> Reviewed-by:
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Abhinav Kumar authored
To support high resolutions on sm8350, enable smartdma in its catalog. Signed-off-by:
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Dmitry Baryshkov authored
Enable the SmartDMA / multirect support on the SM8450 platform to support higher resoltion modes. Reviewed-by:
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Abhinav Kumar authored
It's certainly possible that for large resolutions a single DPU SSPP cannot process the image without exceeding the MDP clock limits but it can still process it in multirect mode because the source rectangles will get divided and can fall within the MDP clock limits. If the SSPP cannot process the image even in multirect mode, then it will be rejected in dpu_plane_atomic_check_pipe(). Hence try using multirect for resolutions which cannot be processed by a single SSPP without exceeding the MDP clock limits. changes in v2: - use crtc_state's adjusted_mode instead of mode - fix the UBWC condition to check maxlinewidth Signed-off-by:
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- Nov 26, 2023
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Danylo Piliaiev authored
KGSL doesn't support a690 so all reg values were the same as on a660. Now we know the values and they are different from the windows driver. This fixes hangs on D3D12 games and some CTS tests. Signed-off-by:
Danylo Piliaiev <dpiliaiev@igalia.com> Signed-off-by:
Rob Clark <robdclark@chromium.org> Patchwork: https://patchwork.freedesktop.org/patch/568931/
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Danylo Piliaiev authored
Downstream always set BIT(7) Signed-off-by:
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- Nov 21, 2023
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Rob Clark authored
For allocations with userspace controlled size, we should not warn on allocation failure. Fixes KASAN splat: WARNING: CPU: 6 PID: 29557 at mm/page_alloc.c:5398 __alloc_pages+0x160c/0x2204 Modules linked in: bridge stp llc hci_vhci tun veth xt_cgroup uinput xt_MASQUERADE rfcomm ip6table_nat fuse 8021q r8153_ecm cdc_ether usbnet r8152 mii venus_enc venus_dec uvcvideo algif_hash algif_skcipher af_alg qcom_spmi_adc_tm5 qcom_spmi_adc5 qcom_vadc_common qcom_spmi_temp_alarm cros_ec_typec typec hci_uart btqca qcom_stats snd_soc_sc7180 venus_core ath10k_snoc ath10k_core ath coresight_tmc coresight_replicator coresight_etm4x coresight_funnel snd_soc_lpass_sc7180 mac80211 coresight bluetooth ecdh_generic ecc cfg80211 cros_ec_sensorhub lzo_rle lzo_compress zram joydev CPU: 6 PID: 29557 Comm: syz-executor Not tainted 5.15.110-lockdep-19320-g89d010b0a9df #1 45bdd400697a78353f2927c116615abba810e5dd Hardware name: Google Kingoftown (DT) pstate: 20400009 (nzCv daif +PAN -UAO -TCO -DIT -SSBS BTYPE=--) pc : __alloc_pages+0x160c/0x2204 lr : __alloc_pages+0x58/0x2204 sp : ffffffc0214176c0 x29: ffffffc0214178a0 x28: ffffff801f7b4000 x27: 0000000000000000 x26: ffffff808a4fa000 x25: 1ffffff011290781 x24: ffffff808a59c000 x23: 0000000000000010 x22: ffffffc0080e6980 x21: 0000000000000010 x20: 0000000000000000 x19: 00000000080001f8 x18: 0000000000000000 x17: 0000000000000000 x16: 0000000000000000 x15: 0000000020000500 x14: 0000000000000000 x13: 0000000000000000 x12: 0000000000000001 x11: 0000000000000000 x10: 1ffffff804282f06 x9 : 0000000000000000 x8 : ffffffc021417848 x7 : 0000000000000000 x6 : ffffffc0082ac788 x5 : 0000000000000000 x4 : 0000000000000000 x3 : 0000000000000010 x2 : 0000000000000008 x1 : 0000000000000000 x0 : ffffffc021417830 Call trace: __alloc_pages+0x160c/0x2204 kmalloc_order+0x50/0xf4 kmalloc_order_trace+0x38/0x18c __kmalloc+0x300/0x45c msm_ioctl_gem_submit+0x284/0x5988 drm_ioctl_kernel+0x270/0x418 drm_ioctl+0x5e0/0xbf8 __arm64_sys_ioctl+0x154/0x1d0 invoke_syscall+0x98/0x278 el0_svc_common+0x214/0x274 do_el0_svc+0x9c/0x19c el0_svc+0x5c/0xc0 el0t_64_sync_handler+0x78/0x108 el0t_64_sync+0x1a4/0x1a8 Signed-off-by:
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Rob Clark authored
Error messages resulting from incorrect usage of the kernel uabi should not spam dmesg by default. But it is useful to enable them to debug userspace. So demote to DRM_UT_DRIVER. Signed-off-by:
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Rob Clark authored
The EXT_external_objects extension is a bit awkward as it doesn't pass explicit modifiers, leaving the importer to guess with incomplete information. In the case of vk (turnip) exporting and gl (freedreno) importing, the "OPTIMAL_TILING_EXT" layout depends on VkImageCreateInfo flags (among other things), which the importer does not know. Which unfortunately leaves us with the need for a metadata back-channel. The contents of the metadata are defined by userspace. The EXT_external_objects extension is only required to work between compatible versions of gl and vk drivers, as defined by device and driver UUIDs. v2: add missing metadata kfree v3: Rework to move copy_from/to_user out from under gem obj lock to avoid angering lockdep about deadlocks against fs-reclaim Signed-off-by: -
Rob Clark authored
Correct the minor version exposed and error return value for MSM_INFO_GET_NAME. Signed-off-by:
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Dmitry Baryshkov authored
If there is no GPU present, skip creation of the GPU-related debugfs files, making the MSM's debugfs more usable. Signed-off-by:
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Rob Clark authored
If we somehow raced with submit retiring, either while waiting for worker to have a chance to run or acquiring the gpu lock, then the recover worker should just bail. Signed-off-by:
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Rob Clark authored
Until various PM devfreq/QoS and interconnect patches land, we could potentially trigger reclaim from gpu scheduler thread, and under enough memory pressure that could trigger a sort of deadlock. Eventually the wait will timeout and we'll move on to consider other GEM objects. But given that there is still a potential for deadlock/stalling, we should reduce the timeout to contain the damage. Signed-off-by:
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Rob Clark authored
The dpu devcore's are already associated with the dpu device. So we should associate the gpu devcore's with the gpu device, for easier classification. Signed-off-by:
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- Nov 13, 2023
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Linus Torvalds authored
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