1. Feb 15, 2013
    • Michael Ellerman's avatar
      powerpc: Apply early paca fixups to boot_paca and the boot cpu's paca · 25e13814
      Michael Ellerman authored
      In commit 466921c5
      
       we added a hack to set the paca data_offset to zero so
      that per-cpu accesses would work on the boot cpu prior to per-cpu areas
      being setup. This fixed a problem with lockdep touching per-cpu areas
      very early in boot.
      
      However if we combine CONFIG_LOCK_STAT=y with any of the PPC_EARLY_DEBUG
      options, we can hit the same problem in udbg_early_init(). To avoid that
      we need to set the data_offset of the boot_paca also. So factor out the
      fixup logic and call it for both the boot_paca, and "the paca of the
      boot cpu".
      
      Signed-off-by: default avatarMichael Ellerman <michael@ellerman.id.au>
      Tested-by: default avatarGeoff Levand <geoff@infradead.org>
      Signed-off-by: default avatarBenjamin Herrenschmidt <benh@kernel.crashing.org>
      25e13814
    • Geoff Levand's avatar
      powerpc: Move boot_paca into early_setup · 6a7e4064
      Geoff Levand authored
      
      
      The powerpc boot_paca symbol is now only used within the
      early_setup() routine, so move it from its global definition
      into early_setup().
      
      Signed-off-by: default avatarGeoff Levand <geoff@infradead.org>
      Signed-off-by: default avatarBenjamin Herrenschmidt <benh@kernel.crashing.org>
      6a7e4064
    • Geoff Levand's avatar
      69fde021
    • Geoff Levand's avatar
    • Geoff Levand's avatar
      powerpc/ps3: Add macro PS3_VERBOSE_RESULT · 4a564c4d
      Geoff Levand authored
      
      
      To allow more control of the verbosity of ps3_result() add a check
      for the preprocessor macro PS3_VERBOSE_RESULT that builds a verbose
      verion of the ps3_result() routine.
      
      Signed-off-by: default avatarGeoff Levand <geoff@infradead.org>
      Signed-off-by: default avatarBenjamin Herrenschmidt <benh@kernel.crashing.org>
      4a564c4d
    • Paul Mackerras's avatar
      powerpc/kvm/book3s_pr: Fix compilation on 32-bit machines · deb26c27
      Paul Mackerras authored
      Commit a413f474
      
       ("powerpc: Disable relocation on exceptions whenever
      PR KVM is active") added calls to pSeries_disable_reloc_on_exc() and
      pSeries_enable_reloc_on_exc() to book3s_pr.c, and added declarations
      of those functions to <asm/hvcall.h>, but didn't add an include of
      <asm/hvcall.h> to book3s_pr.c.  64-bit kernels seem to get hvcall.h
      included via some other path, but 32-bit kernels fail to compile with:
      
      arch/powerpc/kvm/book3s_pr.c: In function ‘kvmppc_core_init_vm’:
      arch/powerpc/kvm/book3s_pr.c:1300:4: error: implicit declaration of function ‘pSeries_disable_reloc_on_exc’ [-Werror=implicit-function-declaration]
      arch/powerpc/kvm/book3s_pr.c: In function ‘kvmppc_core_destroy_vm’:
      arch/powerpc/kvm/book3s_pr.c:1316:4: error: implicit declaration of function ‘pSeries_enable_reloc_on_exc’ [-Werror=implicit-function-declaration]
      cc1: all warnings being treated as errors
      make[2]: *** [arch/powerpc/kvm/book3s_pr.o] Error 1
      make[1]: *** [arch/powerpc/kvm] Error 2
      make: *** [sub-make] Error 2
      
      This fixes it by adding an include of hvcall.h.
      
      Signed-off-by: default avatarPaul Mackerras <paulus@samba.org>
      Signed-off-by: default avatarBenjamin Herrenschmidt <benh@kernel.crashing.org>
      deb26c27
    • Paul Mackerras's avatar
      powerpc/kvm/book3s_hv: Preserve guest CFAR register value · 0acb9111
      Paul Mackerras authored
      
      
      The CFAR (Come-From Address Register) is a useful debugging aid that
      exists on POWER7 processors.  Currently HV KVM doesn't save or restore
      the CFAR register for guest vcpus, making the CFAR of limited use in
      guests.
      
      This adds the necessary code to capture the CFAR value saved in the
      early exception entry code (it has to be saved before any branch is
      executed), save it in the vcpu.arch struct, and restore it on entry
      to the guest.
      
      Signed-off-by: default avatarPaul Mackerras <paulus@samba.org>
      Signed-off-by: default avatarBenjamin Herrenschmidt <benh@kernel.crashing.org>
      0acb9111
    • Paul Mackerras's avatar
      powerpc: Save CFAR before branching in interrupt entry paths · 1707dd16
      Paul Mackerras authored
      
      
      Some of the interrupt vectors on 64-bit POWER server processors are
      only 32 bytes long, which is not enough for the full first-level
      interrupt handler.  For these we currently just have a branch to an
      out-of-line handler.  However, this means that we corrupt the CFAR
      (come-from address register) on POWER7 and later processors.
      
      To fix this, we split the EXCEPTION_PROLOG_1 macro into two pieces:
      EXCEPTION_PROLOG_0 contains the part up to the point where the CFAR
      is saved in the PACA, and EXCEPTION_PROLOG_1 contains the rest.  We
      then put EXCEPTION_PROLOG_0 in the short interrupt vectors before
      we branch to the out-of-line handler, which contains the rest of the
      first-level interrupt handler.  To facilitate this, we define new
      _OOL (out of line) variants of STD_EXCEPTION_PSERIES, etc.
      
      In order to get EXCEPTION_PROLOG_0 to be short enough, i.e., no more
      than 6 instructions, it was necessary to move the stores that move
      the PPR and CFAR values into the PACA into __EXCEPTION_PROLOG_1 and
      to get rid of one of the two HMT_MEDIUM instructions.  Previously
      there was a HMT_MEDIUM_PPR_DISCARD before the prolog, which was
      nop'd out on processors with the PPR (POWER7 and later), and then
      another HMT_MEDIUM inside the HMT_MEDIUM_PPR_SAVE macro call inside
      __EXCEPTION_PROLOG_1, which was nop'd out on processors without PPR.
      Now the HMT_MEDIUM inside EXCEPTION_PROLOG_0 is there unconditionally
      and the HMT_MEDIUM_PPR_DISCARD is not strictly necessary, although
      this leaves it in for the interrupt vectors where there is room for
      it.
      
      Previously we had a handler for hypervisor maintenance interrupts at
      0xe50, which doesn't leave enough room for the vector for hypervisor
      emulation assist interrupts at 0xe40, since we need 8 instructions.
      The 0xe50 vector was only used on POWER6, as the HMI vector was moved
      to 0xe60 on POWER7.  Since we don't support running in hypervisor mode
      on POWER6, we just remove the handler at 0xe50.
      
      This also changes denorm_exception_hv to use EXCEPTION_PROLOG_0
      instead of open-coding it, and removes the HMT_MEDIUM_PPR_DISCARD
      from the relocation-on vectors (since any CPU that supports
      relocation-on interrupts also has the PPR).
      
      Signed-off-by: default avatarPaul Mackerras <paulus@samba.org>
      Signed-off-by: default avatarBenjamin Herrenschmidt <benh@kernel.crashing.org>
      1707dd16
    • Paul Mackerras's avatar
      powerpc: Remove Cell-specific relocation-on interrupt vector code · 6100209b
      Paul Mackerras authored
      
      
      The Cell processor doesn't support relocation-on interrupts, so we
      don't need relocation-on versions of the interrupt vectors that are
      purely Cell-specific.  This removes them.
      
      Signed-off-by: default avatarPaul Mackerras <paulus@samba.org>
      Signed-off-by: default avatarBenjamin Herrenschmidt <benh@kernel.crashing.org>
      6100209b
  2. Feb 08, 2013
    • Ian Munsie's avatar
      powerpc: Add support for context switching the TAR register · 2468dcf6
      Ian Munsie authored
      
      
      This patch adds support for enabling and context switching the Target
      Address Register in Power8. The TAR is a new special purpose register
      that can be used for computed branches with the bctar[l] (branch
      conditional to TAR) instruction in the same manner as the count and link
      registers.
      
      Signed-off-by: default avatarIan Munsie <imunsie@au1.ibm.com>
      Signed-off-by: default avatarMatt Evans <matt@ozlabs.org>
      Signed-off-by: default avatarBenjamin Herrenschmidt <benh@kernel.crashing.org>
      2468dcf6
    • Nishanth Aravamudan's avatar
      pseries/iommu: Remove DDW on kexec · 14b6f00f
      Nishanth Aravamudan authored
      pseries/iommu: remove DDW on kexec
      
      We currently insert a property in the device-tree when we successfully
      configure DDW for a given slot. This was meant to be an optimization to
      speed up kexec/kdump, so that we don't need to make the RTAS calls again
      to re-configured DDW in the new kernel.
      
      However, we end up tripping a plpar_tce_stuff failure on kexec/kdump
      because we unconditionally parse the ibm,dma-window property for the
      node at bus/dev setup time. This property contains the 32-bit DMA window
      LIOBN, which is distinct from the DDW window's. We pass that LIOBN (via
      iommu_table_init -> iommu_table_clear -> tce_free ->
      tce_freemulti_pSeriesLP) to plpar_tce_stuff, which fails because that
      32-bit window is no longer present after
      25ebc45b
      
       ("powerpc/pseries/iommu: remove
      default window before attempting DDW manipulation").
      
      I believe the simplest, easiest-to-maintain fix is to just change our
      initcall to, rather than detecting and updating the new kernel's DDW
      knowledge, just remove all DDW configurations. When the drivers
      re-initialize, we will set everything back up as it was before.
      
      Signed-off-by: default avatarNishanth Aravamudan <nacc@us.ibm.com>
      Signed-off-by: default avatarBenjamin Herrenschmidt <benh@kernel.crashing.org>
      14b6f00f
    • Nishanth Aravamudan's avatar
      pseries/iommu: Restore_default_window does not use liobn parameter · a1dabade
      Nishanth Aravamudan authored
      
      
      The parameter is unused, and complicates a following fix. Just remove
      it.
      
      Signed-off-by: default avatarNishanth Aravamudan <nacc@us.ibm.com>
      Signed-off-by: default avatarBenjamin Herrenschmidt <benh@kernel.crashing.org>
      a1dabade
    • Daniel Borkmann's avatar
      powerpc: fix ics_rtas_init and start_secondary section mismatch · 174ea471
      Daniel Borkmann authored
      
      
      It seems, we're fine with just annotating the two functions.
      Thus, this fixes the following build warnings on ppc64:
      
      WARNING: arch/powerpc/sysdev/xics/built-in.o(.text+0x1664):
      The function .ics_rtas_init() references
      the function __init .xics_register_ics().
      This is often because .ics_rtas_init lacks a __init
      annotation or the annotation of .xics_register_ics is wrong.
      
      WARNING: arch/powerpc/sysdev/built-in.o(.text+0x6044):
      The function .ics_rtas_init() references
      the function __init .xics_register_ics().
      This is often because .ics_rtas_init lacks a __init
      annotation or the annotation of .xics_register_ics is wrong.
      
      WARNING: arch/powerpc/kernel/built-in.o(.text+0x2db30):
      The function .start_secondary() references
      the function __cpuinit .vdso_getcpu_init().
      This is often because .start_secondary lacks a __cpuinit
      annotation or the annotation of .vdso_getcpu_init is wrong.
      
      Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
      Signed-off-by: default avatarDaniel Borkmann <dborkman@redhat.com>
      Signed-off-by: default avatarBenjamin Herrenschmidt <benh@kernel.crashing.org>
      174ea471
  3. Jan 29, 2013
  4. Jan 28, 2013
    • Suravee Suthikulpanit's avatar
      IOMMU, AMD Family15h Model10-1Fh erratum 746 Workaround · 318fe782
      Suravee Suthikulpanit authored
      
      
      The IOMMU may stop processing page translations due to a perceived lack
      of credits for writing upstream peripheral page service request (PPR)
      or event logs. If the L2B miscellaneous clock gating feature is enabled
      the IOMMU does not properly register credits after the log request has
      completed, leading to a potential system hang.
      
      BIOSes are supposed to disable L2B micellaneous clock gating by setting
      L2_L2B_CK_GATE_CONTROL[CKGateL2BMiscDisable](D0F2xF4_x90[2]) = 1b. This
      patch corrects that for those which do not enable this workaround.
      
      Signed-off-by: default avatarSuravee Suthikulpanit <suravee.suthikulpanit@amd.com>
      Acked-by: default avatarBorislav Petkov <bp@suse.de>
      Cc: stable@vger.kernel.org
      Signed-off-by: default avatarJoerg Roedel <joro@8bytes.org>
      318fe782
    • David Teigland's avatar
      GFS2: fix skip unlock condition · d4e0bfec
      David Teigland authored
      The recent commit fb6791d1
      
      
      included the wrong logic.  The lvbptr check was incorrectly
      added after the patch was tested.
      
      Signed-off-by: default avatarDavid Teigland <teigland@redhat.com>
      Signed-off-by: default avatarSteven Whitehouse <swhiteho@redhat.com>
      d4e0bfec
    • Peter Korsgaard's avatar
      dm9601: support dm9620 variant · 6642f91c
      Peter Korsgaard authored
      
      
      dm9620 is a newer variant of dm9601 with more features (usb 2.0, checksum
      offload, ..), but it can also be put in a dm9601 compatible mode, allowing
      us to reuse the existing driver.
      
      This does mean that the extended features like checksum offload cannot be
      used, but that's hardly critical on a 100mbps interface.
      
      Thanks to Sławek Wernikowski <slawek@wernikowski.net> for providing me
      with a dm9620 based device to test.
      
      Signed-off-by: default avatarPeter Korsgaard <jacmet@sunsite.dk>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      6642f91c
    • Vlad Yasevich's avatar
      SCTP: Free the per-net sysctl table on net exit. v2 · 5f19d121
      Vlad Yasevich authored
      
      
      Per-net sysctl table needs to be explicitly freed at
      net exit.  Otherwise we see the following with kmemleak:
      
      unreferenced object 0xffff880402d08000 (size 2048):
        comm "chrome_sandbox", pid 18437, jiffies 4310887172 (age 9097.630s)
        hex dump (first 32 bytes):
          b2 68 89 81 ff ff ff ff 20 04 04 f8 01 88 ff ff  .h...... .......
          04 00 00 00 a4 01 00 00 00 00 00 00 00 00 00 00  ................
        backtrace:
          [<ffffffff815b4aad>] kmemleak_alloc+0x21/0x3e
          [<ffffffff81110352>] slab_post_alloc_hook+0x28/0x2a
          [<ffffffff81113fad>] __kmalloc_track_caller+0xf1/0x104
          [<ffffffff810f10c2>] kmemdup+0x1b/0x30
          [<ffffffff81571e9f>] sctp_sysctl_net_register+0x1f/0x72
          [<ffffffff8155d305>] sctp_net_init+0x100/0x39f
          [<ffffffff814ad53c>] ops_init+0xc6/0xf5
          [<ffffffff814ad5b7>] setup_net+0x4c/0xd0
          [<ffffffff814ada5e>] copy_net_ns+0x6d/0xd6
          [<ffffffff810938b1>] create_new_namespaces+0xd7/0x147
          [<ffffffff810939f4>] copy_namespaces+0x63/0x99
          [<ffffffff81076733>] copy_process+0xa65/0x1233
          [<ffffffff81077030>] do_fork+0x10b/0x271
          [<ffffffff8100a0e9>] sys_clone+0x23/0x25
          [<ffffffff815dda73>] stub_clone+0x13/0x20
          [<ffffffffffffffff>] 0xffffffffffffffff
      
      I fixed the spelling of sysctl_header so the code actually
      compiles. -- EWB.
      
      Reported-by: default avatarMartin Mokrejs <mmokrejs@fold.natur.cuni.cz>
      Signed-off-by: default avatarVlad Yasevich <vyasevich@gmail.com>
      Acked-by: default avatarNeil Horman <nhorman@tuxdriver.com>
      Signed-off-by: default avatar"Eric W. Biederman" <ebiederm@xmission.com>
      Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
      5f19d121