- Aug 26, 2021
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Chunyan Zhang authored
Use 50ms as default timeout value and the time clock is 32768HZ. The original value of WDG_LOAD_VAL is not correct, so this patch fixes it. Fixes: ac177501 ("spi: sprd: Add the support of restarting the system") Signed-off-by:
Chunyan Zhang <chunyan.zhang@unisoc.com> Link: https://lore.kernel.org/r/20210826091549.2138125-2-zhang.lyra@gmail.com Signed-off-by:
Mark Brown <broonie@kernel.org>
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- Aug 25, 2021
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Chunyan Zhang authored
RD_CMD can accept slave address offset only, higher bits are reserved. Writing the whole slave address including slave base seems unnecessary. Signed-off-by:
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Chunyan Zhang authored
The slave register offset shouldn't equal to the max slave address which ADI can support to access. Signed-off-by:
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Chunyan Zhang authored
The register offset would be added a physical address base and then pass to the function sprd_adt_read()/_write() each time before calling them. So we can do that within these two functions instead, that would make the code more clear. Signed-off-by:
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- Aug 23, 2021
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Colin Ian King authored
Currently there are two places where the error return variable ret is being assigned -ETIMEDOUT on timeout errors and this value is not being returned. Fix this by returning -ETIMEDOUT rather than redundantly assiging it to ret. Addresses-Coverity: ("Unused value") Fixes: 0b89fc0a ("spi: rockchip-sfc: add rockchip serial flash controller") Signed-off-by:Colin Ian King <colin.king@canonical.com> Link: https://lore.kernel.org/r/20210818141051.36320-1-colin.king@canonical.com Signed-off-by:
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Jon Lin authored
Coherent dma buffer is uncached and memcpy is enough. Signed-off-by:
Jon Lin <jon.lin@rock-chips.com> Link: https://lore.kernel.org/r/20210821124925.6066-1-jon.lin@rock-chips.com Signed-off-by:
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- Aug 20, 2021
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kernel test robot authored
drivers/spi/spi-stm32.c:915:23-25: WARNING !A || A && B is equivalent to !A || B Condition !A || A && B is equivalent to !A || B. Generated by: scripts/coccinelle/misc/excluded_middle.cocci Fixes: 7ceb0b8a ("spi: stm32: finalize message either on dma callback or EOT") CC: Alain Volmat <alain.volmat@foss.st.com> Reported-by:
kernel test robot <lkp@intel.com> Signed-off-by:
Alain Volmat <alain.volmat@foss.st.com> Link: https://lore.kernel.org/r/20210713191004.GA14729@5eb5c2cbef84 Signed-off-by:
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- Aug 18, 2021
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Yang Yingliang authored
spi_master_put() is already called in spi_unregister_master(), or it will lead a double decrement refcount. Reported-by:
Hulk Robot <hulkci@huawei.com> Signed-off-by:
Yang Yingliang <yangyingliang@huawei.com> Link: https://lore.kernel.org/r/20210810142230.2220453-1-yangyingliang@huawei.com Signed-off-by:
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- Aug 17, 2021
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Chris Morgan authored
Add the rockchip serial flash controller (SFC) driver. Signed-off-by:
Chris Morgan <macromorgan@hotmail.com> Signed-off-by:
Peter Geis <pgwipeout@gmail.com> Tested-by:
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Chris Morgan authored
Add bindings for the Rockchip serial flash controller. New device specific parameter of rockchip,sfc-no-dma included in documentation. Signed-off-by:
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- Aug 12, 2021
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Yang Yingliang authored
Fix the following waring: drivers/spi/spi-mxic.c: In function ‘mxic_spi_mem_exec_op’: drivers/spi/spi-mxic.c:401:3: warning: this ‘if’ clause does not guard... [-Wmisleading-indentation] if (op->data.dir == SPI_MEM_DATA_IN) ^~ drivers/spi/spi-mxic.c:403:4: note: ...this statement, but the latter is misleadingly indented as if it were guarded by the ‘if’ if (op->data.dtr) ^~ Signed-off-by:Zhengxun Li <zhengxunli@mxic.com.tw> Link: https://lore.kernel.org/r/20210810142405.2221540-1-yangyingliang@huawei.com Signed-off-by:
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- Aug 10, 2021
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Tony Lindgren authored
Depending on the DMA driver being used, the struct dma_slave_config may need to be initialized to zero for the unused data. For example, we have three DMA drivers using src_port_window_size and dst_port_window_size. If these are left uninitialized, it can cause DMA failures. For spi-pic32, this is probably not currently an issue but is still good to fix though. Fixes: 1bcb9f8c ("spi: spi-pic32: Add PIC32 SPI master driver") Cc: Purna Chandra Mandal <purna.mandal@microchip.com> Cc: Peter Ujfalusi <peter.ujfalusi@gmail.com> Cc: Vinod Koul <vkoul@kernel.org> Signed-off-by:
Tony Lindgren <tony@atomide.com> Link: https://lore.kernel.org/r/20210810081727.19491-2-tony@atomide.com Signed-off-by:
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Tony Lindgren authored
Depending on the DMA driver being used, the struct dma_slave_config may need to be initialized to zero for the unused data. For example, we have three DMA drivers using src_port_window_size and dst_port_window_size. If these are left uninitialized, it can cause DMA failures. For spi-fsl-dspi, this is probably not currently an issue but is still good to fix though. Fixes: 90ba3703 ("spi: spi-fsl-dspi: Add DMA support for Vybrid") Cc: Sanchayan Maity <maitysanchayan@gmail.com> Cc: Vladimir Oltean <vladimir.oltean@nxp.com> Cc: Peter Ujfalusi <peter.ujfalusi@gmail.com> Cc: Vinod Koul <vkoul@kernel.org> Signed-off-by:
Vladimir Oltean <vladimir.oltean@nxp.com> Link: https://lore.kernel.org/r/20210810081727.19491-1-tony@atomide.com Signed-off-by:
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- Aug 09, 2021
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Mason Zhang authored
this patch fixed the build warnning in set cs timing. Signed-off-by:
Mason Zhang <Mason.Zhang@mediatek.com> Link: https://lore.kernel.org/r/20210809055911.17538-1-Mason.Zhang@mediatek.com Signed-off-by:
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Zhengxun Li authored
Driver patch for octal DTR mode support. Owing to the spi_mem_default_supports_op() is not support dtr operation. Based on commit <539cf68c > (spi: spi-mem: add spi_mem_dtr_supports_op()) add spi_mem_dtr_supports_op() to support dtr and keep checking the buswidth and command bytes. Signed-off-by:
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Dmitry Osipenko authored
Don't use resource-managed spi_register helper to correct the driver removal order and make it to match the error unwinding order of the probe function. Signed-off-by:
Dmitry Osipenko <digetx@gmail.com> Link: https://lore.kernel.org/r/20210731192731.5869-2-digetx@gmail.com Signed-off-by:
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Dmitry Osipenko authored
The Tegra SPI driver supports runtime PM, which controls the clock enable state, but the clk is also enabled separately from the RPM at the driver probe time, and thus, stays always on. Fix it. Runtime PM now is always available on Tegra, hence there is no need to check the RPM presence in the driver anymore. Remove these checks. Signed-off-by:
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- Aug 05, 2021
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Mason Zhang authored
This patch modified set_cs_timing parameter, no need pass in spi_delay to set_cs_timing callback. By the way, we modified the mediatek and tegra114 spi driver to fix build err. In mediatek spi driver, We have support set absolute time not clk_count, and call this function in prepare_message not user's API. Signed-off-by:
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Mason Zhang authored
As we know, spi core layer has removed spi_set_cs_timing() API. So this patch moved spi_delay for cs_timing from spi_controller to spi_device, because cs timing should be set by spi_device but not controller. Signed-off-by:
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- Aug 04, 2021
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Mark Brown authored
This series series of patches converts ep93xx to Common Clock Framework. It consists of preparation patches to use clk_prepare_enable where it is needed, instead of clk_enable used in ep93xx drivers prior to CCF and a patch converting mach-ep93xx/clock.c to CCF. Link: https://lore.kernel.org/patchwork/cover/1445563/ Link: https://lore.kernel.org/patchwork/patch/1435884/ v1->v2: - added SoB Alexander Sverdlin (7): iio: ep93xx: Prepare clock before using it spi: spi-ep93xx: Prepare clock before using it Input: ep93xx_keypad: Prepare clock before using it video: ep93xx: Prepare clock before using it dmaengine: ep93xx: Prepare clock before using it ASoC: cirrus: i2s: Prepare clock before using it pwm: ep93xx: Prepare clock before using it Nikita Shubin (1): ep93xx: clock: convert in-place to COMMON_CLK arch/arm/Kconfig | 2 +- arch/arm/mach-ep93xx/clock.c | 975 ++++++++++++++----------- arch/arm/mach-ep93xx/core.c | 2 +- arch/arm/mach-ep93xx/soc.h | 42 +- drivers/dma/ep93xx_dma.c | 6 +- drivers/iio/adc/ep93xx_adc.c | 6 +- drivers/input/keyboard/ep93xx_keypad.c | 4 +- drivers/pwm/pwm-ep93xx.c | 12 +- drivers/spi/spi-ep93xx.c | 4 +- drivers/video/fbdev/ep93xx-fb.c | 4 +- sound/soc/cirrus/ep93xx-i2s.c | 12 +- 11 files changed, 605 insertions(+), 464 deletions(-) base-commit: 64376a981a0e2e57c46efa63197c2ebb7dab35df -- 2.26.2
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Jason Wang authored
Prefer 'unsigned int' to bare use of 'unsigned'. Signed-off-by:
Jason Wang <wangborong@cdjrlc.com> Link: https://lore.kernel.org/r/20210731133342.432575-1-wangborong@cdjrlc.com Signed-off-by:
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Alexander Sverdlin authored
Use clk_prepare_enable()/clk_disable_unprepare() in preparation for switch to Common Clock Framework, otherwise the following is visible: WARNING: CPU: 0 PID: 1 at drivers/clk/clk.c:1011 clk_core_enable+0x9c/0xbc Enabling unprepared ep93xx-spi.0 ... Hardware name: Cirrus Logic EDB9302 Evaluation Board ... clk_core_enable clk_core_enable_lock ep93xx_spi_prepare_hardware __spi_pump_messages __spi_sync spi_sync spi_sync_transfer.constprop.0 regmap_spi_write _regmap_raw_write_impl _regmap_bus_raw_write _regmap_update_bits regmap_update_bits_base cs4271_component_probe snd_soc_component_probe soc_probe_component snd_soc_bind_card edb93xx_probe ... spi_master spi0: failed to prepare transfer hardware: -108 Signed-off-by:
Alexander Sverdlin <alexander.sverdlin@gmail.com> Signed-off-by:
Nikita Shubin <nikita.shubin@maquefel.me> Acked-by:
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- Aug 03, 2021
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Uwe Kleine-König authored
This only works when the native chipselect is in use. On a board with a Ti ADS7950 8 channel ADC. This patch reduces the time to read out all channels once from 280 us to 20 us. Signed-off-by:
Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Link: https://lore.kernel.org/r/20210727124226.5571-1-u.kleine-koenig@pengutronix.de Signed-off-by:
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- Jul 22, 2021
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Andy Shevchenko authored
In some cases reset_sccr1() can be called when no message available. This means that there is no associated chip to receive that message and hence no threshold needs to be set. Adapt the function to such cases. Fixes: 3bbdc083 ("spi: pxa2xx: Reuse int_stop_and_reset() in couple of places") Reported-by:
Dan Carpenter <dan.carpenter@oracle.com> Signed-off-by:
Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://lore.kernel.org/r/20210721121520.62605-1-andriy.shevchenko@linux.intel.com Signed-off-by:
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- Jul 20, 2021
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Mark Brown authored
Merge series "spi: fsi: Reduce max transfer size to 8 bytes" from Eddie James <eajames@linux.ibm.com>: The security restrictions on the FSI-attached SPI controllers have been applied universally to all controllers, so the controller can no longer transfer more than 8 bytes for one transfer. Refactor the driver to remove the looping and support for larger transfers, and remove the "restricted" compatible string, as all the controllers are now considered restricted. Eddie James (2): spi: fsi: Reduce max transfer size to 8 bytes dt-bindings: fsi: Remove ibm,fsi2spi-restricted compatible .../devicetree/bindings/fsi/ibm,fsi2spi.yaml | 1 - drivers/spi/spi-fsi.c | 125 +++--------------- 2 files changed, 22 insertions(+), 104 deletions(-) -- 2.27.0
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- Jul 19, 2021
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Eddie James authored
Remove this compatible string from the FSI SPI controller documentation, since the security restrictions have been universally applied to the controllers. Signed-off-by:
Eddie James <eajames@linux.ibm.com> Link: https://lore.kernel.org/r/20210716133915.14697-3-eajames@linux.ibm.com Signed-off-by:
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Eddie James authored
Security changes have forced the SPI controllers to be limited to 8 byte reads. Refactor the sequencing to just handle 8 bytes at a time. Signed-off-by:
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Uwe Kleine-König authored
For each usage of fifo_words it is clear if ->dynamic_burst is true or not. This can be used to simplify the function a bit. Signed-off-by:
Fabio Estevam <festevam@gmail.com> Link: https://lore.kernel.org/r/20210716173927.2050620-1-u.kleine-koenig@pengutronix.de Signed-off-by:
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Andy Shevchenko authored
Reuse int_stop_and_reset() in couple of places. While at it, change the order of the int_stop_and_reset() and pxa2xx_spi_off() to be in align with the similar flow in int_error_stop(). Signed-off-by:
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Andy Shevchenko authored
In order to allow reset_sccr1() to be reused in DMA paths, reset DMA bits in CR1 in this function. Signed-off-by:
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Andy Shevchenko authored
Convert reset_sccr1() to use pxa2xx_spi_update(). It will help for further improvements. Signed-off-by:
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- Jul 14, 2021
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Douglas Anderson authored
The comment in setup_fifo_xfer() about setting the watermark wasn't quite proper grammar and also stopped making sense around commit 6d66507d ("spi: spi-geni-qcom: Don't wait to start 1st transfer if transmitting"). After that commit we actually start the transfer _before_ the watermark interrupt comes. I don't think the comment really has any value anymore. We've already got a comment when we grab the spinlock saying that our interrupt can come any time as a result of the things in the locked section. Let's just remove it. Signed-off-by:
Douglas Anderson <dianders@chromium.org> Reviewed-by:
Vinod Koul <vkoul@kernel.org> Link: https://lore.kernel.org/r/20210712085010.1.Ie3bb9f9d30d6475bb75251d32635194c1c72b9ee@changeid Signed-off-by:
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Aswath Govindraju authored
Convert omap-spi dt-binding documentation from txt to yaml format. Signed-off-by:
Aswath Govindraju <a-govindraju@ti.com> Reviewed-by:
Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20210621092900.951-1-a-govindraju@ti.com Signed-off-by:
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Mason Zhang authored
This patch support tick_delay setting, some users need use high-speed spi speed, which can use tick_delay to tuning spi clk timing. Signed-off-by:
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- Jul 12, 2021
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Mark Brown authored
This series contains fixes & cleanup mainly regarding fifo and the way end of transfer triggered, when used with or without DMA. An additional patch cleans up the pm_runtime calls and another one enables the autosuspend. v2: - split pm_runtime fix patch into two - correct revert commit subject line Alain Volmat (6): spi: stm32: fixes pm_runtime calls in probe/remove spi: stm32: enable pm_runtime autosuspend spi: stm32h7: fix full duplex irq handler handling spi: stm32: Revert "properly handle 0 byte transfer" spi: stm32h7: don't wait for EOT and flush fifo on disable spi: stm32: finalize message either on dma callback or EOT Amelie Delaunay (1): spi: stm32h7: rework rx fifo read function drivers/spi/spi-stm32.c | 146 +++++++++++++++++----------------------- 1 file changed, 61 insertions(+), 85 deletions(-) -- 2.25.1 -
Mason Zhang authored
This patch add no_need_unprepare support for spi, if spi src clk is MAIN PLL, it can keep the clk_prepare and will not cause low power issue. So we no need do clk_prepare/clk_unprepare in runtime pm, and it will get better performance, because clk_prepare has called mutex lock. In the same way, clk_get_rate also has called mutex lock, so we moved it to spi_probe. Signed-off-by:
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Mason Zhang authored
this patch update spi master bingdings for MT6893 SOC. Signed-off-by:
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Randy Dunlap authored
Fix kernel-doc warning in spi.h by adding the missing kernel-doc entry and also correct the original comment so that they both indicate the correct polarity of the flag. ../include/linux/spi/spi.h:673: warning: Function parameter or member 'devm_allocated' not described in 'spi_controller' Fixes: 794aaf01 ("spi: Fix use-after-free with devm_spi_alloc_*") Signed-off-by:
Randy Dunlap <rdunlap@infradead.org> Cc: William A. Kennington III <wak@google.com> Cc: Mark Brown <broonie@kernel.org> Cc: linux-spi@vger.kernel.org Cc: Lukas Wunner <lukas@wunner.de> Reviewed-by:
Lukas Wunner <lukas@wunner.de> Link: https://lore.kernel.org/r/20210628210520.5712-1-rdunlap@infradead.org Signed-off-by:
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Alain Volmat authored
Depending on the usage, it is necessary to perform the finalize message operation either upon receiving the EOT interruption, eiher upon receiving the DMA callback. Indeed, when relying on DMA, even if the SPI EOT IT has been received, it is necessary to wait for the end of the DMA RX transaction before accessing to the data. Signed-off-by:
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Alain Volmat authored
In nominal cases, disable is called as part of the unprepare_message, after receiving a EOT and after receiving all data so it doesn't make sense to check for EOT and empty the FIFO. Moreover, at the end of the disable, the SPI is disable (SPE) leading to clear of all internal FIFO, leaving the IP in a known status. Signed-off-by:
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