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  1. Sep 04, 2017
  3. Sep 02, 2017
  5. Aug 30, 2017
    • Paul Burton's avatar
      clocksource: mips-gic-timer: Use new GIC accessor functions · e07127a0
      Paul Burton authored 
      

Switch from calling functions exported by the GIC interrupt controller
to using new accessors provided by asm/mips-gic.h. This will allow the
counter-handling functionality to be removed from the interrupt
controller driver, where it doesn't really belong, and also allow for
inlining of the accesses to the GIC.

Signed-off-by: default avatarPaul Burton <paul.burton@imgtec.com>
Acked-by: default avatarThomas Gleixner <tglx@linutronix.de>
Cc: Daniel Lezcano <daniel.lezcano@linaro.org>
Cc: Jason Cooper <jason@lakedaemon.net>
Cc: Marc Zyngier <marc.zyngier@arm.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/17021/


Signed-off-by: default avatarRalf Baechle <ralf@linux-mips.org>
      e07127a0
    • Paul Burton's avatar
      MIPS: GIC: Introduce asm/mips-gic.h with accessor functions · 582e2b4a
      Paul Burton authored 
      

This patch introduces a new header providing accessor functions for the
MIPS Global Interrupt Controller (GIC) mirroring those provided for the
other 2 components of the MIPS Coherent Processing System (CPS) - the
Coherence Manager (CM) & Cluster Power Controller (CPC).

This header makes use of the new standardised CPS accessor macros where
possible, but does require some custom accessors for cases where we have
either a bit or a register per interrupt.

A major advantage of this over the existing
include/linux/irqchip/mips-gic.h definitions is that code performing
accesses can become much simpler, for example this:

  gic_update_bits(GIC_REG(SHARED, GIC_SH_SET_TRIGGER) +
                  GIC_INTR_OFS(intr), 1ul << GIC_INTR_BIT(intr),
                  (unsigned long)trig << GIC_INTR_BIT(intr));

...can become simply:

  change_gic_trig(intr, trig);

The accessors handle 32 vs 64 bit in the same way as for CM & CPC code,
which means that GIC code will also not need to worry about the access
size in most cases. They are also accessible outside of
drivers/irqchip/irq-mips-gic.c which will allow for simplification in
the use of the non-interrupt portions of the GIC (eg. counters) which
currently require the interrupt controller driver to expose helper
functions for access.

This patch doesn't change any existing code over to use the new
accessors yet, since a wholesale change would be invasive & difficult to
review. Instead follow-on patches will convert code piecemeal to use
this new header. The one change to existing code is to rename gic_base
to mips_gic_base & make it global, in order to fit in with the naming
expected by the standardised CPS accessor macros.

Signed-off-by: default avatarPaul Burton <paul.burton@imgtec.com>
Acked-by: default avatarMarc Zyngier <marc.zyngier@arm.com>
Cc: Jason Cooper <jason@lakedaemon.net>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: linux-kernel@vger.kernel.org
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/17020/


Signed-off-by: default avatarRalf Baechle <ralf@linux-mips.org>
      582e2b4a
    • James Hogan's avatar
      irqchip: mips-gic: SYNC after enabling GIC region · a0ffec3d
      James Hogan authored 
      A SYNC is required between enabling the GIC region and actually trying
to use it, even if the first access is a read, otherwise its possible
depending on the timing (and in my case depending on the precise
alignment of certain kernel code) to hit CM bus errors on that first
access.

Add the SYNC straight after setting the GIC base.

[paul.burton@imgtec.com:
  Changes later in this series increase our likelihood of hitting this
  by reducing the amount of code that runs between enabling the GIC &
  accessing it.]

Fixes: a7057270

 ("irqchip: mips-gic: Add device-tree support")
Signed-off-by: default avatarJames Hogan <james.hogan@imgtec.com>
Signed-off-by: default avatarPaul Burton <paul.burton@imgtec.com>
Acked-by: default avatarMarc Zyngier <marc.zyngier@arm.com>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Jason Cooper <jason@lakedaemon.net>
Cc: James Hogan <james.hogan@imgtec.com>
Cc: linux-kernel@vger.kernel.org
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/17019/


Signed-off-by: default avatarRalf Baechle <ralf@linux-mips.org>
      a0ffec3d
    • Christoph Hellwig's avatar
      MIPS: Don't use dma_cache_sync to implement fd_cacheflush · 1dd71588
      Christoph Hellwig authored 
      

The floppy drivers doesn't otherwise use the DMA API, so indirecting
through it just for cache flushing in MIPS-specific code just call
dma_cache_wback_inv directly.

Signed-off-by: default avatarChristoph Hellwig <hch@lst.de>
Cc: iommu@lists.linux-foundation.org
Cc: Marek Szyprowski <m.szyprowski@samsung.com>
Cc: Robin Murphy <robin.murphy@arm.com>
Cc: Michal Simek <monstr@monstr.eu>
Cc: David Howells <dhowells@redhat.com>
Cc: Guan Xuetao <gxt@mprc.pku.edu.cn>
Cc: Chris Zankel <chris@zankel.net>
Cc: Max Filippov <jcmvbkbc@gmail.com>
Cc: x86@kernel.org
Cc: linux-mips@linux-mips.org
Cc: linux-ia64@vger.kernel.org
Cc: linuxppc-dev@lists.ozlabs.org
Cc: linux-xtensa@linux-xtensa.org
Cc: linux-sh@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/17183/


Signed-off-by: default avatarRalf Baechle <ralf@linux-mips.org>
      1dd71588
    • Paul Burton's avatar
      MIPS: generic: Bump default NR_CPUS to 16 · c2c03291
      Paul Burton authored 
      

In generic_defconfig set CONFIG_NR_CPUS to 16 rather than 2, which is a
rather too low limit for many modern day MIPS systems.

Signed-off-by: default avatarPaul Burton <paul.burton@imgtec.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/16949/


Signed-off-by: default avatarRalf Baechle <ralf@linux-mips.org>
      c2c03291
    • Paul Burton's avatar
      MIPS: generic: Don't explicitly disable CONFIG_USB_SUPPORT · f8bfffc1
      Paul Burton authored 
      

Leave CONFIG_USB_SUPPORT at its default, allowing board config fragments
to make use of USB drivers without needing to override it & trigger
warnings from merge_config.sh.

Signed-off-by: default avatarPaul Burton <paul.burton@imgtec.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/16948/


Signed-off-by: default avatarRalf Baechle <ralf@linux-mips.org>
      f8bfffc1
    • Paul Burton's avatar
      MIPS: Make CONFIG_MIPS_MT_SMP default y · 5cbf9688
      Paul Burton authored 
      

On systems that support MT ASE multithreading (ie. VPEs) we are very
likely to want to include that support as default. Rather than setting
it in various defconfigs, simply make CONFIG_MIPS_MT_SMP default y such
that systems which select CONFIG_SYS_SUPPORTS_MULTITHREADING get it by
default.

As well as allowing us to remove the selection of CONFIG_MIPS_MT_SMP
from various defconfigs, this also allows the generated generic
defconfigs which derive from generic_defconfig to automatically gain
support for MT ASE SMP when building for a suitable (pre-MIPSr6) ISA.

For malta_kvm_guest_defconfig CONFIG_MIPS_MT_SMP is explicitly disabled
since enabling SMP implicitly disables CONFIG_KVM_GUEST, which depends
on CONFIG_BROKEN_ON_SMP.

Signed-off-by: default avatarPaul Burton <paul.burton@imgtec.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/16947/


Signed-off-by: default avatarRalf Baechle <ralf@linux-mips.org>
      5cbf9688
    • Paul Burton's avatar
      MIPS: Prevent direct use of generic_defconfig · a4c2f797
      Paul Burton authored 
      

Using generic_defconfig directly is unlikely to be what a user actually
wants to do - it doesn't specify any particular ISA revision & it
doesn't enable any board or driver support, resulting in a largely
useless kernel.

Prevent users from using it directly, printing a helpful message to
point them in the right direction if they attempt to.

Signed-off-by: default avatarPaul Burton <paul.burton@imgtec.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/16946/


Signed-off-by: default avatarRalf Baechle <ralf@linux-mips.org>
      a4c2f797
    • Paul Burton's avatar
      MIPS: NI 169445: Only include in 32r2el kernels · 9e111ee7
      Paul Burton authored 
      

The NI 169445 board uses a little endian MIPS32r2 CPU, and therefore
including board support in kernels that are unable to run on such a CPU
is pointless.

Specify requirements in the board config fragment that cause the NI
169445 board support to only be included in generic kernels that target
little endian MIPS32r2 CPUs.

For example, NI 169445 support will be included when configuring using
32r2el_defconfig but not when using 64r6_defconfig.

Signed-off-by: default avatarPaul Burton <paul.burton@imgtec.com>
Acked-by: default avatarNathan Sullivan <nathan.sullivan@ni.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/16945/


Signed-off-by: default avatarRalf Baechle <ralf@linux-mips.org>
      9e111ee7
    • Paul Burton's avatar
      MIPS: SEAD-3: Only include in 32 bit kernels by default · c7a1d3d8
      Paul Burton authored 
      

The MIPS SEAD-3 development board has only ever been used with 32 bit
CPUs, so including support for it in 64 bit kernels is wasteful since
those kernels will never run on a SEAD-3.

Specify a requirement in the SEAD-3 board config fragment that ensures
the board support is only included in 32 bit kernels, by checking that
CONFIG_32BIT=y.

Signed-off-by: default avatarPaul Burton <paul.burton@imgtec.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/16944/


Signed-off-by: default avatarRalf Baechle <ralf@linux-mips.org>
      c7a1d3d8
    • Paul Burton's avatar
      MIPS: generic: Allow filtering enabled boards by requirements · 27e0d4b0
      Paul Burton authored 
      

Up until now when configuring a generic kernel all board config
fragments have been merged by default unless boards are explicitly
selected by the user specifying BOARDS=.

In many cases this is sub-optimal, since some boards don't make sense to
include in some kernels. For example the MIPS SEAD-3 development board
has only ever been used with 32 bit CPUs, so including support for the
SEAD-3 in a 64 bit kernel is wasteful.

This patch introduces support for specifying requirements in board
config fragments, using comments formatted like so:

  # require CONFIG_BLA=y

For example the SEAD-3 board could specify that it should only be merged
for 32 bit kernels using a requirement line like the following:

  # require CONFIG_32BIT=y

A new generic-board-config.sh script is introduced to handle selecting
the board config fragments to merge & calling merge_config.sh to merge
them. In order to allow requirements to check Kconfig symbols that are
implicitly selected, rather than explicitly specified by
generic_defconfig or one of the ISA config fragments, an intermediate
.config file is saved & used as a reference when checking requirements.

Signed-off-by: default avatarPaul Burton <paul.burton@imgtec.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/16943/


Signed-off-by: default avatarRalf Baechle <ralf@linux-mips.org>
      27e0d4b0