- Fix multi-MSI base vector number allocation (Sandor Bodo-Merle)

- Restrict multi-MSI support to uniprocessor kernel (Sandor Bodo-Merle)

* remotes/lorenzo/pci/iproc:
  PCI: iproc: Support multi-MSI only on uniprocessor kernel
  PCI: iproc: Fix multi-MSI base vector number allocation

- Fix race when removing device (Long Li)

- Remove unused bus device removal refcount/functions (Long Li)

* remotes/lorenzo/pci/hv:
  PCI: hv: Remove bus device removal unused refcount/functions
  PCI: hv: Fix a race condition when removing the device

- Rename PCI_IOSIZE, etc in ftpci100 to avoid macro name collisions (Randy
  Dunlap)

* remotes/lorenzo/pci/ftpci100:
  PCI: ftpci100: Rename macro name collision

- Decode PIO Posted/Non-posted Request correctly in error logging (Pali
  Rohár)

- Work around incorrect Vendor ID in Marvell Armada 3700 (Pali Rohár)

* remotes/lorenzo/pci/aardvark:
  PCI: aardvark: Implement workaround for the readback value of VEND_ID
  PCI: aardvark: Fix checking for PIO Non-posted Request

- Fix kernel-doc formatting errors (Krzysztof Wilczyński)

* pci/kernel-doc:
  PCI: Fix kernel-doc formatting

- Annotate __iomem pointer (Bjorn Helgaas)

* pci/host/xgene:
  PCI: xgene: Annotate __iomem pointer

- Fix host init during resume (Vidya Sagar)

- Fix ill-defined MSI IRQ shift behavior (Jon Hunter)

* pci/host/tegra194:
  PCI: tegra194: Fix tegra_pcie_ep_raise_msi_irq() ill-defined shift
  PCI: tegra194: Fix host initialization during resume

- Add missing MODULE_DEVICE_TABLE for driver loading (Zou Wei)

* pci/host/tegra:
  PCI: tegra: Add missing MODULE_DEVICE_TABLE

- Register IRQ handlers after device and data are ready (Javier Martinez
  Canillas)

* pci/host/rockchip:
  PCI: rockchip: Register IRQ handlers after device and data are ready

- Fix INTx enable (Martin Blumenstingl)

* pci/host/intel-gw:
  PCI: intel-gw: Fix INTx enable

- Drop redundant error message from imx6_pcie_probe() (Zhen Lei)

- Limit DBI register length on i.MX 6QuadPlus (Richard Zhu)

- Add "vph-supply" to indicate which regulator supplies PHY (Richard Zhu)

- Enable PHY internal regulator when supplied >3V (Richard Zhu)

* pci/host/imx6:
  PCI: imx6: Enable PHY internal regulator when supplied >3V
  dt-bindings: imx6q-pcie: Add "vph-supply" for PHY supply voltage
  PCI: imx6: Limit DBI register length for imx6qp PCIe
  PCI: imx6: Remove imx6_pcie_probe() redundant error message

- Clarify error message for unbound devices (Moritz Fischer)

* pci/virtualization:
  PCI/IOV: Clarify error message for unbound devices

- Fix dsm_label_utf16s_to_utf8s() buffer overrun (Krzysztof Wilczyński)

- Use sysfs_emit() and sysfs_emit_at() in "show" functions (Krzysztof
  Wilczyński)

- Fix 'resource_alignment' newline issues (Krzysztof Wilczyński)

- Add newline to 'devspec' sysfs file (Krzysztof Wilczyński)

* pci/sysfs:
  PCI/sysfs: Add 'devspec' newline
  PCI/sysfs: Fix 'resource_alignment' newline issues
  PCI/sysfs: Use sysfs_emit() and sysfs_emit_at() in "show" functions
  PCI/sysfs: Rely on lengths from scnprintf(), dsm_label_utf16s_to_utf8s()
  PCI/sysfs: Fix dsm_label_utf16s_to_utf8s() buffer overrun

# Conflicts:
#	drivers/pci/p2pdma.c

- Coalesce host bridge apertures so we can allocate large BARs that cross
  contiguous apertures (Kai-Heng Feng)

* pci/resource:
  PCI: Coalesce host bridge contiguous apertures

- Add pci_reset_bus_function() Secondary Bus Reset interface (Raphael
  Norwitz)

- Work around Huawei Intelligent NIC VF FLR erratum (Chiqijun)

* pci/reset:
  PCI: Work around Huawei Intelligent NIC VF FLR erratum
  PCI: Add pci_reset_bus_function() Secondary Bus Reset interface

- Leave Apple Thunderbolt controllers on for s2idle or standby so they work
  after resume (Konstantin Kharlamov)

* pci/pm:
  PCI: Leave Apple Thunderbolt controllers on for s2idle or standby

- Rename Rename upstream_bridge_distance() to calc_map_type_and_dist()
  (Logan Gunthorpe)

- Collect ACS list message in stack buffer to avoid sleeping (Logan
  Gunthorpe)

- Use correct calc_map_type_and_dist() return type (Logan Gunthorpe)

- Warn if host bridge not in whitelist (Logan Gunthorpe)

- Refactor pci_p2pdma_map_type() (Logan Gunthorpe)

- Avoid pci_get_slot(), which may sleep (Logan Gunthorpe)

- Simplify distance calculation in __calc_map_type_and_dist() and
  calc_map_type_and_dist_warn() (Christoph Hellwig)

- Finish RCU conversion of pdev->p2pdma (Eric Dumazet)

* pci/p2pdma:
  PCI/P2PDMA: Finish RCU conversion of pdev->p2pdma
  PCI/P2PDMA: Simplify distance calculation
  PCI/P2PDMA: Avoid pci_get_slot(), which may sleep
  PCI/P2PDMA: Refactor pci_p2pdma_map_type()
  PCI/P2PDMA: Warn if host bridge not in whitelist
  PCI/P2PDMA: Use correct calc_map_type_and_dist() return type
  PCI/P2PDMA: Collect acs list in stack buffer to avoid sleeping
  PCI/P2PDMA: Rename upstream_bridge_distance() and rework doc

- Return true/false (not 1/0) from bool functions (Yang Li)

- Add Joyce Ooi as Altera PCIe maintainer (Joyce Ooi)

* pci/misc:
  MAINTAINERS: Add Joyce Ooi as Altera PCIe maintainer
  x86/pci: Return true/false (not 1/0) from bool functions

- Ignore pciehp Link Down/Up caused by DPC so device remains bound to
  driver (Lukas Wunner)

- Declare global cpci_debug in header file (Krzysztof Wilczyński)

* pci/hotplug:
  PCI: cpcihp: Declare cpci_debug in header file
  PCI: pciehp: Ignore Link Down/Up caused by DPC

- Make domain/bus/dev/fn format in AER messages match pci_name() format
  (Yicong Yang)

* pci/error:
  Documentation: PCI: Fix typo in pci-error-recovery.rst
  PCI/AER: Use consistent format when printing PCI device

- Add a debug message on PCI device release (Niklas Schnelle)

- Dynamically map ECAM regions to reduce vmalloc usage (Russell King)

* pci/enumeration:
  PCI: Dynamically map ECAM regions
  PCI: Print a debug message on PCI device release

While looking at pci_alloc_p2pmem() I found RCU protection was not properly
applied there, as pdev->p2pdma was potentially read multiple times.

Fix pci_alloc_p2pmem(), add __rcu qualifier to p2pdma field of struct
pci_dev, and fix all other accesses to this field with proper RCU verbs.

Link: https://lore.kernel.org/r/20210701095621.3129283-1-eric.dumazet@gmail.com
Fixes: 1570175a

 ("PCI/P2PDMA: track pgmap references per resource, not globally")
Signed-off-by: Eric Dumazet <edumazet@google.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Christoph Hellwig <hch@lst.de>
Reviewed-by: Logan Gunthorpe <logang@deltatee.com>
Cc: Dan Williams <dan.j.williams@intel.com>
Cc: Ira Weiny <ira.weiny@intel.com>
Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Cc: "Jérôme Glisse" <jglisse@redhat.com>
Cc: "Rafael J. Wysocki" <rafael@kernel.org>

"bar_addr" is passed as the argument to writel(), which expects a
"void __iomem *".  Annotate "bar_addr" correctly.  Resolves an sparse
"incorrect type in argument 2 (different address spaces)" warning.

Link: https://lore.kernel.org/r/202105171809.Tay9fImZ-lkp@intel.com
Link: https://lore.kernel.org/r/20210517171839.25777-1-helgaas@kernel.org


Reported-by: kernel test robot <lkp@intel.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>

Fix kernel-doc formatting throughout drivers/pci and related include files.
No change to functionality intended.

Check for warnings:

  $ find include drivers/pci -type f -path "*pci*.[ch]" | xargs scripts/kernel-doc -none

[bhelgaas: squashed to one commit]
Link: https://lore.kernel.org/r/20210509030237.368540-1-kw@linux.com
Link: https://lore.kernel.org/r/20210703151306.1922450-1-kw@linux.com
Link: https://lore.kernel.org/r/20210703151306.1922450-2-kw@linux.com
Link: https://lore.kernel.org/r/20210703151306.1922450-3-kw@linux.com
Link: https://lore.kernel.org/r/20210703151306.1922450-4-kw@linux.com
Link: https://lore.kernel.org/r/20210703151306.1922450-5-kw@linux.com


Signed-off-by: Krzysztof Wilczyński <kw@linux.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>

cpci_debug is declared as a global variable in cpci_hotplug_core.c and used
in cpci_hotplug_pci.c via an "extern".  Add an extern declaration in the
header file.

Resolves the following sparse warning:

  drivers/pci/hotplug/cpci_hotplug_core.c:47:5: warning: symbol 'cpci_debug' was not declared. Should it be static?

Link: https://lore.kernel.org/r/20210701184306.1492003-1-kw@linux.com


Signed-off-by: Krzysztof Wilczyński <kw@linux.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>

Ley Foon Tan has moved to a different role, so add Joyce Ooi as Altera PCIe
maintainer.

The rfi@lists.rocketboards.org mailing list seems to be dead, so drop it.

[bhelgaas: drop rfi@lists.rocketboards.org]
Link: https://lore.kernel.org/r/20210701065247.152292-1-joyce.ooi@intel.com


Signed-off-by: Joyce Ooi <joyce.ooi@intel.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>

An IRQ handler may be called at any time after it is registered, so
anything it relies on must be ready before registration.

rockchip_pcie_subsys_irq_handler() and rockchip_pcie_client_irq_handler()
read registers in the PCIe controller, but we registered them before
turning on clocks to the controller.  If either is called before the clocks
are turned on, the register reads fail and the machine hangs.

Similarly, rockchip_pcie_legacy_int_handler() uses rockchip->irq_domain,
but we installed it before initializing irq_domain.

Register IRQ handlers after their data structures are initialized and
clocks are enabled.

Found by enabling CONFIG_DEBUG_SHIRQ, which calls the IRQ handler when it
is being unregistered.  An error during the probe path might cause this
unregistration and IRQ handler execution before the device or data
structure init has finished.

[bhelgaas: commit log]
Link: https://lore.kernel.org/r/20210608080409.1729276-1-javierm@redhat.com


Reported-by: Peter Robinson <pbrobinson@gmail.com>
Tested-by: Peter Robinson <pbrobinson@gmail.com>
Signed-off-by: Javier Martinez Canillas <javierm@redhat.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Shawn Lin <shawn.lin@rock-chips.com>

tegra_pcie_ep_raise_msi_irq() shifted a signed 32-bit value left by 31
bits.  The behavior of this is implementation-defined.

Replace the shift by BIT(), which is well-defined.

Found by cppcheck:

  $ cppcheck --enable=all drivers/pci/controller/dwc/pcie-tegra194.c
  Checking drivers/pci/controller/dwc/pcie-tegra194.c ...

  drivers/pci/controller/dwc/pcie-tegra194.c:1829:23: portability: Shifting signed 32-bit value by 31 bits is implementation-defined behaviour. See condition at line 1826.  [shiftTooManyBitsSigned]

  appl_writel(pcie, (1 << irq), APPL_MSI_CTRL_1);
                     ^

[bhelgaas: commit log]
Link: https://lore.kernel.org/r/20210618160219.303092-1-jonathanh@nvidia.com
Fixes: c57247f9

 ("PCI: tegra: Add support for PCIe endpoint mode in Tegra194")
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>

Marvell Armada 3700 Functional Errata, Guidelines, and Restrictions
document describes in erratum 4.1 PCIe value of vendor ID (Ref #: 243):

    The readback value of VEND_ID (RD0070000h [15:0]) is 1B4Bh, while it
    should read 11ABh.

    The firmware can write the correct value, 11ABh, through VEND_ID
    (RD0076044h [15:0]).

Implement this workaround in aardvark driver for both PCI vendor id and PCI
subsystem vendor id.

This change affects and fixes PCI vendor id of emulated PCIe root bridge.
After this change emulated PCIe root bridge has correct vendor id.

Link: https://lore.kernel.org/r/20210624222621.4776-5-pali@kernel.org
Fixes: 8a3ebd8d

 ("PCI: aardvark: Implement emulated root PCI bridge config space")
Signed-off-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Reviewed-by: Marek Behún <kabel@kernel.org>
Cc: stable@vger.kernel.org

PIO_NON_POSTED_REQ for PIO_STAT register is incorrectly defined. Bit 10 in
register PIO_STAT indicates the response is to a non-posted request.

Link: https://lore.kernel.org/r/20210624213345.3617-2-pali@kernel.org


Signed-off-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Reviewed-by: Marek Behún <kabel@kernel.org>
Cc: stable@vger.kernel.org

Commit 275e88b0 ("PCI: tegra: Fix host link initialization") broke
host initialization during resume as it misses out calling the API
dw_pcie_setup_rc() which is required for host and MSI initialization.

Link: https://lore.kernel.org/r/20210504172157.29712-1-vidyas@nvidia.com
Fixes: 275e88b0

 ("PCI: tegra: Fix host link initialization")
Tested-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Vidya Sagar <vidyas@nvidia.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>

Add missing MODULE_DEVICE_TABLE definition so we generate correct modalias
for automatic loading of this driver when it is built as a module.

Link: https://lore.kernel.org/r/1620792422-16535-1-git-send-email-zou_wei@huawei.com


Reported-by: Hulk Robot <hulkci@huawei.com>
Signed-off-by: Zou Wei <zou_wei@huawei.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Vidya Sagar <vidyas@nvidia.com>
Acked-by: Thierry Reding <treding@nvidia.com>

The i.MX8MQ PCIe PHY needs 1.8V in default but can be supplied by either a
1.8V or a 3.3V regulator.

The "vph-supply" DT property tells us which external regulator supplies the
PHY. If that regulator supplies anything over 3V, enable the PHY's internal
3.3V-to-1.8V regulator.

Link: https://lore.kernel.org/r/1622771269-13844-3-git-send-email-hongxing.zhu@nxp.com


Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>

The i.MX8MQ PCIe PHY can use either a 1.8V or a 3.3V power supply.  Add a
"vph-supply" property to indicate which regulator supplies power for the
PHY.

Link: https://lore.kernel.org/r/1622771269-13844-2-git-send-email-hongxing.zhu@nxp.com


Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
Acked-by: Rob Herring <robh@kernel.org>

Define the length of the DBI registers and limit config space to its
length. This makes sure that the kernel does not access registers beyond
that point that otherwise would lead to an abort on the i.MX 6QuadPlus.

See commit 075af61c ("PCI: imx6: Limit DBI register length") that
resolves a similar issue on the i.MX 6Quad PCIe.

Link: https://lore.kernel.org/r/1613789388-2495-2-git-send-email-hongxing.zhu@nxp.com


Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Krzysztof Wilczyński <kw@linux.com>

When devm_ioremap_resource() fails, __devm_ioremap_resource() prints an
error message including the device name, failure cause, and possibly
resource information.

Remove the error message from imx6_pcie_probe() since it's redundant.

Link: https://lore.kernel.org/r/20210511114547.5601-1-thunder.leizhen@huawei.com


Reported-by: Hulk Robot <hulkci@huawei.com>
Signed-off-by: Zhen Lei <thunder.leizhen@huawei.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Krzysztof Wilczyński <kw@linux.com>
Acked-by: Richard Zhu <hongxing.zhu@nxp.com>

The legacy PCI interrupt lines need to be enabled using PCIE_APP_IRNEN bits
13 (INTA), 14 (INTB), 15 (INTC) and 16 (INTD). The old code however was
taking (for example) "13" as raw value instead of taking BIT(13).  Define
the legacy PCI interrupt bits using the BIT() macro and then use these in
PCIE_APP_IRN_INT.

Link: https://lore.kernel.org/r/20210106135540.48420-1-martin.blumenstingl@googlemail.com
Fixes: ed22aaae

 ("PCI: dwc: intel: PCIe RC controller driver")
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Rahul Tanwar <rtanwar@maxlinear.com>

The interrupt affinity scheme used by this driver is incompatible with
multi-MSI as it implies moving the doorbell address to that of another MSI
group.  This isn't possible for multi-MSI, as all the MSIs must have the
same doorbell address. As such it is restricted to systems with a single
CPU.

Link: https://lore.kernel.org/r/20210622152630.40842-2-sbodomerle@gmail.com
Fixes: fc54bae2

 ("PCI: iproc: Allow allocation of multiple MSIs")
Reported-by: Marc Zyngier <maz@kernel.org>
Signed-off-by: Sandor Bodo-Merle <sbodomerle@gmail.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Acked-by: Marc Zyngier <maz@kernel.org>
Acked-by: Pali Rohár <pali@kernel.org>
Acked-by: Ray Jui <ray.jui@broadcom.com>

Commit fc54bae2 ("PCI: iproc: Allow allocation of multiple MSIs")
introduced multi-MSI support with a broken allocation mechanism (it failed
to reserve the proper number of bits from the inner domain).  Natural
alignment of the base vector number was also not guaranteed.

Link: https://lore.kernel.org/r/20210622152630.40842-1-sbodomerle@gmail.com
Fixes: fc54bae2

 ("PCI: iproc: Allow allocation of multiple MSIs")
Reported-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Sandor Bodo-Merle <sbodomerle@gmail.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Acked-by: Marc Zyngier <maz@kernel.org>
Acked-by: Pali Rohár <pali@kernel.org>
Acked-by: Ray Jui <ray.jui@broadcom.com>

Attempting to boot 32-bit ARM kernels under QEMU's 3.x virt models fails
when we have more than 512M of RAM in the model as we run out of vmalloc
space for the PCI ECAM regions. This failure will be silent when running
libvirt, as the console in that situation is a PCI device.

In this configuration, the kernel maps the whole ECAM, which QEMU sets up
for 256 buses, even when maybe only seven buses are in use.  Each bus uses
1M of ECAM space, and ioremap() adds an additional guard page between
allocations. The kernel vmap allocator will align these regions to 512K,
resulting in each mapping eating 1.5M of vmalloc space. This means we need
384M of vmalloc space just to map all of these, which is very wasteful of
resources.

Fix this by only mapping the ECAM for buses we are going to be using.  In
my setups, this is around seven buses in most guests, which is 10.5M of
vmalloc space - way smaller than the 384M that would otherwise be required.
This also means that the kernel can boot without forcing extra RAM into
highmem with the vmalloc= argument, or decreasing the virtual RAM available
to the guest.

Suggested-by: Arnd Bergmann <arnd@arndb.de>
Link: https://lore.kernel.org/r/E1lhCAV-0002yb-50@rmk-PC.armlinux.org.uk


Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Arnd Bergmann <arnd@arndb.de>