1. Apr 22, 2013
    • James Hogan's avatar
      metag: avoid unnecessary builtin dtb rebuilds · 0b4184c2
      James Hogan authored
      
      
      The builtin .dtb.S intermediate file needs to be marked with .SECONDARY
      so that it isn't automatically deleted (which causes it to be
      regenerated on every build). Also add *.dtb.S to clean-files so it gets
      cleaned up by make clean.
      
      Similarly, if the specified builtin dtb isn't already in dtb-y (e.g.
      imported into the tree and specified in CONFIG_METAG_BUILTIN_DTB_NAME)
      it too will be treated as an intermediate and deleted automatically
      (again causing it to be regenerated on every build), so add it to dtb-y
      so it gets added to targets and the dtbs target.
      
      Signed-off-by: default avatarJames Hogan <james.hogan@imgtec.com>
      Cc: Vineet Gupta <Vineet.Gupta1@synopsys.com>
      Cc: Grant Likely <grant.likely@secretlab.ca>
      Cc: Michal Marek <mmarek@suse.cz>
      Cc: Sam Ravnborg <sam@ravnborg.org>
      Reviewed-by: default avatarStephen Warren <swarren@nvidia.com>
      0b4184c2
  2. Mar 27, 2013
  3. Mar 20, 2013
  4. Mar 15, 2013
    • James Hogan's avatar
      metag: cachepart: fix get_global_dcache_size() typo · b7fb9e6a
      James Hogan authored
      
      
      Compilation is broken when the kernel is destined to live in the global
      part of the virtual address space:
      
      arch/metag/kernel/cachepart.c In function 'get_thread_cache_size':
      arch/metag/kernel/cachepart.c +71 : error: implicit declaration of function 'get_global_dache_size'
      
      Fix the typo.
      
      Signed-off-by: default avatarJames Hogan <james.hogan@imgtec.com>
      b7fb9e6a
    • James Hogan's avatar
      metag: cachepart: take into account small cache bits · 4d8edbfe
      James Hogan authored
      
      
      The CORE_CONFIG2 register has bits to indicate that the data or code
      cache is small, i.e. that the size described in the field should be
      divided by 64. Take this into account in get_icache_size() and
      get_dcache_size().
      
      Signed-off-by: default avatarJames Hogan <james.hogan@imgtec.com>
      4d8edbfe
    • James Hogan's avatar
      metag: smp: copy cache partition and enable GCOn · 9e712963
      James Hogan authored
      
      
      When starting an SMP hardware thread, copy the cache partition
      configuration so that the threads share the same cache partitions. Also
      enable the GCOn bit if running in the local half of the virtual address
      space to enable coherency of shared local cache partitions. An atomic
      unlock system event is executed by the new cpu before any memory is read
      to ensure that any writes made by the boot cpu prior to full coherency
      taking effect are visible to the new cpu.
      
      This is to allow SMP to work even when the bootloader hasn't configured
      the caches for coherency. A log message is printed to describe the cache
      partition changes so that the user is aware of potential unintentional
      cache wastage if they've configured the cache partitions in the wrong
      way.
      
      Signed-off-by: default avatarJames Hogan <james.hogan@imgtec.com>
      9e712963
    • James Hogan's avatar
      metag: OProfile support · 00e6c923
      James Hogan authored
      
      
      Add OProfile support for metag, using the perf backend, and falling back
      to generic timer based sampling if perf counter interrupt support is
      disabled.
      
      The oprofile code prepends "metag/" to the perf pmu name to give
      "metag/meta2" which is more consistent with other oprofile arch names.
      
      The backtrace code makes use of <asm/stacktrace.h> for kernel
      backtracing, and a simple frame pointer walk for userland backtracing.
      
      Signed-off-by: default avatarJames Hogan <james.hogan@imgtec.com>
      Cc: Robert Richter <rric@kernel.org>
      Cc: oprofile-list@lists.sf.net
      00e6c923
    • James Hogan's avatar
      metag: perf: prepare for use by oprofile · f27086f5
      James Hogan authored
      
      
      To allow our perf_events code to work with oprofile the PERF_TYPE_RAW
      event type attribute is implemented, which allows the internal encoding
      of events to be used externally (this requires some tweaks so that it
      handles invalid event types more gracefully), and perf_pmu_name() is
      adjusted to return metag_pmu->name instead of metag_pmu->pmu.name (which
      is changed to "meta2").
      
      Signed-off-by: default avatarJames Hogan <james.hogan@imgtec.com>
      Cc: Peter Zijlstra <a.p.zijlstra@chello.nl>
      Cc: Paul Mackerras <paulus@samba.org>
      Cc: Ingo Molnar <mingo@redhat.com>
      Cc: Arnaldo Carvalho de Melo <acme@ghostprotocols.net>
      Cc: Robert Richter <rric@kernel.org>
      Cc: oprofile-list@lists.sf.net
      f27086f5
    • James Hogan's avatar
      metag: perf: don't reset TXTACTCYC · 1fb4dc5c
      James Hogan authored
      
      
      The thread active cycle counter TXTACTCYC is used in __delay so it
      shouldn't really be reset to zero by perf. Fix perf to just read the
      value, and instead of clearing it, record the prev_count value in
      enable_counter so that the delta calculations know about the previous
      value.
      
      Signed-off-by: default avatarJames Hogan <james.hogan@imgtec.com>
      Cc: Peter Zijlstra <a.p.zijlstra@chello.nl>
      Cc: Paul Mackerras <paulus@samba.org>
      Cc: Ingo Molnar <mingo@redhat.com>
      Cc: Arnaldo Carvalho de Melo <acme@ghostprotocols.net>
      1fb4dc5c
    • James Hogan's avatar
      metag: perf: use hard_processor_id() to get thread · 9344de1b
      James Hogan authored
      
      
      Use hard_processor_id() to get the current thread number rather than
      get_cpu() and the hardware thread mapping. There was no matching
      put_cpu(), and in any case this should be slightly more efficient.
      
      Signed-off-by: default avatarJames Hogan <james.hogan@imgtec.com>
      Cc: Peter Zijlstra <a.p.zijlstra@chello.nl>
      Cc: Paul Mackerras <paulus@samba.org>
      Cc: Ingo Molnar <mingo@redhat.com>
      Cc: Arnaldo Carvalho de Melo <acme@ghostprotocols.net>
      9344de1b
    • James Hogan's avatar
      metag: perf: fix frequency sampling (dynamic period) · 2033dc54
      James Hogan authored
      
      
      Frequency sampling mode dynamically adjusts the sample period so as to
      hit a particular frequency of samples. The sample period starts at just
      1 and then gets increased if the interrupt rate is too high. This
      changed sample period needs handling in metag_pmu_event_set_period to
      update period_left (as the ARM equivalent does). The calculated delta
      also needs subtracting from period_left in metag_pmu_event_update in
      order to hit the conditional blocks in metag_pmu_event_set_period which
      update last_period (which is used in the dynamic sampling period
      calculation).
      
      Signed-off-by: default avatarJames Hogan <james.hogan@imgtec.com>
      Cc: Peter Zijlstra <a.p.zijlstra@chello.nl>
      Cc: Paul Mackerras <paulus@samba.org>
      Cc: Ingo Molnar <mingo@redhat.com>
      Cc: Arnaldo Carvalho de Melo <acme@ghostprotocols.net>
      2033dc54
    • James Hogan's avatar
      metag: perf: add missing prev_count updates · c6ac1e6e
      James Hogan authored
      
      
      The prev_count needs setting when changing the counter value, otherwise
      the calculated delta will be wrong, which for frequency sampling
      (dynamic period sampling) results in sampling at too high a frequency.
      
      For non-interrupting performance counters it should also be cleared when
      enabling the counter since the write to the PERF_COUNT register will
      clear the perf counter.
      
      This also includes a minor change to remove the u64 cast from the
      metag_pmu->write() call as metag_pmu->write() takes a u32 anyway, and in
      any case GCC is smart enough to optimise away the cast.
      
      Signed-off-by: default avatarJames Hogan <james.hogan@imgtec.com>
      Cc: Peter Zijlstra <a.p.zijlstra@chello.nl>
      Cc: Paul Mackerras <paulus@samba.org>
      Cc: Ingo Molnar <mingo@redhat.com>
      Cc: Arnaldo Carvalho de Melo <acme@ghostprotocols.net>
      c6ac1e6e
    • James Hogan's avatar
      metag: perf: fixes for interrupting perf counters · db59932f
      James Hogan authored
      
      
      The overflow handler needs to read modify write when re-enabling the
      counter so as not to change the counter value as it may have been
      changed to ready the next interrupt on overflow. Similarly for
      interrupting counters metag_pmu_enable_counter needs to leave the
      counter value unchanged rather than resetting it to zero.
      
      Signed-off-by: default avatarJames Hogan <james.hogan@imgtec.com>
      Cc: Peter Zijlstra <a.p.zijlstra@chello.nl>
      Cc: Paul Mackerras <paulus@samba.org>
      Cc: Ingo Molnar <mingo@redhat.com>
      Cc: Arnaldo Carvalho de Melo <acme@ghostprotocols.net>
      db59932f
    • James Hogan's avatar
      metag: perf: fix wrap handling in delta calculation · c43ca04b
      James Hogan authored
      
      
      When calculating the delta, mask with MAX_PERIOD (24 bits) to handle
      wrapping, which particularly happens with periodic sampling since the
      value is intentionally set so that it will overflow soon.
      
      Signed-off-by: default avatarJames Hogan <james.hogan@imgtec.com>
      Cc: Peter Zijlstra <a.p.zijlstra@chello.nl>
      Cc: Paul Mackerras <paulus@samba.org>
      Cc: Ingo Molnar <mingo@redhat.com>
      Cc: Arnaldo Carvalho de Melo <acme@ghostprotocols.net>
      c43ca04b
    • James Hogan's avatar
      metag: perf: fix core internal / perf channel mux · 3424dabb
      James Hogan authored
      
      
      The value written to the PERF_ICOREx or PERF_CHANx register to select
      the performance events for the core internal and perf channel events was
      (tmp & 0x0f), but tmp was set to (config & 0xf0) so it would always be
      0. Correct it to use config instead of tmp.
      
      Signed-off-by: default avatarJames Hogan <james.hogan@imgtec.com>
      Cc: Peter Zijlstra <a.p.zijlstra@chello.nl>
      Cc: Paul Mackerras <paulus@samba.org>
      Cc: Ingo Molnar <mingo@redhat.com>
      Cc: Arnaldo Carvalho de Melo <acme@ghostprotocols.net>
      3424dabb
  5. Mar 11, 2013
  6. Mar 10, 2013
    • Linus Torvalds's avatar
      Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/ebiederm/user-namespace · 72932611
      Linus Torvalds authored
      Pull namespace bugfixes from Eric Biederman:
       "This is three simple fixes against 3.9-rc1.  I have tested each of
        these fixes and verified they work correctly.
      
        The userns oops in key_change_session_keyring and the BUG_ON triggered
        by proc_ns_follow_link were found by Dave Jones.
      
        I am including the enhancement for mount to only trigger requests of
        filesystem modules here instead of delaying this for the 3.10 merge
        window because it is both trivial and the kind of change that tends to
        bit-rot if left untouched for two months."
      
      * 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/ebiederm/user-namespace:
        proc: Use nd_jump_link in proc_ns_follow_link
        fs: Limit sys_mount to only request filesystem modules (Part 2).
        fs: Limit sys_mount to only request filesystem modules.
        userns: Stop oopsing in key_change_session_keyring
      72932611
    • Linus Torvalds's avatar
      Atmel MXT touchscreen: increase reset timeouts · 8343bce1
      Linus Torvalds authored
      
      
      There is a more complete atmel patch-series out by Nick Dyer that fixes
      this and other things, but in the meantime this is the minimal thing to
      get the touchscreen going on (at least my) Pixel Chromebook.
      
      Not that I want my dirty fingers near that beautiful screen, but it
      seems that a non-initialized touchscreen will also end up being a
      constant wakeup source, so you have to disable it to go to sleep.  And
      it's easier to just fix the initialization sequence.
      
      Signed-off-by: default avatarLinus Torvalds <torvalds@linux-foundation.org>
      8343bce1
  7. Mar 09, 2013