- Jan 31, 2023
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Arnd Bergmann authored
Merge tag 'samsung-dt-6.3' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into arm/dt Samsung DTS ARM changes for v6.3 1. Big cleanup and rework towards achieving zero-warning of dtbs_check and dtc W=1: - align node names with the bindings, - drop or correct incorrect properties in several boards, - correct HDMI bridge ports nodes on Exynos4412 Midas, - add dummy regulator supplies when necessary to fullfil bindings requirements, - use lowercase hex, - move non-MMIO exynos-bus nodes out of soc node, - add unit address to USB DWC3 nodes. 2. Correct Exynos5420 MIPI DSI and phy compatibles. 3. Correct Exynos4210 and Exynos4412 HDMI phy compatibles. 4. Add Samsung Galaxy S5 (SM-G900H) board. * tag 'samsung-dt-6.3' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux: (27 commits) ARM: dts: exynos: add unit address to DWC3 node wrapper in Exynos54xx ARM: dts: exynos: add unit address to DWC3 node wrapper in Exynos5250 ARM: dts: exynos: move exynos-bus nodes out of soc in Exynos4412 ARM: dts: exynos: move exynos-bus nodes out of soc in Exynos4210 ARM: dts: exynos: move exynos-bus nodes out of soc in Exynos3250 ARM: dts: exynos: move exynos-bus nodes out of soc in Exynos5420 ARM: dts: exynos: use lowercase hex addresses ARM: dts: exynos: use generic node names for phy ARM: dts: exynos: correct HDMI phy compatible in Exynos4 ARM: dts: exynos: Add Samsung Galaxy S5 (SM-G900H) board dt-bindings: arm: samsung: Add compatible for Samsung Galaxy S5 (SM-G900H) ARM: dts: exynos: Use Exynos5422 compatible for the DSI controller ARM: dts: exynos: Use Exynos5420 compatible for the MIPI video phy ARM: dts: exynos: correct HSI2C properties in Exynos5410 Odroid XU ARM: dts: exynos: correct HS200 property in Exynos5260 ARM: dts: exynos: correct SATA clocks in Exynos5250 ARM: dts: exynos: align HSOTG/USB node names ARM: dts: exynos: add backlight supply in P4 Note ARM: dts: exynos: add panel supply in Tiny4412 ARM: dts: exynos: add ports in HDMI bridge in Exynos4412 Midas ... Link: https://lore.kernel.org/r/20230129143944.5104-1-krzysztof.kozlowski@linaro.org Signed-off-by:
Arnd Bergmann <arnd@arndb.de>
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https://github.com/Broadcom/stblinuxArnd Bergmann authored
This pull request contains Broadcom ARM64 SoCs Device Tree updates for 6.3, please pull the following: - Krzysztof aligns the SMMMU Device Tree nodes to use the desired regular expression matched by the dtschema and he also removes the deprecated "device_type" property for serial node(s) * tag 'arm-soc/for-6.3/devicetree-arm64' of https://github.com/Broadcom/stblinux: arm64: dts: broadcom: drop deprecated serial device_type arm64: dts: broadcom: align SMMU node names with DT schema Link: https://lore.kernel.org/r/20230128193834.1628831-1-f.fainelli@gmail.com Signed-off-by:
Arnd Bergmann <arnd@arndb.de>
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https://github.com/Broadcom/stblinuxArnd Bergmann authored
This pull request contains Broadcom ARM SoCs Device Tree updates for 6.3, please pull the following: - Krzysztof aligns the various Broadcom SoCs DTS UART nodes with the binding convention to use "serial" * tag 'arm-soc/for-6.3/devicetree' of https://github.com/Broadcom/stblinux: ARM: dts: broadcom: align UART node name with bindings Link: https://lore.kernel.org/r/20230128193829.1628773-1-f.fainelli@gmail.com Signed-off-by:
Arnd Bergmann <arnd@arndb.de>
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Arnd Bergmann authored
Merge tag 'sunxi-dt-for-6.3-1' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into arm/dt - introduce Allwinner D1 DTSI - add boards: Dongshan Nezha STU, MangoPi MQ (Pro), Sipeed Lichee RV, Nezha - add D1 power controller node - Add SATA regulator to Bananapi M3 - fix regulator reference for nanopi-duo2 - fix GPIO node names - align HDMI CEC node name for h3-beelink-x2 - add DPHY interrupt to A64 and A33 * tag 'sunxi-dt-for-6.3-1' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux : riscv: dts: allwinner: d1: Add power controller node riscv: Add the Allwinner SoC family Kconfig option riscv: dts: allwinner: Add Dongshan Nezha STU devicetree riscv: dts: allwinner: Add MangoPi MQ Pro devicetree riscv: dts: allwinner: Add Sipeed Lichee RV devicetrees riscv: dts: allwinner: Add Allwinner D1 Nezha devicetree riscv: dts: allwinner: Add MangoPi MQ devicetree riscv: dts: allwinner: Add the D1/D1s SoC devicetree dt-bindings: riscv: Add Allwinner D1/D1s board compatibles dt-bindings: vendor-prefixes: Add Allwinner D1/D1s board vendors MAINTAINERS: Match the sun20i family of Allwinner SoCs ARM: dts: sun8i: a83t: bananapi-m3: describe SATA disk regulator ARM: dts: sun8i: nanopi-duo2: Fix regulator GPIO reference ARM: dts: sunxi: Fix GPIO LED node names ARM: dts: sun8i: h3-beelink-x2: align HDMI CEC node names with dtschema arm64: dts: allwinner: a64: Add DPHY interrupt ARM: dts: sun8i: a33: Add DPHY interrupt Signed-off-by:
Arnd Bergmann <arnd@arndb.de>
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Arnd Bergmann authored
Merge tag 'tegra-for-6.3-arm64-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/dt arm64: tegra: Device tree changes for v6.3-rc1 There are two big changes in this: one is to bump the #address-cells and the #size-cells properties to 2 so that bus address translations work correctly and another to sort nodes according to a scheme that we've been trying to follow, but where some inconsistencies have accumulated over the years. As for the rest, this adds mostly new things on Tegra234, such as USB host and device support and identification EEPROMs found on Jetson AGX Orin. Some cleanups are also included, such as the removal of unneeded properties or duplicated nodes. * tag 'tegra-for-6.3-arm64-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux: arm64: tegra: Drop I2C iommus and dma-coherent properties arm64: tegra: Mark host1x as dma-coherent on Tegra194/234 arm64: tegra: Populate the XUDC node for Tegra234 arm64: tegra: Add dma-coherent property for Tegra194 XUDC arm64: tegra: Populate Jetson AGX Orin EEPROMs arm64: tegra: Populate address/size cells for Tegra234 I2C arm64: tegra: Enable XUSB host function on Jetson AGX Orin arm64: tegra: Sort nodes by unit-address, then alphabetically arm64: tegra: Bump #address-cells and #size-cells arm64: tegra: Sort includes arm64: tegra: Fix duplicate regulator on Jetson TX1 arm64: tegra: Fix typo in gpio-ranges property Link: https://lore.kernel.org/r/20230127163719.460954-3-thierry.reding@gmail.com Signed-off-by:
Arnd Bergmann <arnd@arndb.de>
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Arnd Bergmann authored
Merge tag 'tegra-for-6.3-arm-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/dt ARM: tegra: Device tree changes for v6.3-rc1 Just a single patch to properly sort nodes and make the DTS files easier to read. * tag 'tegra-for-6.3-arm-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux: ARM: tegra: Sort nodes by unit-address, then alphabetically Link: https://lore.kernel.org/r/20230127163719.460954-2-thierry.reding@gmail.com Signed-off-by:
Arnd Bergmann <arnd@arndb.de>
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Arnd Bergmann authored
Merge tag 'tegra-for-6.3-dt-bindings' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/dt dt-bindings: Changes for v6.3-rc1 Device tree files for 64-bit ARM Tegra SoCs have recently had to bump the #address-cells and #size-cells to 2 in order to support bus address translations across the entire device tree hierarchy. Explicitly allow this in DT schemas to prevent validation errors. * tag 'tegra-for-6.3-dt-bindings' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux: dt-bindings: tegra: Allow #{address,size}-cells = <2> Link: https://lore.kernel.org/r/20230127163719.460954-1-thierry.reding@gmail.com Signed-off-by:
Arnd Bergmann <arnd@arndb.de>
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Arnd Bergmann authored
Merge tag 'renesas-dts-for-v6.3-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into arm/dt Renesas DT updates for v6.3 (take two) - High Performance mode (1.8 GHz) support for the Cortex-A76 CPU cores on R-Car V4H, - GPIO interrupt support for the RZ/G2UL SoC and the RZ/G2UL SMARC EVK development board, - USB Function support for the RZ/N1D SoC, - Generic Sound Card driver examples for the Renesas R-Car Starter Kit Premier/Pro and Shimafugi Kingfisher development board stack, - Universal Flash Storage support for the Renesas Spider development board, - External Power Sequence Controller (PWC) support for the RZ/V2M SoC and the RZ/V2M Evaluation Kit 2.0, - IOMMU support for MMC on the R-Car S4-8 SoC, - Miscellaneous fixes and improvements. * tag 'renesas-dts-for-v6.3-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel: (25 commits) arm64: dts: renesas: r8a779f0: Add iommus to MMC node arm64: dts: renesas: v2mevk2: Add PWC support arm64: dts: renesas: r9a09g011: Add PWC support arm64: dts: renesas: r9a09g011: Reword ethernet status arm64: dts: renesas: r8a774[be]1-beacon: Sync aliases with RZ/G2M arm64: dts: renesas: beacon-renesom: Fix audio clock rate arm64: dts: renesas: beacon-renesom: Update Ethernet PHY ID arm64: dts: renesas: beacon-renesom: Fix gpio expander reference arm64: dts: renesas: spider-cpu: Enable UFS device arm64: dts: renesas: Add ulcb{-kf} Simple Audio Card MIX + TDM Split dtsi arm64: dts: renesas: Add ulcb{-kf} Audio Graph Card MIX + TDM Split dtsi arm64: dts: renesas: Add ulcb{-kf} Audio Graph Card2 MIX + TDM Split dtsi arm64: dts: renesas: Add ulcb{-kf} Simple Audio Card dtsi arm64: dts: renesas: Add ulcb{-kf} Audio Graph Card2 dtsi arm64: dts: renesas: Add ulcb{-kf} Audio Graph Card dtsi arm64: dts: renesas: #sound-dai-cells is used when simple-card ARM: dts: renesas: #sound-dai-cells is used when simple-card arm64: dts: renesas: eagle: Add SCIF_CLK support ARM: dts: r9a06g032: Add the USBF controller node arm64: dts: renesas: rzg2ul-smarc-som: Add PHY interrupt support for ETH{0/1} ... Link: https://lore.kernel.org/r/cover.1674815099.git.geert+renesas@glider.be Signed-off-by:
Arnd Bergmann <arnd@arndb.de>
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Arnd Bergmann authored
Merge tag 'renesas-dt-bindings-for-v6.3-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into arm/dt Renesas DT binding updates for v6.3 - Document support for the Renesas RZ/V2M External Power Sequence Controller (PWC). * tag 'renesas-dt-bindings-for-v6.3-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel: dt-bindings: soc: renesas: Add RZ/V2M PWC Link: https://lore.kernel.org/r/cover.1674815097.git.geert+renesas@glider.be Signed-off-by:
Arnd Bergmann <arnd@arndb.de>
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Arnd Bergmann authored
Merge tag 'qcom-arm64-for-6.3' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into arm/dt Qualcomm ARM64 Devicetree updates for v6.3 This introduces support for the new Snapdragon 8 Gen 2 (SM8550) platform. In addition to the adding support for the MTP on this platform, support the following devices is introduced: - GPLUS FL8005A - Google Zombie with LTE and NVMe - Google Zombie with NVMe - Lenovo Tab P11 - Motorola G5 Plus - Motorola G7 Power - Motorola Moto G6 - Samsung Galaxy J5 (2016) - Samsung Galaxy Tab A 8.0 - Samsung Galaxy Tab A 9.7 - Xiaomi Mi A1 - Xiaomi Mi A2 Lite - Xiaomi Redmi 5 Plus - Xiaomi Redmi Note 4X On IPQ8074 the PCIe PHY register regions and PHY clock names are corrected. On MSM8916 DMA for the I2C controllers are introduced and blsp_dma is unconditionally enabled. Per-sensor calibration data is provided for the thermal sensor (tsens) block. The GPLUS FL8005A device is introduced and gains support for touchscreen and flash LED. An additional Samsung Galaxy J5 variant is added, and support is added for hall sensor and MUIC. Per-sensor calibration information is introduced for the thermal sensor on MSM8956 as well. On MSM8996, GPLL0 is added as a possible Kryo clock controller input, a carveout is added to get modem metadata out of System RAM. Missing bus clocks are added for agnoc2. SDHCI1 is enabled on the Sony Xperia Tone platform and USB is limited to high-speed, to make USB work. MSM8998 gains the same modem carveout as other platforms, and the description of the clock hierarchy is improved. On QCS404 the clock hierarchy description is improved, the CDSP PAS node is adjusted to match the binding and the thermal sensor (tsens) gains per-sensor calibration information. On SC7180 the Data Capture and Compare block is intorduced, and a carveout for the modem metadata is introduced, to get this out of System RAM. Pazquel360 gains touchscreen support, the regulator off-on-time is adjusted for the Trogdor eDP and touchscreen. Data lane and frequency properties are introduced for the DisplayPort links. SC7280 also gets Data Capture and Compare support, as well as the dedicated modem metadata region. Herobrine gains DP audio support. IPA description is updated so that it's only active on boards with a modem. On SC8280XP the display subsystem is introduced, currently with support for most of the DisplayPort controllers. GPR, SoundWire and LPASS is introduced, for audio support. Missing I2C and SPI controllers are introduced. Support for EDP is introduced for the CRD, the Lenovo ThinkPad X13s and the SA8295P ADP automotive board. The SA8540P Ride platform enables one i2c and pcie controllers. A CMA region is defined for the CRD and X13s, to avoid allocation issues from the NVMe support. Fairphone FP3 gains NFC support and the Sony Xperia Nile platform gains a description of simplefb. SDM670 gains QFPROM definition. SDM845 gains a carveout for the modem metadata and support for the Data Capture and Compare block is introduced. Lenovo Yoga C630 firmware paths are aligned with all other Qualcomm platforms. On SM6125 apss SMMU is introduced and streams are defined for USB and SDHCI controllers. GPI DMA description is introduced, as well as missing SPI and I2C serial engines. On Sony Xperia 10 IIa regulator definitions are improved, SDHCI2 is introduced, and I2C and related GPI DMA blocks are enabled. On SM6350 IPA is introduced. DDR and L3 scaling is introduced based on CPUfreq. Fairphone FP4, on SM7225 also has IPA enabled, and the Flash LED is enabled as well. On SM8150 the display subsystem is introduced, with clock controller, DPU and two DSI controllers. The Data Capture and Compare block is introduced. For the Sony Xperia Kumano platform, GPIO keys and NFC support is introduced. For SM8350 PCIe is introduced, as is the display subsystem with display clock controller, DPU and two DSI controllers. #interconnect-cells is changed to 2, to align with other platforms and allow for active-only votes. The display is enabled and the LT9611uxc found on the SM8350 Hardware Development Kit board is described, to provide HDMI output. On SM8450 the display subsystem is introduced, with DPU and two DSI controllers. GIC-ITS support is introduced for both PCIe0 and PCIe1. SPMI bus support is introduced and pmics are wired up across the various devices. The display subsystem is enabled and the LT9611uxc is described to provide HDMI output on the SM8450 Hardware Development Kit. On Sony Xperia Nagara platform, GPIO keys and GPIO line names are introduced. As is the SLG51000 PMIC and camera regulators are defined. Support for SM8550 is introduced, with support for storage, USB, remoteprocs, PCIe, low-speed buses, crypto and display subsystem. These blocks are enabled on the MTP. Lastly, the work continue to align Devicetree source with bindings across all platforms. * tag 'qcom-arm64-for-6.3' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (320 commits) arm64: dts: qcom: sc7280: Add a carveout for modem metadata arm64: dts: qcom: sc7180: Add a carveout for modem metadata arm64: dts: qcom: sdm845: Add a carveout for modem metadata arm64: dts: qcom: msm8998: Add a carveout for modem metadata arm64: dts: qcom: msm8996: Add a carveout for modem metadata arm64: dts: qcom: ipq8074: correct PCIe QMP PHY output clock names arm64: dts: qcom: ipq8074: fix Gen3 PCIe node arm64: dts: qcom: ipq8074: set Gen2 PCIe pcie max-link-speed arm64: dts: qcom: ipq8074: correct Gen2 PCIe ranges arm64: dts: qcom: ipq8074: fix Gen3 PCIe QMP PHY arm64: dts: qcom: ipq8074: fix Gen2 PCIe QMP PHY arm64: dts: qcom: sdm845-db845c: drop label from I2C controllers arm64: dts: qcom: msm8996: support using GPLL0 as kryocc input arm64: dts: qcom: sm8450: Allow both GIC-ITS and internal MSI controller arm64: dts: qcom: sm8550-mtp: Add USB PHYs and HC nodes arm64: dts: qcom: sm8550: Add USB PHYs and controller nodes arm64: dts: qcom: sm8250: drop unused properties from tx-macro arm64: dts: qcom: sm8250: drop unused clock-frequency from wsa-macro arm64: dts: qcom: align OPP table node name with DT schema arm64: dts: qcom: rename mdp nodes to display-controller ... Link: https://lore.kernel.org/r/20230126202528.3691539-1-andersson@kernel.org Signed-off-by:
Arnd Bergmann <arnd@arndb.de>
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Arnd Bergmann authored
Merge tag 'riscv-dt-for-v6.3-mw0' of https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux into arm/dt RISC-V Devicetrees for v6.3-mw0 Microchip: A vendor prefix for Aldec and both a binding and Devicetree for the Aldec TySoM devkit for PolarFire SoC. This Devicetree corresponds to what they are shipping in the SDK for rev2 boards. StarFive: Just the binding for the new StarFive JH7110 SoC and its first-party SDC the VisionFive 2. Other: I was expecting the Devicetree for the aforementioned board to be ready for this window, as the pinctrl driver had seem some review prior to v6.2 and both it & the base clock drivers are heavily based on the existing drivers for the JH7110. That didn't come to be.. Christmas, the RISC-V Summit in December and the Lunar New Year all playing a part perhaps. Because of that, both Palmer and I have the Kconfig.socs work in our branches, although in hindsight it probably wasn't needed here as I only added the TySoM Devicetree & the conflict would've been trivial. Signed-off-by:
Conor Dooley <conor.dooley@microchip.com> * tag 'riscv-dt-for-v6.3-mw0' of https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux: riscv: dts: microchip: add the Aldec TySoM's devicetree dt-bindings: riscv: microchip: document the Aldec TySoM dt-bindings: vendor-prefixes: Add entry for Aldec RISC-V: stop directly selecting drivers for SOC_CANAAN RISC-V: stop selecting SiFive clock and serial drivers directly RISC-V: stop selecting the PolarFire SoC clock driver RISC-V: kbuild: convert all use of SOC_FOO to ARCH_FOO RISC-V: kconfig.socs: convert usage of SOC_CANAAN to ARCH_CANAAN RISC-V: introduce ARCH_FOO kconfig aliases for SOC_FOO symbols dt-bindings: riscv: Add StarFive JH7110 SoC and VisionFive 2 board Link: https://lore.kernel.org/r/Y9LP+Za1h0fkBa58@spud Signed-off-by:
Arnd Bergmann <arnd@arndb.de>
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Arnd Bergmann authored
Merge tag 'qcom-dts-for-6.3' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into arm/dt Qualcomm ARM DT updates for v6.3 This introduces support for Acer Iconia Talk S A1-724 The Samsung Galaxy Tab 4 10.1 gains ADSP and backlight support. The Xperia Z2 Tablet gets charging enabled and the touchscreen is given a little bit more time to start up. APQ8064 and MSM8974 gains improvements in clock hierarchy. APQ8064 thermal sensor (tsens) driver gains per-censor calibration data. Lastly a set of patches that improves DT binding compliance. * tag 'qcom-dts-for-6.3' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (50 commits) ARM: dts: qcom: msm8226: add RPMCC node ARM: dts: qcom: apq8084: add clocks and clock-names to gcc device ARM: dts: qcom: align OPP table node name with DT schema ARM: dts: qcom: rename mdp nodes to display-controller ARM: dts: qcom-msm8974: rename mdss node to display-subsystem ARM: dts: qcom-msm8974: add SoC specific compat string to mdp5 node dt-bindings: qcom: Document samsung,gt58 and gt510 dt-bindings: qcom: Document bindings for msm8916-samsung-j5x ARM: dts: qcom: use qcom,gsi-loader for IPA ARM: dts: qcom-apq8084: specify per-sensor calibration cells ARM: dts: qcom-msm8974: specify per-sensor calibration cells dt-bindings: arm: qcom: Document MSM8939 SoC binding ARM: dts: qcom: msm8974: add xo clock to rpm clock controller dt-bindings: qcom: Document msm8916-gplus-fl8005a dt-bindings: vendor-prefixes: Add GPLUS ARM: dts: qcom: apq8026-samsung-matisse-wifi: Add display backlight dt-bindings: arm: qcom: Add SM6115(P) and Lenovo Tab P11 ARM: dts: qcom: add missing space before { dt-bindings: arm: qcom: add board-id/msm-id for MSM8956, SDM636 and SM4250 dt-bindings: arm: qcom: Add zombie with NVMe ... Link: https://lore.kernel.org/r/20230126174725.3681745-1-andersson@kernel.org Signed-off-by:
Arnd Bergmann <arnd@arndb.de>
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- Jan 29, 2023
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Krzysztof Kozlowski authored
Neither simple-bus bindings nor dtc W=1 accept device nodes in soc@ node which do not have unit address. Therefore usethe address space of child device (actual DWC3 Controller) as the wrapper's address to fix: exynos5422-odroidhc1.dtb: soc: usb3-0: {'compatible': ['samsung,exynos5250-dwusb3'], ... } should not be valid under {'type': 'object'} exynos54xx.dtsi:145.21-159.5: Warning (simple_bus_reg): /soc/usb3-0: missing or empty reg/ranges property Tested-by:Marek Szyprowski <m.szyprowski@samsung.com> Link: https://lore.kernel.org/r/20230127212713.267014-2-krzysztof.kozlowski@linaro.org Signed-off-by:
Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
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Krzysztof Kozlowski authored
Neither simple-bus bindings nor dtc W=1 accept device nodes in soc@ node which do not have unit address. Therefore usethe address space of child device (actual DWC3 Controller) as the wrapper's address to fix: exynos5250-smdk5250.dtb: soc: usb3: {'compatible': ['samsung,exynos5250-dwusb3'], ... } should not be valid under {'type': 'object'} exynos5250.dtsi:638.16-653.5: Warning (simple_bus_reg): /soc/usb3: missing or empty reg/ranges property Tested-by:Marek Szyprowski <m.szyprowski@samsung.com> Link: https://lore.kernel.org/r/20230127212713.267014-1-krzysztof.kozlowski@linaro.org Signed-off-by:
Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
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Krzysztof Kozlowski authored
The soc node is supposed to have only device nodes with MMIO addresses, as reported by dtc W=1: exynos4412.dtsi:407.20-413.5: Warning (simple_bus_reg): /soc/bus-acp: missing or empty reg/ranges property and dtbs_check: exynos4412-i9300.dtb: soc: bus-acp: {'compatible': ['samsung,exynos-bus'], 'clocks': [[7, 456]], 'clock-names': ['bus'], 'operating-points-v2': [[132]], 'status': ['okay'], 'devfreq': [[117]]} should not be valid under {'type': 'object'} Move the bus nodes and their OPP tables out of SoC to fix this. Re-order them alphabetically while moving and put some of the OPP tables in device nodes (if they are not shared). Link: https://lore.kernel.org/r/20230125094513.155063-5-krzysztof.kozlowski@linaro.org Signed-off-by:Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
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Krzysztof Kozlowski authored
The soc node is supposed to have only device nodes with MMIO addresses, as reported by dtc W=1: exynos4210.dtsi:218.20-224.5: Warning (simple_bus_reg): /soc/bus-dmc: missing or empty reg/ranges property and dtbs_check: exynos4210-i9100.dtb: soc: bus-dmc: {'compatible': ['samsung,exynos-bus'], 'clocks': [[5, 457]], 'clock-names': ['bus'], 'operating-points-v2': [[82]], 'status': ['disabled']} should not be valid under {'type': 'object'} Move the bus nodes and their OPP tables out of SoC to fix this. Re-order them alphabetically while moving and put some of the OPP tables in device nodes (if they are not shared). Link: https://lore.kernel.org/r/20230125094513.155063-4-krzysztof.kozlowski@linaro.org Signed-off-by:Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
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Krzysztof Kozlowski authored
The soc node is supposed to have only device nodes with MMIO addresses, as reported by dtc W=1: exynos3250.dtsi:775.20-781.5: Warning (simple_bus_reg): /soc/bus-dmc: missing or empty reg/ranges property and dtbs_check: exynos3250-artik5-eval.dtb: soc: bus-dmc: {'compatible': ['samsung,exynos-bus'], 'clocks': [[67, 16]], 'clock-names': ['bus'], 'operating-points-v2': [[68]], 'status': ['disabled']} should not be valid under {'type': 'object'} Move the bus nodes and their OPP tables out of SoC to fix this. Re-order them alphabetically while moving and put some of the OPP tables in device nodes (if they are not shared). Link: https://lore.kernel.org/r/20230125094513.155063-3-krzysztof.kozlowski@linaro.org Signed-off-by:Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
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Krzysztof Kozlowski authored
The soc node is supposed to have only device nodes with MMIO addresses, as reported by dtc W=1: arch/arm/boot/dts/exynos5420.dtsi:1070.24-1075.5: Warning (simple_bus_reg): /soc/bus-wcore: missing or empty reg/ranges property and dtbs_check: exynos5420-arndale-octa.dtb: soc: bus-wcore: {'compatible': ['samsung,exynos-bus'], 'clocks': [[2, 769]], 'clock-names': ['bus'], 'status': ['disabled']} should not be valid under {'type': 'object'} Move the bus nodes and their OPP tables out of SoC to fix this. Re-order them alphabetically while moving and put some of the OPP tables in device nodes (if they are not shared). Link: https://lore.kernel.org/r/20230125094513.155063-2-krzysztof.kozlowski@linaro.org Signed-off-by:Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
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- Jan 28, 2023
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Samuel Holland authored
The Allwinner D1 family of SoCs contain a PPU power domain controller separate from the PRCM. It can power down the video engine and DSP, and it contains special logic for hardware-assisted CPU idle. Signed-off-by:
Samuel Holland <samuel@sholland.org> Acked-by:
Jernej Skrabec <jernej.skrabec@gmail.com> Link: https://lore.kernel.org/r/20230126063419.15971-4-samuel@sholland.org Signed-off-by:
Jernej Skrabec <jernej.skrabec@gmail.com>
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Samuel Holland authored
Allwinner manufactures the sunxi family of application processors. This includes the "sun8i" series of ARMv7 SoCs, the "sun50i" series of ARMv8 SoCs, and now the "sun20i" series of 64-bit RISC-V SoCs. The first SoC in the sun20i series is D1, containing a single T-HEAD C906 core. D1s is a low-pin-count variant of D1 with co-packaged DRAM. Most peripherals are shared across the entire chip family. In fact, the ARMv7 T113 SoC is pin-compatible and almost entirely register-compatible with the D1s. This means many existing device drivers can be reused. To facilitate this reuse, name the symbol ARCH_SUNXI, since that is what the existing drivers have as their dependency. Acked-by:
Conor Dooley <conor.dooley@microchip.com> Acked-by:
Palmer Dabbelt <palmer@rivosinc.com> Reviewed-by:
Guo Ren <guoren@kernel.org> Reviewed-by:
Heiko Stuebner <heiko@sntech.de> Tested-by:
Heiko Stuebner <heiko@sntech.de> Signed-off-by:
Samuel Holland <samuel@sholland.org> Link: https://lore.kernel.org/r/20230126045738.47903-11-samuel@sholland.org Signed-off-by:
Jernej Skrabec <jernej.skrabec@gmail.com>
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Samuel Holland authored
The 100ask Dongshan Nezha STU is a system-on-module that can be used standalone or with a carrier board. The SoM provides gigabit Ethernet, HDMI, a USB peripheral port, and WiFi/Bluetooth via an RTL8723DS chip. The "DIY" carrier board exposes almost every pin from the D1 SoC to 0.1" headers, but contains no digital circuitry, so it does not have its own devicetree. Acked-by:
Jernej Skrabec <jernej.skrabec@gmail.com> Acked-by:
Palmer Dabbelt <palmer@rivosinc.com> Reviewed-by:
Guo Ren <guoren@kernel.org> Signed-off-by:
Samuel Holland <samuel@sholland.org> Acked-by:
Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/20230126045738.47903-10-samuel@sholland.org Signed-off-by:
Jernej Skrabec <jernej.skrabec@gmail.com>
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Samuel Holland authored
The MangoPi MQ Pro is a tiny SBC with a layout compatible to the Raspberry Pi Zero. It includes the Allwinner D1 SoC, 512M or 1G of DDR3, and an RTL8723DS-based WiFi/Bluetooth module. The board also exposes GPIO Port E via a connector on the end of the board, which can support either a camera or an RMII Ethernet PHY. The additional regulators supply that connector. Acked-by:
Jernej Skrabec <jernej.skrabec@gmail.com> Acked-by:
Palmer Dabbelt <palmer@rivosinc.com> Reviewed-by:
Guo Ren <guoren@kernel.org> Signed-off-by:
Samuel Holland <samuel@sholland.org> Acked-by:
Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/20230126045738.47903-9-samuel@sholland.org Signed-off-by:
Jernej Skrabec <jernej.skrabec@gmail.com>
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Samuel Holland authored
Sipeed manufactures a "Lichee RV" system-on-module, which provides a minimal working system on its own, as well as a few carrier boards. The "Dock" board provides audio, USB, and WiFi. The "86 Panel" additionally provides 100M Ethernet and a built-in display panel. The 86 Panel repurposes the USB ID and VBUS detection GPIOs for its RGB panel interface, since the USB OTG port is inaccessible inside the case. Co-developed-by:
Jisheng Zhang <jszhang@kernel.org> Signed-off-by:
Jisheng Zhang <jszhang@kernel.org> Acked-by:
Jernej Skrabec <jernej.skrabec@gmail.com> Acked-by:
Palmer Dabbelt <palmer@rivosinc.com> Signed-off-by:
Samuel Holland <samuel@sholland.org> Acked-by:
Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/20230126045738.47903-8-samuel@sholland.org Signed-off-by:
Jernej Skrabec <jernej.skrabec@gmail.com>
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Samuel Holland authored
"D1 Nezha" is Allwinner's first-party development board for the D1 SoC. It was shipped with 512M, 1G, or 2G of DDR3. It supports onboard audio, HDMI, gigabit Ethernet, WiFi and Bluetooth, USB 2.0 host and OTG ports, plus low-speed I/O from the SoC and a GPIO expander chip. Acked-by:
Jernej Skrabec <jernej.skrabec@gmail.com> Acked-by:
Palmer Dabbelt <palmer@rivosinc.com> Reviewed-by:
Guo Ren <guoren@kernel.org> Reviewed-by:
Heiko Stuebner <heiko@sntech.de> Tested-by:
Conor Dooley <conor.dooley@microchip.com> Tested-by:
Heiko Stuebner <heiko@sntech.de> Signed-off-by:
Samuel Holland <samuel@sholland.org> Acked-by:
Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/20230126045738.47903-7-samuel@sholland.org Signed-off-by:
Jernej Skrabec <jernej.skrabec@gmail.com>
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Samuel Holland authored
The MangoPi MQ is a tiny SBC built around the Allwinner D1s. Its onboard peripherals include two USB Type-C ports (1 device, 1 host) and RTL8189FTV WLAN. A MangoPi MQ-R variant of the board also exists. The MQ-R has a different form factor, but the onboard peripherals are the same. Most D1 and D1s boards use a similar power tree, with the 1.8V rail powered by the SoC's internal LDOA, analog domains powered by ALDO, and the rest of the board powered by always-on fixed regulators. To avoid duplication, factor out the regulator information that is common across boards. The board also exposes GPIO Port E via a FPC connector, which can support either a camera or an RMII Ethernet PHY. The additional regulators supply that connector. Acked-by:
Jernej Skrabec <jernej.skrabec@gmail.com> Acked-by:
Palmer Dabbelt <palmer@rivosinc.com> Reviewed-by:
Guo Ren <guoren@kernel.org> Signed-off-by:
Samuel Holland <samuel@sholland.org> Acked-by:
Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/20230126045738.47903-6-samuel@sholland.org Signed-off-by:
Jernej Skrabec <jernej.skrabec@gmail.com>
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Samuel Holland authored
D1 (aka D1-H), D1s (aka F133), R528, and T113 are a family of SoCs based on a single die, or at a pair of dies derived from the same design. D1 and D1s contain a single T-HEAD Xuantie C906 CPU, whereas R528 and T113 contain a pair of Cortex-A7's. D1 and R528 are the full version of the chip with a BGA package, whereas D1s and T113 are low-pin-count QFP variants. Because the original design supported both ARM and RISC-V CPUs, some peripherals are duplicated. In addition, all variants except D1s contain a HiFi 4 DSP with its own set of peripherals. The devicetrees are organized to minimize duplication: - Common perhiperals are described in sunxi-d1s-t113.dtsi - DSP-related peripherals are described in sunxi-d1-t113.dtsi - RISC-V specific hardware is described in sun20i-d1s.dtsi - Functionality unique to the D1 variant is described in sun20i-d1.dtsi The SOC_PERIPHERAL_IRQ macro handles the different #interrupt-cells values between the ARM (GIC) and RISC-V (PLIC) versions of the SoC. Acked-by:
Jernej Skrabec <jernej.skrabec@gmail.com> Acked-by:
Palmer Dabbelt <palmer@rivosinc.com> Reviewed-by:
Andre Przywara <andre.przywara@arm.com> Reviewed-by:
Conor Dooley <conor.dooley@microchip.com> Reviewed-by:
Heiko Stuebner <heiko.stuebner@vrull.eu> Tested-by:
Heiko Stuebner <heiko.stuebner@vrull.eu> Signed-off-by:
Samuel Holland <samuel@sholland.org> Acked-by:
Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/20230126045738.47903-5-samuel@sholland.org Signed-off-by:
Jernej Skrabec <jernej.skrabec@gmail.com>
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Samuel Holland authored
Several SoMs and boards are available that feature the Allwinner D1 or D1s SoC. Document their compatible strings. Acked-by:
Palmer Dabbelt <palmer@rivosinc.com> Acked-by:
Rob Herring <robh@kernel.org> Reviewed-by:
Conor Dooley <conor.dooley@microchip.com> Reviewed-by:
Guo Ren <guoren@kernel.org> Reviewed-by:
Heiko Stuebner <heiko.stuebner@vrull.eu> Signed-off-by:
Samuel Holland <samuel@sholland.org> Acked-by:
Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/20230126045738.47903-4-samuel@sholland.org Signed-off-by:
Jernej Skrabec <jernej.skrabec@gmail.com>
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Samuel Holland authored
Some boards using the Allwinner D1 or D1s SoC are made by vendors not previously documented. Clockwork Tech LLC (https://www.clockworkpi.com/) manufactures the ClockworkPi and DevTerm boards. Beijing Widora Technology Co., Ltd. (https://mangopi.cc/ ) manufactures the MangoPi family of boards. Acked-by:
Palmer Dabbelt <palmer@rivosinc.com> Acked-by:
Rob Herring <robh@kernel.org> Reviewed-by:
Guo Ren <guoren@kernel.org> Reviewed-by:
Heiko Stuebner <heiko@sntech.de> Signed-off-by:
Samuel Holland <samuel@sholland.org> Acked-by:
Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/20230126045738.47903-3-samuel@sholland.org Signed-off-by:
Jernej Skrabec <jernej.skrabec@gmail.com>
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Samuel Holland authored
Allwinner sunxi SoCs with a RISC-V CPU use the sun20i designator. Match that pattern in addition to the designators for 32 and 64-bit ARM SoCs. Acked-by:
Jernej Skrabec <jernej.skrabec@gmail.com> Reviewed-by:
Guo Ren <guoren@kernel.org> Reviewed-by:
Heiko Stuebner <heiko@sntech.de> Signed-off-by:
Samuel Holland <samuel@sholland.org> Acked-by:
Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/20230126045738.47903-2-samuel@sholland.org Signed-off-by:
Jernej Skrabec <jernej.skrabec@gmail.com>
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Andre Przywara authored
The Bananapi-M3 has a SATA connector, driven by a USB-to-SATA bridge soldered on the board. The power for the SATA device is provided by a GPIO controlled regulator. Since the SATA device is behind USB, it has no DT node, so we never described this regulator. Instead U-Boot was turning this on in a rather hackish way, which we now want to get rid of. On top of that it seems fragile to leave this GPIO undescribed, as userland could claim it and turn the disk off. Add a fixed regulator, controlled by the PD25 GPIO, and mark it as always-on. This would mimic the current situation, but in a safer way, and would allow U-Boot to drop the CONFIG_SATAPWR enable hack. Signed-off-by:
Andre Przywara <andre.przywara@arm.com> Acked-by:
Samuel Holland <samuel@sholland.org> Link: https://lore.kernel.org/r/20230120012616.30960-1-andre.przywara@arm.com Signed-off-by:
Jernej Skrabec <jernej.skrabec@gmail.com>
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Samuel Holland authored
The property named in the schema is 'enable-gpios', not 'enable-gpio'. This makes no difference at runtime, because the regulator is marked as always-on, but it breaks validation. Fixes: 4701fc6e ("ARM: dts: sun8i: add FriendlyARM NanoPi Duo2") Reviewed-by:
Andre Przywara <andre.przywara@arm.com> Acked-by:
Jernej Skrabec <jernej.skrabec@gmail.com> Signed-off-by:
Samuel Holland <samuel@sholland.org> Link: https://lore.kernel.org/r/20221231225854.16320-2-samuel@sholland.org Signed-off-by:
Jernej Skrabec <jernej.skrabec@gmail.com>
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Samuel Holland authored
These board devicetrees fail to validate because the gpio-leds schema requires its child nodes to have "led" in the node name. Signed-off-by:
Samuel Holland <samuel@sholland.org> Reviewed-by:
Jernej Skrabec <jernej.skrabec@gmail.com> Reviewed-by:
Andre Przywara <andre.przywara@arm.com> Link: https://lore.kernel.org/r/20221231225854.16320-1-samuel@sholland.org Signed-off-by:
Jernej Skrabec <jernej.skrabec@gmail.com>
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Krzysztof Kozlowski authored
The bindings expect "cec" for HDMI CEC node. Signed-off-by:
Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Acked-by:
Jernej Skrabec <jernej.skrabec@gmail.com> Link: https://lore.kernel.org/r/20221204183341.139946-1-krzysztof.kozlowski@linaro.org Signed-off-by:
Jernej Skrabec <jernej.skrabec@gmail.com>
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Samuel Holland authored
The DPHY has an interrupt line which is shared with the DSI controller. Signed-off-by:
Samuel Holland <samuel@sholland.org> Link: https://lore.kernel.org/r/20221114022113.31694-4-samuel@sholland.org Signed-off-by:
Jernej Skrabec <jernej.skrabec@gmail.com>
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Samuel Holland authored
The DPHY has an interrupt line which is shared with the DSI controller. Signed-off-by:
Samuel Holland <samuel@sholland.org> Link: https://lore.kernel.org/r/20221114022113.31694-3-samuel@sholland.org Signed-off-by:
Jernej Skrabec <jernej.skrabec@gmail.com>
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Thierry Reding authored
Both 1 and 2 are valid values for #address-cells and #size-cells on the various busses specified in these bindings, so explicitly allow 2. Acked-by:
Rob Herring <robh@kernel.org> Signed-off-by:
Thierry Reding <treding@nvidia.com>
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Thierry Reding authored
Drop the iommus and dma-coherent properties for the I2C controller device tree nodes. These are only needed for the device tree nodes that represent the GPC DMA controller, since that is the device performing the direct memory accesses. Signed-off-by:Thierry Reding <treding@nvidia.com>
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- Jan 27, 2023
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Yoshihiro Shimoda authored
Add iommus property to the MMC node for r8a779f0. Signed-off-by:
Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Reviewed-by:
Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/20230123013448.1250991-3-yoshihiro.shimoda.uh@renesas.com Signed-off-by:
Geert Uytterhoeven <geert+renesas@glider.be>
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Fabrizio Castro authored
The RZ/V2M EVK uses the PWC IP to control external power supplies and the I/O voltage for the uSD card. This patch enables the PWC node, and it also enables the poweroff features since PWC is actually used to control the board power rails. Signed-off-by:
Fabrizio Castro <fabrizio.castro.jz@renesas.com> Reviewed-by:
Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/20230118144747.24968-3-fabrizio.castro.jz@renesas.com Signed-off-by:
Geert Uytterhoeven <geert+renesas@glider.be>
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Fabrizio Castro authored
The RZ/V2M SoC contains an External Power Sequence Controller (PWC) module. This module provides an external power supply on/off sequence, on/off signal for the LPDDR4 core power supply, General Purpose Outputs, and key input signals. This patch adds PWC support to the SoC specific device tree. Signed-off-by:
Fabrizio Castro <fabrizio.castro.jz@renesas.com> Reviewed-by:
Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/20230118144747.24968-2-fabrizio.castro.jz@renesas.com Signed-off-by:
Geert Uytterhoeven <geert+renesas@glider.be>
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