Commit f6b4b4a1 authored by Evan Quan's avatar Evan Quan Committed by Alex Deucher
Browse files

drm/amd/powerplay: correct the APIs' naming 



'UVD' is a HW engine name for Vega20 and before ASICs.
For newer ASICs, the similar engine is named as 'VCN'.

Signed-off-by: default avatarEvan Quan <evan.quan@amd.com>
Reviewed-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 7a1105bd

drivers/gpu/drm/amd/powerplay/amdgpu_smu.c

+9 −4
Original line number Diff line number Diff line
@@ -455,10 +455,15 @@ int smu_dpm_set_power_gate(struct smu_context *smu, uint32_t block_type, 
		return -EOPNOTSUPP;



	switch (block_type) {

	/*

	 * Some legacy code of amdgpu_vcn.c and vcn_v2*.c still uses

	 * AMD_IP_BLOCK_TYPE_UVD for VCN. So, here both of them are kept.

	 */

	case AMD_IP_BLOCK_TYPE_UVD:

		ret = smu_dpm_set_uvd_enable(smu, !gate);

	case AMD_IP_BLOCK_TYPE_VCN:

		ret = smu_dpm_set_vcn_enable(smu, !gate);

		if (ret)

			dev_err(smu->adev->dev, "Failed to power %s UVD!\n",

			dev_err(smu->adev->dev, "Failed to power %s VCN!\n",

				gate ? "gate" : "ungate");

		break;

	case AMD_IP_BLOCK_TYPE_GFX:
@@ -1328,7 +1333,7 @@ static int smu_hw_init(void *handle) 


	if (smu->is_apu) {

		smu_powergate_sdma(&adev->smu, false);

		smu_dpm_set_uvd_enable(smu, true);

		smu_dpm_set_vcn_enable(smu, true);

		smu_dpm_set_jpeg_enable(smu, true);

		smu_set_gfx_cgpg(&adev->smu, true);

	}
@@ -1460,7 +1465,7 @@ static int smu_hw_fini(void *handle) 


	if (smu->is_apu) {

		smu_powergate_sdma(&adev->smu, true);

		smu_dpm_set_uvd_enable(smu, false);

		smu_dpm_set_vcn_enable(smu, false);

		smu_dpm_set_jpeg_enable(smu, false);

	}

drivers/gpu/drm/amd/powerplay/arcturus_ppt.c

+2 −2
Original line number Diff line number Diff line
@@ -2118,7 +2118,7 @@ static bool arcturus_is_dpm_running(struct smu_context *smu) 
	return !!(feature_enabled & SMC_DPM_FEATURE);

}



static int arcturus_dpm_set_uvd_enable(struct smu_context *smu, bool enable)

static int arcturus_dpm_set_vcn_enable(struct smu_context *smu, bool enable)

{

	struct smu_power_context *smu_power = &smu->smu_power;

	struct smu_power_gate *power_gate = &smu_power->power_gate;
@@ -2617,7 +2617,7 @@ static const struct pptable_funcs arcturus_ppt_funcs = { 
	.dump_pptable = arcturus_dump_pptable,

	.get_power_limit = arcturus_get_power_limit,

	.is_dpm_running = arcturus_is_dpm_running,

	.dpm_set_uvd_enable = arcturus_dpm_set_uvd_enable,

	.dpm_set_vcn_enable = arcturus_dpm_set_vcn_enable,

	.i2c_eeprom_init = arcturus_i2c_eeprom_control_init,

	.i2c_eeprom_fini = arcturus_i2c_eeprom_control_fini,

	.get_unique_id = arcturus_get_unique_id,

drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h

+1 −1
Original line number Diff line number Diff line
@@ -453,7 +453,7 @@ struct pptable_funcs { 
					      *clocks);

	int (*get_power_profile_mode)(struct smu_context *smu, char *buf);

	int (*set_power_profile_mode)(struct smu_context *smu, long *input, uint32_t size);

	int (*dpm_set_uvd_enable)(struct smu_context *smu, bool enable);

	int (*dpm_set_vcn_enable)(struct smu_context *smu, bool enable);

	int (*dpm_set_jpeg_enable)(struct smu_context *smu, bool enable);

	int (*read_sensor)(struct smu_context *smu, enum amd_pp_sensors sensor,

			   void *data, uint32_t *size);

drivers/gpu/drm/amd/powerplay/navi10_ppt.c

+2 −2
Original line number Diff line number Diff line
@@ -729,7 +729,7 @@ static int navi10_set_default_dpm_table(struct smu_context *smu) 
	return 0;

}



static int navi10_dpm_set_uvd_enable(struct smu_context *smu, bool enable)

static int navi10_dpm_set_vcn_enable(struct smu_context *smu, bool enable)

{

	struct smu_power_context *smu_power = &smu->smu_power;

	struct smu_power_gate *power_gate = &smu_power->power_gate;
@@ -2429,7 +2429,7 @@ static const struct pptable_funcs navi10_ppt_funcs = { 
	.get_workload_type = navi10_get_workload_type,

	.get_allowed_feature_mask = navi10_get_allowed_feature_mask,

	.set_default_dpm_table = navi10_set_default_dpm_table,

	.dpm_set_uvd_enable = navi10_dpm_set_uvd_enable,

	.dpm_set_vcn_enable = navi10_dpm_set_vcn_enable,

	.dpm_set_jpeg_enable = navi10_dpm_set_jpeg_enable,

	.get_current_clk_freq_by_table = navi10_get_current_clk_freq_by_table,

	.print_clk_levels = navi10_print_clk_levels,

drivers/gpu/drm/amd/powerplay/renoir_ppt.c

+2 −2
Original line number Diff line number Diff line
@@ -349,7 +349,7 @@ static enum amd_pm_state_type renoir_get_current_power_state(struct smu_context 
	return pm_type;

}



static int renoir_dpm_set_uvd_enable(struct smu_context *smu, bool enable)

static int renoir_dpm_set_vcn_enable(struct smu_context *smu, bool enable)

{

	struct smu_power_context *smu_power = &smu->smu_power;

	struct smu_power_gate *power_gate = &smu_power->power_gate;
@@ -929,7 +929,7 @@ static const struct pptable_funcs renoir_ppt_funcs = { 
	.get_dpm_clk_limited = renoir_get_dpm_clk_limited,

	.print_clk_levels = renoir_print_clk_levels,

	.get_current_power_state = renoir_get_current_power_state,

	.dpm_set_uvd_enable = renoir_dpm_set_uvd_enable,

	.dpm_set_vcn_enable = renoir_dpm_set_vcn_enable,

	.dpm_set_jpeg_enable = renoir_dpm_set_jpeg_enable,

	.get_current_clk_freq_by_table = renoir_get_current_clk_freq_by_table,

	.force_dpm_limit_value = renoir_force_dpm_limit_value,