Commit f4b0cece authored by Ville Syrjälä's avatar Ville Syrjälä
Browse files

drm/i915: Extract intel_crtc_vblank_evade_scanlines() 



Pull the vblank evasion scanline calculations into their own helper
to declutter intel_pipe_update_start() a bit.

Reviewed-by: default avatarManasi Navare <navaremanasi@chromium.org>
Signed-off-by: default avatarVille Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20230901130440.2085-4-ville.syrjala@linux.intel.com


Reviewed-by: default avatarMitul Golani <mitulkumar.ajitkumar.golani@intel.com>
parent 09f390d4

drivers/gpu/drm/i915/display/intel_crtc.c

+31 −22
Original line number Diff line number Diff line
@@ -468,6 +468,36 @@ static int intel_mode_vblank_start(const struct drm_display_mode *mode) 
	return vblank_start;

}



static void intel_crtc_vblank_evade_scanlines(struct intel_atomic_state *state,

					      struct intel_crtc *crtc,

					      int *min, int *max, int *vblank_start)

{

	const struct intel_crtc_state *new_crtc_state =

		intel_atomic_get_new_crtc_state(state, crtc);

	const struct drm_display_mode *adjusted_mode = &new_crtc_state->hw.adjusted_mode;



	if (new_crtc_state->vrr.enable) {

		if (intel_vrr_is_push_sent(new_crtc_state))

			*vblank_start = intel_vrr_vmin_vblank_start(new_crtc_state);

		else

			*vblank_start = intel_vrr_vmax_vblank_start(new_crtc_state);

	} else {

		*vblank_start = intel_mode_vblank_start(adjusted_mode);

	}



	/* FIXME needs to be calibrated sensibly */

	*min = *vblank_start - intel_usecs_to_scanlines(adjusted_mode,

							VBLANK_EVASION_TIME_US);

	*max = *vblank_start - 1;



	/*

	 * M/N is double buffered on the transcoder's undelayed vblank,

	 * so with seamless M/N we must evade both vblanks.

	 */

	if (new_crtc_state->seamless_m_n && intel_crtc_needs_fastset(new_crtc_state))

		*min -= adjusted_mode->crtc_vblank_start - adjusted_mode->crtc_vdisplay;

}



/**

 * intel_pipe_update_start() - start update of a set of display registers

 * @state: the atomic state
@@ -487,7 +517,6 @@ void intel_pipe_update_start(struct intel_atomic_state *state, 
	struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);

	struct intel_crtc_state *new_crtc_state =

		intel_atomic_get_new_crtc_state(state, crtc);

	const struct drm_display_mode *adjusted_mode = &new_crtc_state->hw.adjusted_mode;

	long timeout = msecs_to_jiffies_timeout(1);

	int scanline, min, max, vblank_start;

	wait_queue_head_t *wq = drm_crtc_vblank_waitqueue(&crtc->base);
@@ -503,27 +532,7 @@ void intel_pipe_update_start(struct intel_atomic_state *state, 
	if (intel_crtc_needs_vblank_work(new_crtc_state))

		intel_crtc_vblank_work_init(new_crtc_state);



	if (new_crtc_state->vrr.enable) {

		if (intel_vrr_is_push_sent(new_crtc_state))

			vblank_start = intel_vrr_vmin_vblank_start(new_crtc_state);

		else

			vblank_start = intel_vrr_vmax_vblank_start(new_crtc_state);

	} else {

		vblank_start = intel_mode_vblank_start(adjusted_mode);

	}



	/* FIXME needs to be calibrated sensibly */

	min = vblank_start - intel_usecs_to_scanlines(adjusted_mode,

						      VBLANK_EVASION_TIME_US);

	max = vblank_start - 1;



	/*

	 * M/N is double buffered on the transcoder's undelayed vblank,

	 * so with seamless M/N we must evade both vblanks.

	 */

	if (new_crtc_state->seamless_m_n && intel_crtc_needs_fastset(new_crtc_state))

		min -= adjusted_mode->crtc_vblank_start - adjusted_mode->crtc_vdisplay;



	intel_crtc_vblank_evade_scanlines(state, crtc, &min, &max, &vblank_start);

	if (min <= 0 || max <= 0)

		goto irq_disable;