Commit efd9d241 authored by Dima Azarkin's avatar Dima Azarkin Committed by Shawn Guo
Browse files

ARM: dts: imx6qdl-wandboard: add scl/sda gpios definitions for i2c bus recovery 



The i2c bus on imx6qdl-wandboard has intermittent issues where SDA can freeze
on low level at the end of transaction so the bus can no longer work. This
impacts reading of EDID data leading to incorrect TV resolution and no audio.

This scenario is improved by adding scl/sda gpios definitions to implement the
i2c bus recovery mechanism.

Signed-off-by: default avatarDima Azarkin <azdmg@outlook.com>
Reviewed-by: default avatarFabio Estevam <festevam@gmail.com>
Signed-off-by: default avatarShawn Guo <shawnguo@kernel.org>
parent 36034ae5

arch/arm/boot/dts/imx6qdl-wandboard.dtsi

+22 −2
Original line number Diff line number Diff line
@@ -97,15 +97,21 @@ &hdmi { 


&i2c1 {

	clock-frequency = <100000>;

	pinctrl-names = "default";

	pinctrl-names = "default", "gpio";

	pinctrl-0 = <&pinctrl_i2c1>;

	pinctrl-1 = <&pinctrl_i2c1_gpio>;

	scl-gpios = <&gpio3 21 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;

	sda-gpios = <&gpio3 28 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;

	status = "okay";

};



&i2c2 {

	clock-frequency = <100000>;

	pinctrl-names = "default";

	pinctrl-names = "default", "gpio";

	pinctrl-0 = <&pinctrl_i2c2>;

	pinctrl-1 = <&pinctrl_i2c2_gpio>;

	scl-gpios = <&gpio4 12 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;

	sda-gpios = <&gpio4 13 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;

	status = "okay";



	codec: sgtl5000@a {
@@ -185,6 +191,13 @@ MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1 
			>;

		};



		pinctrl_i2c1_gpio: i2c1gpiogrp {

			fsl,pins = <

				MX6QDL_PAD_EIM_D21__GPIO3_IO21		0x4001b8b0

				MX6QDL_PAD_EIM_D28__GPIO3_IO28		0x4001b8b0

			>;

		};



		pinctrl_i2c2: i2c2grp {

			fsl,pins = <

				MX6QDL_PAD_KEY_COL3__I2C2_SCL		0x4001b8b1
@@ -192,6 +205,13 @@ MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1 
			>;

		};



		pinctrl_i2c2_gpio: i2c2gpiogrp {

			fsl,pins = <

				MX6QDL_PAD_KEY_COL3__GPIO4_IO12		0x4001b8b0

				MX6QDL_PAD_KEY_ROW3__GPIO4_IO13		0x4001b8b0

			>;

		};



		pinctrl_mclk: mclkgrp {

			fsl,pins = <

				MX6QDL_PAD_GPIO_0__CCM_CLKO1		0x130b0