Commit ec8631e0 authored by Alex Sierra's avatar Alex Sierra Committed by Alex Deucher
Browse files

drm/amdgpu: use pd addr based on gart level page table 



With a recent gart page table re-construction, the gart page
table is now 2-level for some ASICs: PDB0->PTB.
In the case of 2-level gart page table, the page_table_base
of vmid0 should point to PDB0 instead of PTB.

Signed-off-by: default avatarAlex Sierra <alex.sierra@amd.com>
Reviewed-by: default avatarFelix Kuehling <Felix.Kuehling@amd.com>
Reviewed-by: default avatarOak Zeng <Oak.Zeng@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent be0478e7

drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c

+2 −1
Original line number Diff line number Diff line
@@ -2057,7 +2057,8 @@ int amdgpu_copy_buffer(struct amdgpu_ring *ring, uint64_t src_offset, 
		return r;



	if (vm_needs_flush) {

		job->vm_pd_addr = amdgpu_gmc_pd_addr(adev->gart.bo);

		job->vm_pd_addr = amdgpu_gmc_pd_addr(adev->gmc.pdb0_bo ?

					adev->gmc.pdb0_bo : adev->gart.bo);

		job->vm_needs_flush = true;

	}

	if (resv) {