Commit eb918cbb authored by Charlene Liu's avatar Charlene Liu Committed by Alex Deucher
Browse files

drm/amd/display: Add z8_marks in dml 



Add z8 watermarks to struct for later ASIC use.

Reviewed-by: default avatarAlvin Lee <alvin.lee2@amd.com>
Acked-by: default avatarQingqing Zhuo <qingqing.zhuo@amd.com>
Signed-off-by: default avatarCharlene Liu <charlene.liu@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 115009d1

drivers/gpu/drm/amd/display/dc/dml2/display_mode_core.c

+2 −0
Original line number Diff line number Diff line
@@ -10169,6 +10169,8 @@ dml_get_var_func(wm_memory_trip, dml_float_t, mode_lib->mp.UrgentLatency); 
dml_get_var_func(wm_fclk_change, dml_float_t, mode_lib->mp.Watermark.FCLKChangeWatermark);

dml_get_var_func(wm_usr_retraining, dml_float_t, mode_lib->mp.Watermark.USRRetrainingWatermark);

dml_get_var_func(wm_dram_clock_change, dml_float_t, mode_lib->mp.Watermark.DRAMClockChangeWatermark);

dml_get_var_func(wm_z8_stutter_enter_exit, dml_float_t, mode_lib->mp.Watermark.Z8StutterEnterPlusExitWatermark);

dml_get_var_func(wm_z8_stutter, dml_float_t, mode_lib->mp.Watermark.Z8StutterExitWatermark);

dml_get_var_func(fraction_of_urgent_bandwidth, dml_float_t, mode_lib->mp.FractionOfUrgentBandwidth);

dml_get_var_func(fraction_of_urgent_bandwidth_imm_flip, dml_float_t, mode_lib->mp.FractionOfUrgentBandwidthImmediateFlip);

dml_get_var_func(urgent_latency, dml_float_t, mode_lib->mp.UrgentLatency);

drivers/gpu/drm/amd/display/dc/dml2/display_mode_core.h

+2 −0
Original line number Diff line number Diff line
@@ -85,6 +85,8 @@ dml_get_var_decl(wm_stutter_exit, dml_float_t); 
dml_get_var_decl(wm_stutter_enter_exit, dml_float_t);

dml_get_var_decl(wm_memory_trip, dml_float_t);

dml_get_var_decl(wm_dram_clock_change, dml_float_t);

dml_get_var_decl(wm_z8_stutter_enter_exit, dml_float_t);

dml_get_var_decl(wm_z8_stutter, dml_float_t);

dml_get_var_decl(urgent_latency, dml_float_t);

dml_get_var_decl(clk_dcf_deepsleep, dml_float_t);

dml_get_var_decl(wm_fclk_change, dml_float_t);

drivers/gpu/drm/amd/display/dc/dml2/dml2_utils.c

+2 −0
Original line number Diff line number Diff line
@@ -369,6 +369,8 @@ void dml2_extract_watermark_set(struct dcn_watermarks *watermark, struct display 
	watermark->urgent_latency_ns = dml_get_urgent_latency(dml_core_ctx) * 1000;

	watermark->cstate_pstate.fclk_pstate_change_ns = dml_get_wm_fclk_change(dml_core_ctx) * 1000;

	watermark->usr_retraining_ns = dml_get_wm_usr_retraining(dml_core_ctx) * 1000;

	watermark->cstate_pstate.cstate_enter_plus_exit_z8_ns = dml_get_wm_z8_stutter_enter_exit(dml_core_ctx) * 1000;

	watermark->cstate_pstate.cstate_exit_z8_ns = dml_get_wm_z8_stutter(dml_core_ctx) * 1000;

}



void dml2_initialize_det_scratch(struct dml2_context *in_ctx)

drivers/gpu/drm/amd/display/dc/dml2/dml2_wrapper.c

+2 −0
Original line number Diff line number Diff line
@@ -717,6 +717,8 @@ bool dml2_create(const struct dc *in_dc, const struct dml2_configuration_options 


	initialize_dml2_soc_states(*dml2, in_dc, &(*dml2)->v20.dml_core_ctx.soc, &(*dml2)->v20.dml_core_ctx.states);



	/*Initialize DML20 instance which calls dml2_core_create, and core_dcn3_populate_informative*/

	//dml2_initialize_instance(&(*dml_ctx)->v20.dml_init);

	return true;

}

drivers/gpu/drm/amd/display/dc/dml2/dml2_wrapper.h

+1 −0
Original line number Diff line number Diff line
@@ -63,6 +63,7 @@ struct dml2_dcn_clocks { 
	unsigned int ref_dtbclk_khz;

	bool p_state_supported;

	unsigned int cab_num_ways_required;

	unsigned int dcfclk_khz_ds;

};



struct dml2_dc_callbacks {