Commit ea25b183 authored by Biju Das's avatar Biju Das Committed by Geert Uytterhoeven
Browse files

arm64: dts: renesas: rzg2ul-smarc: Enable RSPI1 on carrier board 



RSPI1 (SPI1) interface is available on PMOD0 connector (J1) on the
carrier board.  This patch adds pinmux and spi1 nodes to the carrier
board dtsi file and drops deleting pinctl* properties from board
DTS file.

Signed-off-by: default avatarBiju Das <biju.das.jz@bp.renesas.com>
Link: https://lore.kernel.org/r/20220608173025.22792-2-biju.das.jz@bp.renesas.com


Signed-off-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
parent e5fba0bc

arch/arm64/boot/dts/renesas/r9a07g043u11-smarc.dts

+0 −6
Original line number Diff line number Diff line
@@ -13,9 +13,3 @@ / { 
	model = "Renesas SMARC EVK based on r9a07g043u11";

	compatible = "renesas,smarc-evk", "renesas,r9a07g043u11", "renesas,r9a07g043";

};
 


&spi1 {

	/delete-property/ pinctrl-0;

	/delete-property/ pinctrl-names;

	status = "disabled";

};

arch/arm64/boot/dts/renesas/rzg2ul-smarc-som.dtsi

+7 −0
Original line number Diff line number Diff line
@@ -209,6 +209,13 @@ sd0_mux_uhs { 
			pinmux = <RZG2L_PORT_PINMUX(0, 0, 1)>; /* SD0_CD */

		};

	};



	spi1_pins: rspi1 {

		pinmux = <RZG2L_PORT_PINMUX(4, 0, 2)>, /* CK */

			 <RZG2L_PORT_PINMUX(4, 1, 2)>, /* MOSI */

			 <RZG2L_PORT_PINMUX(4, 2, 2)>, /* MISO */

			 <RZG2L_PORT_PINMUX(4, 3, 2)>; /* SSL */

	};

};



#if (SW_SW0_DEV_SEL)

arch/arm64/boot/dts/renesas/rzg2ul-smarc.dtsi

+6 −0
Original line number Diff line number Diff line
@@ -51,6 +51,12 @@ &snd_rzg2l { 
	status = "disabled";

};



&spi1 {

	/delete-property/ pinctrl-0;

	/delete-property/ pinctrl-names;

	status = "disabled";

};



&ssi1 {

	/delete-property/ pinctrl-0;

	/delete-property/ pinctrl-names;