Commit e9525633 authored by Thomas Gleixner's avatar Thomas Gleixner
Browse files

x86/cpu: Move cpu_core_id into topology info 



Rename it to core_id and stick it to the other ID fields.

No functional change.

Signed-off-by: default avatarThomas Gleixner <tglx@linutronix.de>
Tested-by: default avatarJuergen Gross <jgross@suse.com>
Tested-by: default avatarSohil Mehta <sohil.mehta@intel.com>
Tested-by: default avatarMichael Kelley <mikelley@microsoft.com>
Tested-by: default avatarPeter Zijlstra (Intel) <peterz@infradead.org>
Tested-by: default avatarZhang Rui <rui.zhang@intel.com>
Acked-by: default avatarPeter Zijlstra (Intel) <peterz@infradead.org>
Link: https://lore.kernel.org/r/20230814085112.566519388@linutronix.de
parent 94f0b397

arch/x86/include/asm/processor.h

+3 −1
Original line number Diff line number Diff line
@@ -89,6 +89,9 @@ struct cpuinfo_topology { 


	// Physical die ID on AMD, Relative on Intel

	u32			die_id;



	// Core ID relative to the package

	u32			core_id;

};



struct cpuinfo_x86 {
@@ -143,7 +146,6 @@ struct cpuinfo_x86 { 
	/* Logical processor id: */

	u16			logical_proc_id;

	/* Core id: */

	u16			cpu_core_id;

	u16			logical_die_id;

	/* Index into per_cpu list: */

	u16			cpu_index;

arch/x86/include/asm/topology.h

+1 −1
Original line number Diff line number Diff line
@@ -109,7 +109,7 @@ extern const struct cpumask *cpu_clustergroup_mask(int cpu); 
#define topology_physical_package_id(cpu)	(cpu_data(cpu).topo.pkg_id)

#define topology_logical_die_id(cpu)		(cpu_data(cpu).logical_die_id)

#define topology_die_id(cpu)			(cpu_data(cpu).topo.die_id)

#define topology_core_id(cpu)			(cpu_data(cpu).cpu_core_id)

#define topology_core_id(cpu)			(cpu_data(cpu).topo.core_id)

#define topology_ppin(cpu)			(cpu_data(cpu).ppin)



extern unsigned int __max_die_per_package;

arch/x86/kernel/amd_nb.c

+2 −2
Original line number Diff line number Diff line
@@ -386,7 +386,7 @@ int amd_get_subcaches(int cpu) 


	pci_read_config_dword(link, 0x1d4, &mask);



	return (mask >> (4 * cpu_data(cpu).cpu_core_id)) & 0xf;

	return (mask >> (4 * cpu_data(cpu).topo.core_id)) & 0xf;

}



int amd_set_subcaches(int cpu, unsigned long mask)
@@ -412,7 +412,7 @@ int amd_set_subcaches(int cpu, unsigned long mask) 
		pci_write_config_dword(nb->misc, 0x1b8, reg & ~0x180000);

	}



	cuid = cpu_data(cpu).cpu_core_id;

	cuid = cpu_data(cpu).topo.core_id;

	mask <<= 4 * cuid;

	mask |= (0xf ^ (1 << cuid)) << 26;

arch/x86/kernel/cpu/amd.c

+4 −4
Original line number Diff line number Diff line
@@ -378,7 +378,7 @@ static int nearby_node(int apicid) 
#endif



/*

 * Fix up cpu_core_id for pre-F17h systems to be in the

 * Fix up topo::core_id for pre-F17h systems to be in the

 * [0 .. cores_per_node - 1] range. Not really needed but

 * kept so as not to break existing setups.

 */
@@ -390,7 +390,7 @@ static void legacy_fixup_core_id(struct cpuinfo_x86 *c) 
		return;



	cus_per_node = c->x86_max_cores / nodes_per_socket;

	c->cpu_core_id %= cus_per_node;

	c->topo.core_id %= cus_per_node;

}



/*
@@ -416,7 +416,7 @@ static void amd_get_topology(struct cpuinfo_x86 *c) 
			c->cu_id = ebx & 0xff;



		if (c->x86 >= 0x17) {

			c->cpu_core_id = ebx & 0xff;

			c->topo.core_id = ebx & 0xff;



			if (smp_num_siblings > 1)

				c->x86_max_cores /= smp_num_siblings;
@@ -459,7 +459,7 @@ static void amd_detect_cmp(struct cpuinfo_x86 *c) 


	bits = c->x86_coreid_bits;

	/* Low order bits define the core id (index of core in socket) */

	c->cpu_core_id = c->topo.initial_apicid & ((1 << bits)-1);

	c->topo.core_id = c->topo.initial_apicid & ((1 << bits)-1);

	/* Convert the initial APIC ID into the socket ID */

	c->topo.pkg_id = c->topo.initial_apicid >> bits;

	/* use socket ID also for last level cache */

arch/x86/kernel/cpu/common.c

+2 −2
Original line number Diff line number Diff line
@@ -922,7 +922,7 @@ void detect_ht(struct cpuinfo_x86 *c) 


	core_bits = get_count_order(c->x86_max_cores);



	c->cpu_core_id = apic->phys_pkg_id(c->topo.initial_apicid, index_msb) &

	c->topo.core_id = apic->phys_pkg_id(c->topo.initial_apicid, index_msb) &

		((1 << core_bits) - 1);

#endif

}