Commit e7da754b authored by Monk Liu's avatar Monk Liu Committed by Alex Deucher
Browse files

drm/amdgpu: fix an UMC hw arbitrator bug(v3) 



issue:
the UMC6 h/w bug is that when MCLK is doing the switch
in the middle of a page access being preempted by high
priority client (e.g. DISPLAY) then UMC and the mclk switch
would stuck there due to deadlock

how:
fixed by disabling auto PreChg for UMC to avoid high
priority client preempting other client's access on
the same page, thus the deadlock could be avoided

v2:
put the patch in callback of UMC6
v3:
rename the callback to "init_registers"

Signed-off-by: default avatarMonk Liu <Monk.Liu@amd.com>
Reviewed-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Reviewed-by: default avatarHawking Zhang <hawking.zhang@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 6de088a0

drivers/gpu/drm/amd/amdgpu/Makefile

+1 −1
Original line number Diff line number Diff line
@@ -84,7 +84,7 @@ amdgpu-y += \ 


# add UMC block

amdgpu-y += \

	umc_v6_1.o

	umc_v6_1.o umc_v6_0.o



# add IH block

amdgpu-y += \

drivers/gpu/drm/amd/amdgpu/amdgpu_umc.h

+1 −0
Original line number Diff line number Diff line
@@ -63,6 +63,7 @@ struct amdgpu_umc_funcs { 
	void (*enable_umc_index_mode)(struct amdgpu_device *adev,

					uint32_t umc_instance);

	void (*disable_umc_index_mode)(struct amdgpu_device *adev);

	void (*init_registers)(struct amdgpu_device *adev);

};



struct amdgpu_umc {

drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c

+7 −0
Original line number Diff line number Diff line
@@ -51,6 +51,7 @@ 
#include "gfxhub_v1_1.h"

#include "mmhub_v9_4.h"

#include "umc_v6_1.h"

#include "umc_v6_0.h"



#include "ivsrcid/vmc/irqsrcs_vmc_1_0.h"
@@ -696,6 +697,9 @@ static void gmc_v9_0_set_gmc_funcs(struct amdgpu_device *adev) 
static void gmc_v9_0_set_umc_funcs(struct amdgpu_device *adev)

{

	switch (adev->asic_type) {

	case CHIP_VEGA10:

		adev->umc.funcs = &umc_v6_0_funcs;

		break;

	case CHIP_VEGA20:

		adev->umc.max_ras_err_cnt_per_query = UMC_V6_1_TOTAL_CHANNEL_NUM;

		adev->umc.channel_inst_num = UMC_V6_1_CHANNEL_INSTANCE_NUM;
@@ -1303,6 +1307,9 @@ static int gmc_v9_0_gart_enable(struct amdgpu_device *adev) 
	for (i = 0; i < adev->num_vmhubs; ++i)

		gmc_v9_0_flush_gpu_tlb(adev, 0, i, 0);



	if (adev->umc.funcs && adev->umc.funcs->init_registers)

		adev->umc.funcs->init_registers(adev);



	DRM_INFO("PCIE GART of %uM enabled (table at 0x%016llX).\n",

		 (unsigned)(adev->gmc.gart_size >> 20),

		 (unsigned long long)amdgpu_bo_gpu_offset(adev->gart.bo));

drivers/gpu/drm/amd/amdgpu/umc_v6_0.c

0 → 100644
+37 −0
Original line number Diff line number Diff line 
/*

 * Copyright 2019 Advanced Micro Devices, Inc.

 *

 * Permission is hereby granted, free of charge, to any person obtaining a

 * copy of this software and associated documentation files (the "Software"),

 * to deal in the Software without restriction, including without limitation

 * the rights to use, copy, modify, merge, publish, distribute, sublicense,

 * and/or sell copies of the Software, and to permit persons to whom the

 * Software is furnished to do so, subject to the following conditions:

 *

 * The above copyright notice and this permission notice shall be included in

 * all copies or substantial portions of the Software.

 *

 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR

 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,

 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL

 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR

 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,

 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR

 * OTHER DEALINGS IN THE SOFTWARE.

 *

 */

#include "umc_v6_0.h"

#include "amdgpu.h"



static void umc_v6_0_init_registers(struct amdgpu_device *adev)

{

	unsigned i,j;



	for (i = 0; i < 4; i++)

		for (j = 0; j < 4; j++)

			WREG32((i*0x100000 + 0x5010c + j*0x2000)/4, 0x1002);

}



const struct amdgpu_umc_funcs umc_v6_0_funcs = {

	.init_registers = umc_v6_0_init_registers,

};

drivers/gpu/drm/amd/amdgpu/umc_v6_0.h

0 → 100644
+31 −0
Original line number Diff line number Diff line 
/*

 * Copyright 2019 Advanced Micro Devices, Inc.

 *

 * Permission is hereby granted, free of charge, to any person obtaining a

 * copy of this software and associated documentation files (the "Software"),

 * to deal in the Software without restriction, including without limitation

 * the rights to use, copy, modify, merge, publish, distribute, sublicense,

 * and/or sell copies of the Software, and to permit persons to whom the

 * Software is furnished to do so, subject to the following conditions:

 *

 * The above copyright notice and this permission notice shall be included in

 * all copies or substantial portions of the Software.

 *

 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR

 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,

 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL

 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR

 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,

 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR

 * OTHER DEALINGS IN THE SOFTWARE.

 *

 */

#ifndef __UMC_V6_0_H__

#define __UMC_V6_0_H__



#include "soc15_common.h"

#include "amdgpu.h"



extern const struct amdgpu_umc_funcs umc_v6_0_funcs;



#endif