Commit e52dcd6e authored by Krzysztof Kozlowski's avatar Krzysztof Kozlowski
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ARM: dts: exynos: correct PMIC interrupt trigger level on Midas family



The Maxim PMIC datasheets describe the interrupt line as active low
with a requirement of acknowledge from the CPU.  Without specifying the
interrupt type in Devicetree, kernel might apply some fixed
configuration, not necessarily working for this hardware.

Additionally, the interrupt line is shared so using level sensitive
interrupt is here especially important to avoid races.

Fixes: 15dfdfad ("ARM: dts: Add basic dts for Exynos4412-based Trats 2 board")
Signed-off-by: default avatarKrzysztof Kozlowski <krzk@kernel.org>
Link: https://lore.kernel.org/r/20201210212534.216197-5-krzk@kernel.org
parent 15107e44
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+1 −1
Original line number Diff line number Diff line
@@ -665,7 +665,7 @@ &i2c_7 {
	max77686: pmic@9 {
		compatible = "maxim,max77686";
		interrupt-parent = <&gpx0>;
		interrupts = <7 IRQ_TYPE_NONE>;
		interrupts = <7 IRQ_TYPE_LEVEL_LOW>;
		pinctrl-0 = <&max77686_irq>;
		pinctrl-names = "default";
		reg = <0x09>;