Commit e4d755cf authored by Yoshihiro Shimoda's avatar Yoshihiro Shimoda Committed by Geert Uytterhoeven
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arm64: dts: renesas: Add Renesas White Hawk boards support

parent 987da486
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@@ -65,6 +65,8 @@ dtb-$(CONFIG_ARCH_R8A779A0) += r8a779a0-falcon.dtb

dtb-$(CONFIG_ARCH_R8A779F0) += r8a779f0-spider.dtb

dtb-$(CONFIG_ARCH_R8A779G0) += r8a779g0-white-hawk.dtb

dtb-$(CONFIG_ARCH_R8A77951) += r8a779m1-salvator-xs.dtb
dtb-$(CONFIG_ARCH_R8A77951) += r8a779m1-ulcb.dtb
dtb-$(CONFIG_ARCH_R8A77951) += r8a779m1-ulcb-kf.dtb
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// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
/*
 * Device Tree Source for the White Hawk CPU board
 *
 * Copyright (C) 2022 Renesas Electronics Corp.
 */

#include "r8a779g0.dtsi"

/ {
	model = "Renesas White Hawk CPU board";
	compatible = "renesas,white-hawk-cpu", "renesas,r8a779g0";

	memory@48000000 {
		device_type = "memory";
		/* first 128MB is reserved for secure area. */
		reg = <0x0 0x48000000 0x0 0x78000000>;
	};

	memory@480000000 {
		device_type = "memory";
		reg = <0x4 0x80000000 0x0 0x80000000>;
	};

	memory@600000000 {
		device_type = "memory";
		reg = <0x6 0x00000000 0x1 0x00000000>;
	};
};

&extal_clk {
	clock-frequency = <16666666>;
};

&extalr_clk {
	clock-frequency = <32768>;
};

&hscif0 {
	status = "okay";
};

&scif_clk {
	clock-frequency = <24000000>;
};
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// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
/*
 * Device Tree Source for the White Hawk CPU and BreakOut boards
 *
 * Copyright (C) 2022 Renesas Electronics Corp.
 */

/dts-v1/;
#include "r8a779g0-white-hawk-cpu.dtsi"

/ {
	model = "Renesas White Hawk CPU and Breakout boards based on r8a779g0";
	compatible = "renesas,white-hawk-breakout", "renesas,white-hawk-cpu", "renesas,r8a779g0";

	aliases {
		serial0 = &hscif0;
	};

	chosen {
		stdout-path = "serial0:921600n8";
	};
};