Commit e2c58ea8 authored by Chris Morgan's avatar Chris Morgan Committed by Heiko Stuebner
Browse files

arm64: dts: rockchip: Add SFC to RK3308 



Add a devicetree entry for the Rockchip SFC for the RK3308 SOC.

Signed-off-by: default avatarChris Morgan <macromorgan@hotmail.com>
Signed-off-by: default avatarJon Lin <jon.lin@rock-chips.com>
Link: https://lore.kernel.org/r/20210812134639.31586-1-jon.lin@rock-chips.com


Signed-off-by: default avatarHeiko Stuebner <heiko@sntech.de>
parent 4d97b78a

arch/arm64/boot/dts/rockchip/rk3308.dtsi

+37 −0
Original line number Diff line number Diff line
@@ -731,6 +731,17 @@ gmac: ethernet@ff4e0000 { 
		status = "disabled";

	};



	sfc: spi@ff4c0000 {

		compatible = "rockchip,sfc";

		reg = <0x0 0xff4c0000 0x0 0x4000>;

		interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;

		clocks = <&cru SCLK_SFC>, <&cru HCLK_SFC>;

		clock-names = "clk_sfc", "hclk_sfc";

		pinctrl-0 = <&sfc_clk &sfc_cs0 &sfc_bus4>;

		pinctrl-names = "default";

		status = "disabled";

	};



	cru: clock-controller@ff500000 {

		compatible = "rockchip,rk3308-cru";

		reg = <0x0 0xff500000 0x0 0x1000>;
@@ -1004,6 +1015,32 @@ flash_bus8: flash-bus8 { 
			};

		};



		sfc {

			sfc_bus4: sfc-bus4 {

				rockchip,pins =

					<3 RK_PA0 3 &pcfg_pull_none>,

					<3 RK_PA1 3 &pcfg_pull_none>,

					<3 RK_PA2 3 &pcfg_pull_none>,

					<3 RK_PA3 3 &pcfg_pull_none>;

			};



			sfc_bus2: sfc-bus2 {

				rockchip,pins =

					<3 RK_PA0 3 &pcfg_pull_none>,

					<3 RK_PA1 3 &pcfg_pull_none>;

			};



			sfc_cs0: sfc-cs0 {

				rockchip,pins =

					<3 RK_PA4 3 &pcfg_pull_none>;

			};



			sfc_clk: sfc-clk {

				rockchip,pins =

					<3 RK_PA5 3 &pcfg_pull_none>;

			};

		};



		gmac {

			rmii_pins: rmii-pins {

				rockchip,pins =