Commit e0f7ff99 authored by Jaehyun Chung's avatar Jaehyun Chung Committed by Alex Deucher
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drm/amd/display: Mask DPCD field to avoid reading unsupported field value 



[Why]
DSC will be disabled if DPCD 0006F[6:3] is set to a non-zero value
because bits 6:3 are not currently supported. When 6:3 is populated, an
unsupported INCREMENT OF bits_per_pixel value is read (DPCD 0006F[2:0])

[How]
Mask the INCREMENT OF bits_per_pixel field so that values in the
unsupported field are ignored.

Signed-off-by: default avatarJaehyun Chung <jaehyun.chung@amd.com>
Reviewed-by: default avatarWenjing Liu <Wenjing.Liu@amd.com>
Acked-by: default avatarRodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 5ab79431

drivers/gpu/drm/amd/display/dc/dsc/dc_dsc.c

+3 −1
Original line number Diff line number Diff line
@@ -192,8 +192,10 @@ static bool dsc_throughput_from_dpcd(int dpcd_throughput, int *throughput) 
}





static bool dsc_bpp_increment_div_from_dpcd(int bpp_increment_dpcd, uint32_t *bpp_increment_div)

static bool dsc_bpp_increment_div_from_dpcd(uint8_t bpp_increment_dpcd, uint32_t *bpp_increment_div)

{

	// Mask bpp increment dpcd field to avoid reading other fields

	bpp_increment_dpcd &= 0x7;



	switch (bpp_increment_dpcd) {

	case 0: