Commit e0b7fd12 authored by Jiaxun Yang's avatar Jiaxun Yang Committed by Thomas Bogendoerfer
Browse files

MIPS: Always select ARCH_HAS_SYNC_DMA_FOR_CPU for noncoherent platforms 



As now we are telling the necessity of post DMA flush per CPU type,
there is no need to select ARCH_HAS_SYNC_DMA_FOR_CPU on per platform
bias, just select it unconditionally and we can sort it at runtime.

Signed-off-by: default avatarJiaxun Yang <jiaxun.yang@flygoat.com>
Signed-off-by: default avatarThomas Bogendoerfer <tsbogend@alpha.franken.de>
parent 6be87d61

arch/mips/Kconfig

+1 −8
Original line number Diff line number Diff line
@@ -115,7 +115,6 @@ config MACH_INGENIC 
	select SYS_SUPPORTS_LITTLE_ENDIAN

	select SYS_SUPPORTS_ZBOOT

	select DMA_NONCOHERENT

	select ARCH_HAS_SYNC_DMA_FOR_CPU

	select IRQ_MIPS_CPU

	select PINCTRL

	select GPIOLIB
@@ -1071,6 +1070,7 @@ config DMA_NONCOHERENT 
	select ARCH_HAS_SETUP_DMA_OPS

	select ARCH_HAS_DMA_WRITE_COMBINE

	select ARCH_HAS_DMA_PREP_COHERENT

	select ARCH_HAS_SYNC_DMA_FOR_CPU

	select ARCH_HAS_SYNC_DMA_FOR_DEVICE

	select ARCH_HAS_DMA_SET_UNCACHED

	select DMA_NONCOHERENT_MMAP
@@ -1828,11 +1828,9 @@ config SYS_HAS_CPU_MIPS32_R3_5 


config SYS_HAS_CPU_MIPS32_R5

	bool

	select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT



config SYS_HAS_CPU_MIPS32_R6

	bool

	select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT



config SYS_HAS_CPU_MIPS64_R1

	bool
@@ -1842,15 +1840,12 @@ config SYS_HAS_CPU_MIPS64_R2 


config SYS_HAS_CPU_MIPS64_R5

	bool

	select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT



config SYS_HAS_CPU_MIPS64_R6

	bool

	select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT



config SYS_HAS_CPU_P5600

	bool

	select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT



config SYS_HAS_CPU_R3000

	bool
@@ -1875,7 +1870,6 @@ config SYS_HAS_CPU_NEVADA 


config SYS_HAS_CPU_R10000

	bool

	select ARCH_HAS_SYNC_DMA_FOR_CPU if DMA_NONCOHERENT



config SYS_HAS_CPU_RM7000

	bool
@@ -1904,7 +1898,6 @@ config SYS_HAS_CPU_BMIPS4380 
config SYS_HAS_CPU_BMIPS5000

	bool

	select SYS_HAS_CPU_BMIPS

	select ARCH_HAS_SYNC_DMA_FOR_CPU



#

# CPU may reorder R->R, R->W, W->R, W->W