Commit db8fc100 authored by Konrad Dybcio's avatar Konrad Dybcio Committed by Georgi Djakov
Browse files

interconnect: qcom: icc-rpm: Separate out clock rate calulcations 



In preparation for also setting per-node clock rates, separate out the
logic that computes it.

Signed-off-by: default avatarKonrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20230726-topic-icc_coeff-v4-2-c04b60caa467@linaro.org


Signed-off-by: default avatarGeorgi Djakov <djakov@kernel.org>
parent dd014803

drivers/interconnect/qcom/icc-rpm.c

+30 −23
Original line number Diff line number Diff line
@@ -291,30 +291,14 @@ static int qcom_icc_bw_aggregate(struct icc_node *node, u32 tag, u32 avg_bw, 
	return 0;

}



/**

 * qcom_icc_bus_aggregate - calculate bus clock rates by traversing all nodes

 * @provider: generic interconnect provider

 * @agg_clk_rate: array containing the aggregated clock rates in kHz

 */

static void qcom_icc_bus_aggregate(struct icc_provider *provider, u64 *agg_clk_rate)

static u64 qcom_icc_calc_rate(struct qcom_icc_provider *qp, struct qcom_icc_node *qn, int ctx)

{

	struct qcom_icc_provider *qp = to_qcom_provider(provider);

	u64 agg_avg_rate, agg_peak_rate, agg_rate;

	struct qcom_icc_node *qn;

	struct icc_node *node;

	int i;



	/*

	 * Iterate nodes on the provider, aggregate bandwidth requests for

	 * every bucket and convert them into bus clock rates.

	 */

	list_for_each_entry(node, &provider->nodes, node_list) {

		qn = node->data;

		for (i = 0; i < QCOM_SMD_RPM_STATE_NUM; i++) {

	if (qn->channels)

				agg_avg_rate = div_u64(qn->sum_avg[i], qn->channels);

		agg_avg_rate = div_u64(qn->sum_avg[ctx], qn->channels);

	else

				agg_avg_rate = qn->sum_avg[i];

		agg_avg_rate = qn->sum_avg[ctx];



	if (qp->ab_coeff) {

		agg_avg_rate = agg_avg_rate * qp->ab_coeff;
@@ -322,15 +306,38 @@ static void qcom_icc_bus_aggregate(struct icc_provider *provider, u64 *agg_clk_r 
	}



	if (qp->ib_coeff) {

				agg_peak_rate = qn->max_peak[i] * 100;

				agg_peak_rate = div_u64(qn->max_peak[i], qp->ib_coeff);

		agg_peak_rate = qn->max_peak[ctx] * 100;

		agg_peak_rate = div_u64(qn->max_peak[ctx], qp->ib_coeff);

	} else {

				agg_peak_rate = qn->max_peak[i];

		agg_peak_rate = qn->max_peak[ctx];

	}



	agg_rate = max_t(u64, agg_avg_rate, agg_peak_rate);



			agg_clk_rate[i] = max_t(u64, agg_clk_rate[i], agg_rate);

	return div_u64(agg_rate, qn->buswidth);

}



/**

 * qcom_icc_bus_aggregate - calculate bus clock rates by traversing all nodes

 * @provider: generic interconnect provider

 * @agg_clk_rate: array containing the aggregated clock rates in kHz

 */

static void qcom_icc_bus_aggregate(struct icc_provider *provider, u64 *agg_clk_rate)

{

	struct qcom_icc_provider *qp = to_qcom_provider(provider);

	struct qcom_icc_node *qn;

	struct icc_node *node;

	int ctx;



	/*

	 * Iterate nodes on the provider, aggregate bandwidth requests for

	 * every bucket and convert them into bus clock rates.

	 */

	list_for_each_entry(node, &provider->nodes, node_list) {

		qn = node->data;

		for (ctx = 0; ctx < QCOM_SMD_RPM_STATE_NUM; ctx++) {

			agg_clk_rate[ctx] = max_t(u64, agg_clk_rate[ctx],

						  qcom_icc_calc_rate(qp, qn, ctx));

		}

	}

}