Commit d78c7132 authored by Tao Zhou's avatar Tao Zhou Committed by Alex Deucher
Browse files

drm/amdgpu: add GFX RAS common function 



The common function can help reduce redundant code.

v2: remove xcp operation, only need to do RAS operations for all
instances.
v3: remove check for GFX RAS support, will be checked in higher level.
    add amdgpu prefix for the function name.

Signed-off-by: default avatarTao Zhou <tao.zhou1@amd.com>
Reviewed-by: default avatarHawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 9a3ce1a7

drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c

+19 −0
Original line number Diff line number Diff line
@@ -884,6 +884,25 @@ int amdgpu_gfx_cp_ecc_error_irq(struct amdgpu_device *adev, 
	return 0;

}



void amdgpu_gfx_ras_error_func(struct amdgpu_device *adev,

		void *ras_error_status,

		void (*func)(struct amdgpu_device *adev, void *ras_error_status,

				int xcc_id))

{

	int i;

	int num_xcc = adev->gfx.xcc_mask ? NUM_XCC(adev->gfx.xcc_mask) : 1;

	uint32_t xcc_mask = GENMASK(num_xcc - 1, 0);

	struct ras_err_data *err_data = (struct ras_err_data *)ras_error_status;



	if (err_data) {

		err_data->ue_count = 0;

		err_data->ce_count = 0;

	}



	for_each_inst(i, xcc_mask)

		func(adev, ras_error_status, i);

}



uint32_t amdgpu_kiq_rreg(struct amdgpu_device *adev, uint32_t reg)

{

	signed long r, cnt = 0;

drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h

+4 −0
Original line number Diff line number Diff line
@@ -494,6 +494,10 @@ int amdgpu_gfx_poison_consumption_handler(struct amdgpu_device *adev, 
bool amdgpu_gfx_is_master_xcc(struct amdgpu_device *adev, int xcc_id);

int amdgpu_gfx_sysfs_init(struct amdgpu_device *adev);

void amdgpu_gfx_sysfs_fini(struct amdgpu_device *adev);

void amdgpu_gfx_ras_error_func(struct amdgpu_device *adev,

		void *ras_error_status,

		void (*func)(struct amdgpu_device *adev, void *ras_error_status,

				int xcc_id));



static inline const char *amdgpu_gfx_compute_mode_desc(int mode)

{