Commit d6b2df35 authored by Alexandre Mergnat's avatar Alexandre Mergnat Committed by Matthias Brugger
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arm64: dts: mediatek: add larb support for mt8365 SoC



Local arbiter (LARB) is a component of Smart Multimedia Interface (SMI),
used to help the memory management (IOMMU).
This patch add 4 LARBs and 2 clocks for the larb1 and larb3 support.

Reviewed-by: default avatarAngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Signed-off-by: default avatarAlexandre Mergnat <amergnat@baylibre.com>
Signed-off-by: default avatarAngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20230207-iommu-support-v6-6-24453c8625b3@baylibre.com


Signed-off-by: default avatarMatthias Brugger <matthias.bgg@gmail.com>
parent 2bb2410e
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Original line number Diff line number Diff line
@@ -735,12 +735,71 @@ smi_common: smi@14002000 {
			power-domains = <&spm MT8365_POWER_DOMAIN_MM>;
		};

		larb0: larb@14003000 {
			compatible = "mediatek,mt8365-smi-larb",
				     "mediatek,mt8186-smi-larb";
			reg = <0 0x14003000 0 0x1000>;
			mediatek,smi = <&smi_common>;
			clocks = <&mmsys CLK_MM_MM_SMI_LARB0>,
				 <&mmsys CLK_MM_MM_SMI_LARB0>;
			clock-names = "apb", "smi";
			power-domains = <&spm MT8365_POWER_DOMAIN_MM>;
			mediatek,larb-id = <0>;
		};

		camsys: syscon@15000000 {
			compatible = "mediatek,mt8365-imgsys", "syscon";
			reg = <0 0x15000000 0 0x1000>;
			#clock-cells = <1>;
		};

		larb2: larb@15001000 {
			compatible = "mediatek,mt8365-smi-larb",
				     "mediatek,mt8186-smi-larb";
			reg = <0 0x15001000 0 0x1000>;
			mediatek,smi = <&smi_common>;
			clocks = <&mmsys CLK_MM_MM_SMI_IMG>,
				 <&camsys CLK_CAM_LARB2>;
			clock-names = "apb", "smi";
			power-domains = <&spm MT8365_POWER_DOMAIN_CAM>;
			mediatek,larb-id = <2>;
		};

		vdecsys: syscon@16000000 {
			compatible = "mediatek,mt8365-vdecsys", "syscon";
			reg = <0 0x16000000 0 0x1000>;
			#clock-cells = <1>;
		};

		larb3: larb@16010000 {
			compatible = "mediatek,mt8365-smi-larb",
				     "mediatek,mt8186-smi-larb";
			reg = <0 0x16010000 0 0x1000>;
			mediatek,smi = <&smi_common>;
			clocks = <&vdecsys CLK_VDEC_LARB1>,
				 <&vdecsys CLK_VDEC_LARB1>;
			clock-names = "apb", "smi";
			power-domains = <&spm MT8365_POWER_DOMAIN_VDEC>;
			mediatek,larb-id = <3>;
		};

		vencsys: syscon@17000000 {
			compatible = "mediatek,mt8365-vencsys", "syscon";
			reg = <0 0x17000000 0 0x1000>;
			#clock-cells = <1>;
		};

		larb1: larb@17010000 {
			compatible = "mediatek,mt8365-smi-larb",
				     "mediatek,mt8186-smi-larb";
			reg = <0 0x17010000 0 0x1000>;
			mediatek,smi = <&smi_common>;
			clocks = <&vencsys CLK_VENC>, <&vencsys CLK_VENC>;
			clock-names = "apb", "smi";
			power-domains = <&spm MT8365_POWER_DOMAIN_VENC>;
			mediatek,larb-id = <1>;
		};

		apu: syscon@19020000 {
			compatible = "mediatek,mt8365-apu", "syscon";
			reg = <0 0x19020000 0 0x1000>;