Commit d2567a84 authored by Alexandre Bailon's avatar Alexandre Bailon Committed by Ulf Hansson
Browse files

pmdomain: mediatek: Add support for MTK_SCPD_STRICT_BUS_PROTECTION cap 



This adds support for MTK_SCPD_STRICT_BUS_PROTECTION capability. It is a
strict bus protection policy that requires the bus protection to be
disabled before accessing the bus.
This is required by the mt8365, for the MM power domain.

Signed-off-by: default avatarAlexandre Bailon <abailon@baylibre.com>
Signed-off-by: default avatarFabien Parent <fparent@baylibre.com>
Signed-off-by: default avatarMarkus Schneider-Pargmann <msp@baylibre.com>
Reviewed-by: default avatarAngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Reviewed-by: default avatarAlexandre Mergnat <amergnat@baylibre.com>
Tested-by: default avatarAlexandre Mergnat <amergnat@baylibre.com>
Link: https://lore.kernel.org/r/20230918093751.1188668-8-msp@baylibre.com


Signed-off-by: default avatarUlf Hansson <ulf.hansson@linaro.org>
parent ecaf11aa

drivers/pmdomain/mediatek/mtk-pm-domains.c

+23 −4
Original line number Diff line number Diff line
@@ -262,9 +262,17 @@ static int scpsys_power_on(struct generic_pm_domain *genpd) 
	regmap_clear_bits(scpsys->base, pd->data->ctl_offs, PWR_ISO_BIT);

	regmap_set_bits(scpsys->base, pd->data->ctl_offs, PWR_RST_B_BIT);



	ret = clk_bulk_prepare_enable(pd->num_subsys_clks, pd->subsys_clks);

	/*

	 * In few Mediatek platforms(e.g. MT6779), the bus protect policy is

	 * stricter, which leads to bus protect release must be prior to bus

	 * access.

	 */

	if (!MTK_SCPD_CAPS(pd, MTK_SCPD_STRICT_BUS_PROTECTION)) {

		ret = clk_bulk_prepare_enable(pd->num_subsys_clks,

					      pd->subsys_clks);

		if (ret)

			goto err_pwr_ack;

	}



	ret = scpsys_sram_enable(pd);

	if (ret < 0)
@@ -274,12 +282,23 @@ static int scpsys_power_on(struct generic_pm_domain *genpd) 
	if (ret < 0)

		goto err_disable_sram;



	if (MTK_SCPD_CAPS(pd, MTK_SCPD_STRICT_BUS_PROTECTION)) {

		ret = clk_bulk_prepare_enable(pd->num_subsys_clks,

					      pd->subsys_clks);

		if (ret)

			goto err_enable_bus_protect;

	}



	return 0;



err_enable_bus_protect:

	scpsys_bus_protect_enable(pd);

err_disable_sram:

	scpsys_sram_disable(pd);

err_disable_subsys_clks:

	clk_bulk_disable_unprepare(pd->num_subsys_clks, pd->subsys_clks);

	if (!MTK_SCPD_CAPS(pd, MTK_SCPD_STRICT_BUS_PROTECTION))

		clk_bulk_disable_unprepare(pd->num_subsys_clks,

					   pd->subsys_clks);

err_pwr_ack:

	clk_bulk_disable_unprepare(pd->num_clks, pd->clks);

err_reg:

drivers/pmdomain/mediatek/mtk-pm-domains.h

+2 −1
Original line number Diff line number Diff line
@@ -12,6 +12,7 @@ 
#define MTK_SCPD_ALWAYS_ON		BIT(5)

#define MTK_SCPD_EXT_BUCK_ISO		BIT(6)

#define MTK_SCPD_HAS_INFRA_NAO		BIT(7)

#define MTK_SCPD_STRICT_BUS_PROTECTION	BIT(8)

#define MTK_SCPD_CAPS(_scpd, _x)	((_scpd)->data->caps & (_x))



#define SPM_VDE_PWR_CON			0x0210
@@ -107,7 +108,7 @@ struct scpsys_domain_data { 
	u32 sram_pdn_ack_bits;

	int ext_buck_iso_offs;

	u32 ext_buck_iso_mask;

	u8 caps;

	u16 caps;

	const struct scpsys_bus_prot_data bp_cfg[SPM_MAX_BUS_PROT_DATA];

	int pwr_sta_offs;

	int pwr_sta2nd_offs;