drm/amdgpu/gfx: fix MEC interrupt enablement for pipes != 0

The interrupt registers are not indexed.

Fixes: 763a47b8

 (drm/amdgpu: teach amdgpu how to enable interrupts for any pipe v3)
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>