Commit c9059a6b authored by Dmitry Osipenko's avatar Dmitry Osipenko Committed by Thierry Reding
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media: dt: bindings: tegra-vde: Document OPP and power domain 



Document new OPP table and power domain properties of the video decoder
hardware.

Reviewed-by: default avatarRob Herring <robh@kernel.org>
Acked-by: default avatarHans Verkuil <hverkuil-cisco@xs4all.nl>
Signed-off-by: default avatarDmitry Osipenko <digetx@gmail.com>
Signed-off-by: default avatarThierry Reding <treding@nvidia.com>
parent ccc30162

Documentation/devicetree/bindings/media/nvidia,tegra-vde.yaml

+12 −0
Original line number Diff line number Diff line
@@ -68,6 +68,16 @@ properties: 
    description:

      Phandle of the SRAM MMIO node.



  operating-points-v2:

    description:

      Should contain freqs and voltages and opp-supported-hw property,

      which is a bitfield indicating SoC speedo or process ID mask.



  power-domains:

    maxItems: 1

    description:

      Phandle to the SoC core power domain.



required:

  - compatible

  - reg
@@ -104,4 +114,6 @@ examples: 
      reset-names = "vde", "mc";

      resets = <&rst 61>, <&mem 13>;

      iommus = <&mem 15>;

      operating-points-v2 = <&dvfs_opp_table>;

      power-domains = <&domain>;

    };